clk: qcom: Properly support display clocks on msm8974
authorStephen Boyd <sboyd@codeaurora.org>
Fri, 16 May 2014 23:07:12 +0000 (16:07 -0700)
committerMike Turquette <mturquette@linaro.org>
Thu, 29 May 2014 16:30:24 +0000 (09:30 -0700)
commitb7b7cc7034d3bae236fdca31ed4b81fb7a75cd12
tree3f7d01299f60b03494a99a2f880dfdf5ec29b8f8
parent99cbd064b059f222c8839ba433a68b2d6ee33066
clk: qcom: Properly support display clocks on msm8974

The display clocks all source from dedicated phy PLLs within their
respective multimedia hardware block. Hook up these PLLs to the
display clocks with the appropriate parent mappings, clock flags,
and the appropriate clock ops. This should allow the display
clocks to work once the appropriate phy PLL driver registers their
PLL clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/qcom/mmcc-msm8974.c