ARM: 8611/1: l2x0: add PMU support
authorMark Rutland <mark.rutland@arm.com>
Fri, 2 Sep 2016 09:35:18 +0000 (10:35 +0100)
committerRussell King <rmk+kernel@armlinux.org.uk>
Tue, 6 Sep 2016 14:51:09 +0000 (15:51 +0100)
commitb828f960215f02e5d2c88bbd27565c694254a15a
tree7932c62969fc7ce5eaec0aec99b23b89d49a0829
parent8e02676ffa6906a97de7f90772e9cdcb75ea6743
ARM: 8611/1: l2x0: add PMU support

The L2C-220 (AKA L220) and L2C-310 (AKA PL310) cache controllers feature
a Performance Monitoring Unit (PMU), which can be useful for tuning
and/or debugging. This hardware is always present and the relevant
registers are accessible to non-secure accesses. Thus, no special
firmware interface is necessary.

This patch adds support for the PMU, plugging into the usual perf
infrastructure. The overflow interrupt is not always available (e.g. on
RealView PBX A9 it is not wired up at all), and the hardware counters
saturate, so the driver does not make use of this. Instead, the driver
periodically polls and reset counters as required to avoid losing
events due to saturation.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Tested-by: Kim Phillips <kim.phillips@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/include/asm/hardware/cache-l2x0.h
arch/arm/mm/Kconfig
arch/arm/mm/Makefile
arch/arm/mm/cache-l2x0-pmu.c [new file with mode: 0644]
arch/arm/mm/cache-l2x0.c
include/linux/cpuhotplug.h