i2c: i801: Fix I2C Block Read on 8-Series/C220 and later
authorJean Delvare <jdelvare@suse.de>
Tue, 11 Oct 2016 11:13:27 +0000 (13:13 +0200)
committerWolfram Sang <wsa@the-dreams.de>
Tue, 25 Oct 2016 10:00:01 +0000 (12:00 +0200)
commitba9ad2af7019956b990ad654c56da5bac1e8b71b
tree37176a3bd95d67e620adf9e5e6a6ce0dc873bdeb
parent603616017c35f4d0fbdbcace72adf9bf949c4a65
i2c: i801: Fix I2C Block Read on 8-Series/C220 and later

Starting with the 8-Series/C220 PCH (Lynx Point), the SMBus
controller includes a SPD EEPROM protection mechanism. Once the SPD
Write Disable bit is set, only reads are allowed to slave addresses
0x50-0x57.

However the legacy implementation of I2C Block Read since the ICH5
looks like a write, and is therefore blocked by the SPD protection
mechanism. This causes the eeprom and at24 drivers to fail.

So assume that I2C Block Read is implemented as an actual read on
these chipsets. I tested it on my Q87 chipset and it seems to work
just fine.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
[wsa: rebased to v4.9-rc2]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
drivers/i2c/busses/i2c-i801.c