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ASoC: rockchip: i2s: set TDL and RDL to 16 samples
authorJianqun Xu <jay.xu@rock-chips.com>
Wed, 24 Dec 2014 09:37:01 +0000 (17:37 +0800)
committerMark Brown <broonie@kernel.org>
Wed, 24 Dec 2014 12:43:40 +0000 (12:43 +0000)
commitbba1431211e6fdc56680d98d2bdabaab1fd13b79
tree69315f8545ec2e035fbebe70e1f14f78a88d8be8tree | snapshot
parent97bf6af1f928216fd6c5a66e8a57bfa95a659672commit | diff
ASoC: rockchip: i2s: set TDL and RDL to 16 samples

Set Transmit Data Level(TDL) and Receive Data Level(RDL) to 16 samples.
Without this setting, the TDL is default to be 0x00 (means 0 sample),
and the RDL is default to be 0x1f (means 32 samples).

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/rockchip/rockchip_i2s.c diff | blob | history
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