ath9k: add power per-rate tables for AR9002 chips
authorLorenzo Bianconi <lorenzo.bianconi83@gmail.com>
Tue, 30 Dec 2014 22:10:18 +0000 (23:10 +0100)
committerKalle Valo <kvalo@codeaurora.org>
Thu, 15 Jan 2015 12:47:06 +0000 (14:47 +0200)
commitc08267dc9a3641c78846bfac92abfc54984c6694
tree7b71849c0b9eaa2173b0fbd93dba689157667c2e
parent72e121191c0b4bde8cd2cea24c0ebc9d70bf8037
ath9k: add power per-rate tables for AR9002 chips

Add TX power per-rate tables for MIMO/legacy modes for AR9002 based chips
in order to cap the maximum TX power value per-rate in the TX descriptor path.
Add TX power adjustments for HT40 mode, open loop CCK rates and eeprom power
bias for AR9280 and later chips

Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ath/ath9k/ar5008_phy.c
drivers/net/wireless/ath/ath9k/eeprom_4k.c
drivers/net/wireless/ath/ath9k/eeprom_9287.c
drivers/net/wireless/ath/ath9k/eeprom_def.c
drivers/net/wireless/ath/ath9k/hw.h