x86/platform/intel-mid: Extend PWRMU to support Penwell
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 5 Jul 2016 20:09:08 +0000 (23:09 +0300)
committerIngo Molnar <mingo@kernel.org>
Fri, 8 Jul 2016 09:00:06 +0000 (11:00 +0200)
commitca22312dc840065206285626829ceed8bb4df88c
tree72bdccda640061eedf0330cd47af411dff0fc110
parente99a0745bdf8a5f7e3126a686846af4aeb852cc9
x86/platform/intel-mid: Extend PWRMU to support Penwell

Intel Penwell is one of the first SoCs in Intel MID series. It has slightly
older version of PWRMU IP, though it is compatible with one found on Intel
Tangier. Since we are not using (yet) any advanced stuff in the driver we may
safely re-use what it's done for Intel Tangier for now.

Extend PWRMU driver to support Intel Penwell by adding PCI ID and re-using
existing ->set_initial_state() function.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1467749348-100518-2-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/platform/intel-mid/pwr.c