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tty: serial: fsl_lpuart: Fix Tx DMA edge case
authorAaron Brice <aaron.brice@datasoft.com>
Thu, 6 Oct 2016 22:13:04 +0000 (15:13 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Oct 2016 14:41:56 +0000 (16:41 +0200)
commitd704b2d32c39c256dea659e142a31b875a13c63b
treee104411d0b6a56d00ed2f6a8b274ce95292e5d66tree | snapshot
parentf00a7c57569db04633818bc5e0c0e35d62733b02commit | diff
tty: serial: fsl_lpuart: Fix Tx DMA edge case

In the case where head == 0 on the circular buffer, there should be one
DMA buffer, not two.  The second zero-length buffer would break the
lpuart driver, transfer would never complete.

Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Tested-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/fsl_lpuart.c diff | blob | history
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