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(parent: 5e39edd) | patch
clk: hi3620: add gate clock flag
authorHaojian Zhuang <haojian.zhuang@gmail.com>
Wed, 11 Dec 2013 05:07:55 +0000 (13:07 +0800)
committerHaojian Zhuang <haojian.zhuang@gmail.com>
Wed, 11 Dec 2013 08:42:23 +0000 (16:42 +0800)
commitea010e5188dab61b64c1ad0221adc271039e7775
tree88f3aaf6122d5d8acf0eb50b3839a84f62fe62batree | snapshot
parent5e39edd48543c2cc80a28e265b83003737088929commit | diff
clk: hi3620: add gate clock flag

Add missing CLK_SET_RATE_PARENT flag for gate clock.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
drivers/clk/hisilicon/clk-hi3620.c diff | blob | history
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