clk: iproc: Split off dig_filter
authorJon Mason <jonmason@broadcom.com>
Thu, 15 Oct 2015 19:48:29 +0000 (15:48 -0400)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 22 Oct 2015 00:02:57 +0000 (17:02 -0700)
commitf713c6bf32092a259d6baf2be24f9c3dbf2462c3
tree175ddb6a03c3187d358f50f201f22076fc47db46
parent7968d24107f5a50a11792f8a7f011877e7470dfa
clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs.  Split these off into a separate variable, so that an offset can
be added if necessary.  Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/bcm/clk-cygnus.c
drivers/clk/bcm/clk-iproc-pll.c
drivers/clk/bcm/clk-iproc.h
drivers/clk/bcm/clk-nsp.c