ARC: [dts] Add clk feeding into timers to DTs

This allows us to introduce timers in DT in next commit

The core clk frequency hack in AXS103 platform is also extended,
where the core clk feeding into timers is updated in-place in FDT.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index e7a83d1..40bcecf 100644 (file)
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -26,6 +26,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <750000000>;
+               };
+
                core_intc: arc700-intc@cpu {
                        compatible = "snps,arc700-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index b0e3ccd..cabe0de 100644 (file)
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -25,6 +25,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <90000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index f87ae40..8955881 100644 (file)
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -25,6 +25,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <90000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 987921f..5d5e373 100644 (file)
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -32,6 +32,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <80000000>;
+               };
+
                core_intc: interrupt-controller {
                        compatible = "snps,arc700-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index d2f60f8..bf05fe5 100644 (file)
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -39,6 +39,12 @@
                         bus addr,   parent bus addr, size */
                ranges = <0x80000000 0x0 0x80000000 0x80000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <80000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index cc82781..99eabe1 100644 (file)
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -29,6 +29,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <80000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index d5a6dd9..b5b060a 100644 (file)
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -35,6 +35,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <20000000>;
+               };
+
                core_intc: interrupt-controller {
                        compatible = "snps,arc700-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 983f691..325e730 100644 (file)
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -35,6 +35,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <20000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index fd67530..ee03d71 100644 (file)
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -33,6 +33,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <5000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi
index 035759e..ad4ee43 100644 (file)
--- a/arch/arc/boot/dts/vdk_axc003.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003.dtsi
@@ -25,6 +25,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
index 90e18f4..a3cb626 100644 (file)
--- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
@@ -26,6 +26,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 8e7f50a..f90fac2 100644 (file)
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -14,7 +14,9 @@
  *
  */
 
+#include <linux/of_fdt.h>
 #include <linux/of_platform.h>
+#include <linux/libfdt.h>
 
 #include <asm/asm-offsets.h>
 #include <asm/clk.h>
@@ -389,7 +391,12 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)
 
 static void __init axs103_early_init(void)
 {
-       u32 freq = arc_get_core_freq(), orig = freq;
+       int offset = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk");
+       const struct fdt_property *prop = fdt_get_property(initial_boot_params,
+                                                          offset,
+                                                          "clock-frequency",
+                                                          NULL);
+       u32 freq = be32_to_cpu(*(u32*)(prop->data)) / 1000000, orig = freq;
 
        /*
         * AXS103 configurations for SMP/QUAD configurations share device tree
@@ -438,8 +445,13 @@ static void __init axs103_early_init(void)
        }
 
        pr_info("Freq is %dMHz\n", freq);
+
+       /* Patching .dtb in-place with new core clock value */
        if (freq != orig ) {
                arc_set_core_freq(freq * 1000000);
+               freq = cpu_to_be32(freq * 1000000);
+               fdt_setprop_inplace(initial_boot_params, offset,
+                                   "clock-frequency", &freq, sizeof(freq));
        }
 
        /* Memory maps already config in pre-bootloader */