Merge tag 'signed-kvm-ppc-next' of git://github.com/agraf/linux-2.6 into kvm

Patch queue for ppc - 2014-08-01

Highlights in this release include:

  - BookE: Rework instruction fetch, not racy anymore now
  - BookE HV: Fix ONE_REG accessors for some in-hardware registers
  - Book3S: Good number of LE host fixes, enable HV on LE
  - Book3S: Some misc bug fixes
  - Book3S HV: Add in-guest debug support
  - Book3S HV: Preload cache lines on context switch
  - Remove 440 support

Alexander Graf (31):
      KVM: PPC: Book3s PR: Disable AIL mode with OPAL
      KVM: PPC: Book3s HV: Fix tlbie compile error
      KVM: PPC: Book3S PR: Handle hyp doorbell exits
      KVM: PPC: Book3S PR: Fix ABIv2 on LE
      KVM: PPC: Book3S PR: Fix sparse endian checks
      PPC: Add asm helpers for BE 32bit load/store
      KVM: PPC: Book3S HV: Make HTAB code LE host aware
      KVM: PPC: Book3S HV: Access guest VPA in BE
      KVM: PPC: Book3S HV: Access host lppaca and shadow slb in BE
      KVM: PPC: Book3S HV: Access XICS in BE
      KVM: PPC: Book3S HV: Fix ABIv2 on LE
      KVM: PPC: Book3S HV: Enable for little endian hosts
      KVM: PPC: Book3S: Move vcore definition to end of kvm_arch struct
      KVM: PPC: Deflect page write faults properly in kvmppc_st
      KVM: PPC: Book3S: Stop PTE lookup on write errors
      KVM: PPC: Book3S: Add hack for split real mode
      KVM: PPC: Book3S: Make magic page properly 4k mappable
      KVM: PPC: Remove 440 support
      KVM: Rename and add argument to check_extension
      KVM: Allow KVM_CHECK_EXTENSION on the vm fd
      KVM: PPC: Book3S: Provide different CAPs based on HV or PR mode
      KVM: PPC: Implement kvmppc_xlate for all targets
      KVM: PPC: Move kvmppc_ld/st to common code
      KVM: PPC: Remove kvmppc_bad_hva()
      KVM: PPC: Use kvm_read_guest in kvmppc_ld
      KVM: PPC: Handle magic page in kvmppc_ld/st
      KVM: PPC: Separate loadstore emulation from priv emulation
      KVM: PPC: Expose helper functions for data/inst faults
      KVM: PPC: Remove DCR handling
      KVM: PPC: HV: Remove generic instruction emulation
      KVM: PPC: PR: Handle FSCR feature deselects

Alexey Kardashevskiy (1):
      KVM: PPC: Book3S: Fix LPCR one_reg interface

Aneesh Kumar K.V (4):
      KVM: PPC: BOOK3S: PR: Fix PURR and SPURR emulation
      KVM: PPC: BOOK3S: PR: Emulate virtual timebase register
      KVM: PPC: BOOK3S: PR: Emulate instruction counter
      KVM: PPC: BOOK3S: HV: Update compute_tlbie_rb to handle 16MB base page

Anton Blanchard (2):
      KVM: PPC: Book3S HV: Fix ABIv2 indirect branch issue
      KVM: PPC: Assembly functions exported to modules need _GLOBAL_TOC()

Bharat Bhushan (10):
      kvm: ppc: bookehv: Added wrapper macros for shadow registers
      kvm: ppc: booke: Use the shared struct helpers of SRR0 and SRR1
      kvm: ppc: booke: Use the shared struct helpers of SPRN_DEAR
      kvm: ppc: booke: Add shared struct helpers of SPRN_ESR
      kvm: ppc: booke: Use the shared struct helpers for SPRN_SPRG0-7
      kvm: ppc: Add SPRN_EPR get helper function
      kvm: ppc: bookehv: Save restore SPRN_SPRG9 on guest entry exit
      KVM: PPC: Booke-hv: Add one reg interface for SPRG9
      KVM: PPC: Remove comment saying SPRG1 is used for vcpu pointer
      KVM: PPC: BOOKEHV: rename e500hv_spr to bookehv_spr

Michael Neuling (1):
      KVM: PPC: Book3S HV: Add H_SET_MODE hcall handling

Mihai Caraman (8):
      KVM: PPC: e500mc: Enhance tlb invalidation condition on vcpu schedule
      KVM: PPC: e500: Fix default tlb for victim hint
      KVM: PPC: e500: Emulate power management control SPR
      KVM: PPC: e500mc: Revert "add load inst fixup"
      KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1
      KVM: PPC: Book3s: Remove kvmppc_read_inst() function
      KVM: PPC: Allow kvmppc_get_last_inst() to fail
      KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

Paul Mackerras (4):
      KVM: PPC: Book3S: Controls for in-kernel sPAPR hypercall handling
      KVM: PPC: Book3S: Allow only implemented hcalls to be enabled or disabled
      KVM: PPC: Book3S PR: Take SRCU read lock around RTAS kvm_read_guest() call
      KVM: PPC: Book3S: Make kvmppc_ld return a more accurate error indication

Stewart Smith (2):
      Split out struct kvmppc_vcore creation to separate function
      Use the POWER8 Micro Partition Prefetch Engine in KVM HV on POWER8

Conflicts:
	Documentation/virtual/kvm/api.txt

diff --cc Documentation/virtual/kvm/api.txt
index 68cda1f,a21ff22..beae3fd
--- 1/Documentation/virtual/kvm/api.txt
--- 2/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@@ -1797,151 -1777,123 +1800,152 @@@ and architecture specific registers. Ea
  and their own constants and width. To keep track of the implemented
  registers, find a list below:
  
 -  Arch  |       Register        | Width (bits)
 -        |                       |
 -  PPC   | KVM_REG_PPC_HIOR      | 64
 -  PPC   | KVM_REG_PPC_IAC1      | 64
 -  PPC   | KVM_REG_PPC_IAC2      | 64
 -  PPC   | KVM_REG_PPC_IAC3      | 64
 -  PPC   | KVM_REG_PPC_IAC4      | 64
 -  PPC   | KVM_REG_PPC_DAC1      | 64
 -  PPC   | KVM_REG_PPC_DAC2      | 64
 -  PPC   | KVM_REG_PPC_DABR      | 64
 -  PPC   | KVM_REG_PPC_DSCR      | 64
 -  PPC   | KVM_REG_PPC_PURR      | 64
 -  PPC   | KVM_REG_PPC_SPURR     | 64
 -  PPC   | KVM_REG_PPC_DAR       | 64
 -  PPC   | KVM_REG_PPC_DSISR     | 32
 -  PPC   | KVM_REG_PPC_AMR       | 64
 -  PPC   | KVM_REG_PPC_UAMOR     | 64
 -  PPC   | KVM_REG_PPC_MMCR0     | 64
 -  PPC   | KVM_REG_PPC_MMCR1     | 64
 -  PPC   | KVM_REG_PPC_MMCRA     | 64
 -  PPC   | KVM_REG_PPC_MMCR2     | 64
 -  PPC   | KVM_REG_PPC_MMCRS     | 64
 -  PPC   | KVM_REG_PPC_SIAR      | 64
 -  PPC   | KVM_REG_PPC_SDAR      | 64
 -  PPC   | KVM_REG_PPC_SIER      | 64
 -  PPC   | KVM_REG_PPC_PMC1      | 32
 -  PPC   | KVM_REG_PPC_PMC2      | 32
 -  PPC   | KVM_REG_PPC_PMC3      | 32
 -  PPC   | KVM_REG_PPC_PMC4      | 32
 -  PPC   | KVM_REG_PPC_PMC5      | 32
 -  PPC   | KVM_REG_PPC_PMC6      | 32
 -  PPC   | KVM_REG_PPC_PMC7      | 32
 -  PPC   | KVM_REG_PPC_PMC8      | 32
 -  PPC   | KVM_REG_PPC_FPR0      | 64
 +  Arch  |           Register            | Width (bits)
 +        |                               |
 +  PPC   | KVM_REG_PPC_HIOR              | 64
 +  PPC   | KVM_REG_PPC_IAC1              | 64
 +  PPC   | KVM_REG_PPC_IAC2              | 64
 +  PPC   | KVM_REG_PPC_IAC3              | 64
 +  PPC   | KVM_REG_PPC_IAC4              | 64
 +  PPC   | KVM_REG_PPC_DAC1              | 64
 +  PPC   | KVM_REG_PPC_DAC2              | 64
 +  PPC   | KVM_REG_PPC_DABR              | 64
 +  PPC   | KVM_REG_PPC_DSCR              | 64
 +  PPC   | KVM_REG_PPC_PURR              | 64
 +  PPC   | KVM_REG_PPC_SPURR             | 64
 +  PPC   | KVM_REG_PPC_DAR               | 64
 +  PPC   | KVM_REG_PPC_DSISR             | 32
 +  PPC   | KVM_REG_PPC_AMR               | 64
 +  PPC   | KVM_REG_PPC_UAMOR             | 64
 +  PPC   | KVM_REG_PPC_MMCR0             | 64
 +  PPC   | KVM_REG_PPC_MMCR1             | 64
 +  PPC   | KVM_REG_PPC_MMCRA             | 64
 +  PPC   | KVM_REG_PPC_MMCR2             | 64
 +  PPC   | KVM_REG_PPC_MMCRS             | 64
 +  PPC   | KVM_REG_PPC_SIAR              | 64
 +  PPC   | KVM_REG_PPC_SDAR              | 64
 +  PPC   | KVM_REG_PPC_SIER              | 64
 +  PPC   | KVM_REG_PPC_PMC1              | 32
 +  PPC   | KVM_REG_PPC_PMC2              | 32
 +  PPC   | KVM_REG_PPC_PMC3              | 32
 +  PPC   | KVM_REG_PPC_PMC4              | 32
 +  PPC   | KVM_REG_PPC_PMC5              | 32
 +  PPC   | KVM_REG_PPC_PMC6              | 32
 +  PPC   | KVM_REG_PPC_PMC7              | 32
 +  PPC   | KVM_REG_PPC_PMC8              | 32
 +  PPC   | KVM_REG_PPC_FPR0              | 64
 +          ...
 +  PPC   | KVM_REG_PPC_FPR31             | 64
 +  PPC   | KVM_REG_PPC_VR0               | 128
            ...
 -  PPC   | KVM_REG_PPC_FPR31     | 64
 -  PPC   | KVM_REG_PPC_VR0       | 128
 +  PPC   | KVM_REG_PPC_VR31              | 128
 +  PPC   | KVM_REG_PPC_VSR0              | 128
            ...
 -  PPC   | KVM_REG_PPC_VR31      | 128
 -  PPC   | KVM_REG_PPC_VSR0      | 128
 +  PPC   | KVM_REG_PPC_VSR31             | 128
 +  PPC   | KVM_REG_PPC_FPSCR             | 64
 +  PPC   | KVM_REG_PPC_VSCR              | 32
 +  PPC   | KVM_REG_PPC_VPA_ADDR          | 64
 +  PPC   | KVM_REG_PPC_VPA_SLB           | 128
 +  PPC   | KVM_REG_PPC_VPA_DTL           | 128
 +  PPC   | KVM_REG_PPC_EPCR              | 32
 +  PPC   | KVM_REG_PPC_EPR               | 32
 +  PPC   | KVM_REG_PPC_TCR               | 32
 +  PPC   | KVM_REG_PPC_TSR               | 32
 +  PPC   | KVM_REG_PPC_OR_TSR            | 32
 +  PPC   | KVM_REG_PPC_CLEAR_TSR         | 32
 +  PPC   | KVM_REG_PPC_MAS0              | 32
 +  PPC   | KVM_REG_PPC_MAS1              | 32
 +  PPC   | KVM_REG_PPC_MAS2              | 64
 +  PPC   | KVM_REG_PPC_MAS7_3            | 64
 +  PPC   | KVM_REG_PPC_MAS4              | 32
 +  PPC   | KVM_REG_PPC_MAS6              | 32
 +  PPC   | KVM_REG_PPC_MMUCFG            | 32
 +  PPC   | KVM_REG_PPC_TLB0CFG           | 32
 +  PPC   | KVM_REG_PPC_TLB1CFG           | 32
 +  PPC   | KVM_REG_PPC_TLB2CFG           | 32
 +  PPC   | KVM_REG_PPC_TLB3CFG           | 32
 +  PPC   | KVM_REG_PPC_TLB0PS            | 32
 +  PPC   | KVM_REG_PPC_TLB1PS            | 32
 +  PPC   | KVM_REG_PPC_TLB2PS            | 32
 +  PPC   | KVM_REG_PPC_TLB3PS            | 32
 +  PPC   | KVM_REG_PPC_EPTCFG            | 32
 +  PPC   | KVM_REG_PPC_ICP_STATE         | 64
 +  PPC   | KVM_REG_PPC_TB_OFFSET         | 64
 +  PPC   | KVM_REG_PPC_SPMC1             | 32
 +  PPC   | KVM_REG_PPC_SPMC2             | 32
 +  PPC   | KVM_REG_PPC_IAMR              | 64
 +  PPC   | KVM_REG_PPC_TFHAR             | 64
 +  PPC   | KVM_REG_PPC_TFIAR             | 64
 +  PPC   | KVM_REG_PPC_TEXASR            | 64
 +  PPC   | KVM_REG_PPC_FSCR              | 64
 +  PPC   | KVM_REG_PPC_PSPB              | 32
 +  PPC   | KVM_REG_PPC_EBBHR             | 64
 +  PPC   | KVM_REG_PPC_EBBRR             | 64
 +  PPC   | KVM_REG_PPC_BESCR             | 64
 +  PPC   | KVM_REG_PPC_TAR               | 64
 +  PPC   | KVM_REG_PPC_DPDES             | 64
 +  PPC   | KVM_REG_PPC_DAWR              | 64
 +  PPC   | KVM_REG_PPC_DAWRX             | 64
 +  PPC   | KVM_REG_PPC_CIABR             | 64
 +  PPC   | KVM_REG_PPC_IC                | 64
 +  PPC   | KVM_REG_PPC_VTB               | 64
 +  PPC   | KVM_REG_PPC_CSIGR             | 64
 +  PPC   | KVM_REG_PPC_TACR              | 64
 +  PPC   | KVM_REG_PPC_TCSCR             | 64
 +  PPC   | KVM_REG_PPC_PID               | 64
 +  PPC   | KVM_REG_PPC_ACOP              | 64
 +  PPC   | KVM_REG_PPC_VRSAVE            | 32
-   PPC   | KVM_REG_PPC_LPCR              | 64
++  PPC   | KVM_REG_PPC_LPCR              | 32
++  PPC   | KVM_REG_PPC_LPCR_64           | 64
 +  PPC   | KVM_REG_PPC_PPR               | 64
 +  PPC   | KVM_REG_PPC_ARCH_COMPAT       | 32
 +  PPC   | KVM_REG_PPC_DABRX             | 32
 +  PPC   | KVM_REG_PPC_WORT              | 64
 +  PPC   | KVM_REG_PPC_TM_GPR0           | 64
            ...
 -  PPC   | KVM_REG_PPC_VSR31     | 128
 -  PPC   | KVM_REG_PPC_FPSCR     | 64
 -  PPC   | KVM_REG_PPC_VSCR      | 32
 -  PPC   | KVM_REG_PPC_VPA_ADDR  | 64
 -  PPC   | KVM_REG_PPC_VPA_SLB   | 128
 -  PPC   | KVM_REG_PPC_VPA_DTL   | 128
 -  PPC   | KVM_REG_PPC_EPCR    | 32
 -  PPC   | KVM_REG_PPC_EPR     | 32
 -  PPC   | KVM_REG_PPC_TCR     | 32
 -  PPC   | KVM_REG_PPC_TSR     | 32
 -  PPC   | KVM_REG_PPC_OR_TSR  | 32
 -  PPC   | KVM_REG_PPC_CLEAR_TSR       | 32
 -  PPC   | KVM_REG_PPC_MAS0    | 32
 -  PPC   | KVM_REG_PPC_MAS1    | 32
 -  PPC   | KVM_REG_PPC_MAS2    | 64
 -  PPC   | KVM_REG_PPC_MAS7_3  | 64
 -  PPC   | KVM_REG_PPC_MAS4    | 32
 -  PPC   | KVM_REG_PPC_MAS6    | 32
 -  PPC   | KVM_REG_PPC_MMUCFG  | 32
 -  PPC   | KVM_REG_PPC_TLB0CFG | 32
 -  PPC   | KVM_REG_PPC_TLB1CFG | 32
 -  PPC   | KVM_REG_PPC_TLB2CFG | 32
 -  PPC   | KVM_REG_PPC_TLB3CFG | 32
 -  PPC   | KVM_REG_PPC_TLB0PS  | 32
 -  PPC   | KVM_REG_PPC_TLB1PS  | 32
 -  PPC   | KVM_REG_PPC_TLB2PS  | 32
 -  PPC   | KVM_REG_PPC_TLB3PS  | 32
 -  PPC   | KVM_REG_PPC_EPTCFG  | 32
 -  PPC   | KVM_REG_PPC_ICP_STATE | 64
 -  PPC   | KVM_REG_PPC_TB_OFFSET       | 64
 -  PPC   | KVM_REG_PPC_SPMC1   | 32
 -  PPC   | KVM_REG_PPC_SPMC2   | 32
 -  PPC   | KVM_REG_PPC_IAMR    | 64
 -  PPC   | KVM_REG_PPC_TFHAR   | 64
 -  PPC   | KVM_REG_PPC_TFIAR   | 64
 -  PPC   | KVM_REG_PPC_TEXASR  | 64
 -  PPC   | KVM_REG_PPC_FSCR    | 64
 -  PPC   | KVM_REG_PPC_PSPB    | 32
 -  PPC   | KVM_REG_PPC_EBBHR   | 64
 -  PPC   | KVM_REG_PPC_EBBRR   | 64
 -  PPC   | KVM_REG_PPC_BESCR   | 64
 -  PPC   | KVM_REG_PPC_TAR     | 64
 -  PPC   | KVM_REG_PPC_DPDES   | 64
 -  PPC   | KVM_REG_PPC_DAWR    | 64
 -  PPC   | KVM_REG_PPC_DAWRX   | 64
 -  PPC   | KVM_REG_PPC_CIABR   | 64
 -  PPC   | KVM_REG_PPC_IC      | 64
 -  PPC   | KVM_REG_PPC_VTB     | 64
 -  PPC   | KVM_REG_PPC_CSIGR   | 64
 -  PPC   | KVM_REG_PPC_TACR    | 64
 -  PPC   | KVM_REG_PPC_TCSCR   | 64
 -  PPC   | KVM_REG_PPC_PID     | 64
 -  PPC   | KVM_REG_PPC_ACOP    | 64
 -  PPC   | KVM_REG_PPC_VRSAVE  | 32
 -  PPC   | KVM_REG_PPC_LPCR    | 32
 -  PPC   | KVM_REG_PPC_LPCR_64 | 64
 -  PPC   | KVM_REG_PPC_PPR     | 64
 -  PPC   | KVM_REG_PPC_ARCH_COMPAT 32
 -  PPC   | KVM_REG_PPC_DABRX     | 32
 -  PPC   | KVM_REG_PPC_WORT      | 64
 -  PPC   | KVM_REG_PPC_TM_GPR0 | 64
 +  PPC   | KVM_REG_PPC_TM_GPR31          | 64
 +  PPC   | KVM_REG_PPC_TM_VSR0           | 128
            ...
 -  PPC   | KVM_REG_PPC_TM_GPR31        | 64
 -  PPC   | KVM_REG_PPC_TM_VSR0 | 128
 +  PPC   | KVM_REG_PPC_TM_VSR63          | 128
 +  PPC   | KVM_REG_PPC_TM_CR             | 64
 +  PPC   | KVM_REG_PPC_TM_LR             | 64
 +  PPC   | KVM_REG_PPC_TM_CTR            | 64
 +  PPC   | KVM_REG_PPC_TM_FPSCR          | 64
 +  PPC   | KVM_REG_PPC_TM_AMR            | 64
 +  PPC   | KVM_REG_PPC_TM_PPR            | 64
 +  PPC   | KVM_REG_PPC_TM_VRSAVE         | 64
 +  PPC   | KVM_REG_PPC_TM_VSCR           | 32
 +  PPC   | KVM_REG_PPC_TM_DSCR           | 64
 +  PPC   | KVM_REG_PPC_TM_TAR            | 64
 +        |                               |
 +  MIPS  | KVM_REG_MIPS_R0               | 64
            ...
 -  PPC   | KVM_REG_PPC_TM_VSR63        | 128
 -  PPC   | KVM_REG_PPC_TM_CR   | 64
 -  PPC   | KVM_REG_PPC_TM_LR   | 64
 -  PPC   | KVM_REG_PPC_TM_CTR  | 64
 -  PPC   | KVM_REG_PPC_TM_FPSCR        | 64
 -  PPC   | KVM_REG_PPC_TM_AMR  | 64
 -  PPC   | KVM_REG_PPC_TM_PPR  | 64
 -  PPC   | KVM_REG_PPC_TM_VRSAVE       | 64
 -  PPC   | KVM_REG_PPC_TM_VSCR | 32
 -  PPC   | KVM_REG_PPC_TM_DSCR | 64
 -  PPC   | KVM_REG_PPC_TM_TAR  | 64
 +  MIPS  | KVM_REG_MIPS_R31              | 64
 +  MIPS  | KVM_REG_MIPS_HI               | 64
 +  MIPS  | KVM_REG_MIPS_LO               | 64
 +  MIPS  | KVM_REG_MIPS_PC               | 64
 +  MIPS  | KVM_REG_MIPS_CP0_INDEX        | 32
 +  MIPS  | KVM_REG_MIPS_CP0_CONTEXT      | 64
 +  MIPS  | KVM_REG_MIPS_CP0_USERLOCAL    | 64
 +  MIPS  | KVM_REG_MIPS_CP0_PAGEMASK     | 32
 +  MIPS  | KVM_REG_MIPS_CP0_WIRED        | 32
 +  MIPS  | KVM_REG_MIPS_CP0_HWRENA       | 32
 +  MIPS  | KVM_REG_MIPS_CP0_BADVADDR     | 64
 +  MIPS  | KVM_REG_MIPS_CP0_COUNT        | 32
 +  MIPS  | KVM_REG_MIPS_CP0_ENTRYHI      | 64
 +  MIPS  | KVM_REG_MIPS_CP0_COMPARE      | 32
 +  MIPS  | KVM_REG_MIPS_CP0_STATUS       | 32
 +  MIPS  | KVM_REG_MIPS_CP0_CAUSE        | 32
 +  MIPS  | KVM_REG_MIPS_CP0_EPC          | 64
 +  MIPS  | KVM_REG_MIPS_CP0_CONFIG       | 32
 +  MIPS  | KVM_REG_MIPS_CP0_CONFIG1      | 32
 +  MIPS  | KVM_REG_MIPS_CP0_CONFIG2      | 32
 +  MIPS  | KVM_REG_MIPS_CP0_CONFIG3      | 32
 +  MIPS  | KVM_REG_MIPS_CP0_CONFIG7      | 32
 +  MIPS  | KVM_REG_MIPS_CP0_ERROREPC     | 64
 +  MIPS  | KVM_REG_MIPS_COUNT_CTL        | 64
 +  MIPS  | KVM_REG_MIPS_COUNT_RESUME     | 64
 +  MIPS  | KVM_REG_MIPS_COUNT_HZ         | 64
  
  ARM registers are mapped using the lower 32 bits.  The upper 16 of that
  is the register group type, or coprocessor number:
@@@ -2677,8 -2613,8 +2681,8 @@@ The 'data' member contains, in its firs
  appear if the VCPU performed a load or store of the appropriate width directly
  to the byte array.
  
- NOTE: For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_DCR,
-       KVM_EXIT_PAPR and KVM_EXIT_EPR the corresponding
 -NOTE: For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI KVM_EXIT_PAPR and
++NOTE: For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR and
+       KVM_EXIT_EPR the corresponding
  operations are complete (and guest state is consistent) only after userspace
  has re-entered the kernel with KVM_RUN.  The kernel side will first finish
  incomplete operations and then check for pending signals.  Userspace
@@@ -2931,13 -2867,12 +2935,13 @@@ The fields in each entry are defined a
           this function/index combination
  
  
- 6. Capabilities that can be enabled
- -----------------------------------
+ 6. Capabilities that can be enabled on vCPUs
+ --------------------------------------------
  
 -There are certain capabilities that change the behavior of the virtual CPU when
 -enabled. To enable them, please see section 4.37. Below you can find a list of
 -capabilities and what their effect on the vCPU is when enabling them.
 +There are certain capabilities that change the behavior of the virtual CPU or
 +the virtual machine when enabled. To enable them, please see section 4.37.
 +Below you can find a list of capabilities and what their effect on the vCPU or
 +the virtual machine is when enabling them.
  
  The following information is provided along with the description:
  
@@@ -3083,11 -3007,43 +3087,51 @@@ Parameters: args[0] is the XICS device 
  
  This capability connects the vcpu to an in-kernel XICS device.
  
 +6.8 KVM_CAP_S390_IRQCHIP
 +
 +Architectures: s390
 +Target: vm
 +Parameters: none
 +
 +This capability enables the in-kernel irqchip for s390. Please refer to
 +"4.24 KVM_CREATE_IRQCHIP" for details.
+ 
+ 7. Capabilities that can be enabled on VMs
+ ------------------------------------------
+ 
+ There are certain capabilities that change the behavior of the virtual
+ machine when enabled. To enable them, please see section 4.37. Below
+ you can find a list of capabilities and what their effect on the VM
+ is when enabling them.
+ 
+ The following information is provided along with the description:
+ 
+   Architectures: which instruction set architectures provide this ioctl.
+       x86 includes both i386 and x86_64.
+ 
+   Parameters: what parameters are accepted by the capability.
+ 
+   Returns: the return value.  General error numbers (EBADF, ENOMEM, EINVAL)
+       are not detailed, but errors with specific meanings are.
+ 
+ 
+ 7.1 KVM_CAP_PPC_ENABLE_HCALL
+ 
+ Architectures: ppc
+ Parameters: args[0] is the sPAPR hcall number
+           args[1] is 0 to disable, 1 to enable in-kernel handling
+ 
+ This capability controls whether individual sPAPR hypercalls (hcalls)
+ get handled by the kernel or not.  Enabling or disabling in-kernel
+ handling of an hcall is effective across the VM.  On creation, an
+ initial set of hcalls are enabled for in-kernel handling, which
+ consists of those hcalls for which in-kernel handlers were implemented
+ before this capability was implemented.  If disabled, the kernel will
+ not to attempt to handle the hcall, but will always exit to userspace
+ to handle it.  Note that it may not make sense to enable some and
+ disable others of a group of related hcalls, but KVM does not prevent
+ userspace from doing that.
+ 
+ If the hcall number specified is not one that has an in-kernel
+ implementation, the KVM_ENABLE_CAP ioctl will fail with an EINVAL
+ error.

diff --cc arch/arm/kvm/arm.c
Simple merge

diff --cc arch/mips/kvm/mips.c
Simple merge

diff --cc arch/powerpc/Kconfig.debug
Simple merge

diff --cc arch/powerpc/include/asm/kvm_book3s_64.h
Simple merge

diff --cc arch/powerpc/kvm/book3s_64_mmu_hv.c
Simple merge

diff --cc arch/powerpc/kvm/book3s_hv_rm_mmu.c
index 5a24d3c,e5c6063..084ad54
--- 1/arch/powerpc/kvm/book3s_hv_rm_mmu.c
--- 2/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@@ -810,14 -830,17 +830,14 @@@ long kvmppc_hv_find_lock_hpte(struct kv
                        /* Lock the PTE and read it under the lock */
                        while (!try_lock_hpte(&hpte[i], HPTE_V_HVLOCK))
                                cpu_relax();
-                       v = hpte[i] & ~HPTE_V_HVLOCK;
-                       r = hpte[i+1];
+                       v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK;
+                       r = be64_to_cpu(hpte[i+1]);
  
                        /*
 -                       * Check the HPTE again, including large page size
 -                       * Since we don't currently allow any MPSS (mixed
 -                       * page-size segment) page sizes, it is sufficient
 -                       * to check against the actual page size.
 +                       * Check the HPTE again, including base page size
                         */
                        if ((v & valid) && (v & mask) == val &&
 -                          hpte_page_size(v, r) == (1ul << pshift))
 +                          hpte_base_page_size(v, r) == (1ul << pshift))
                                /* Return with the HPTE still locked */
                                return (hash << 3) + (i >> 1);
  

diff --cc arch/powerpc/kvm/e500_mmu_host.c
Simple merge

diff --cc arch/s390/kvm/kvm-s390.c
Simple merge

diff --cc arch/x86/kvm/x86.c
Simple merge

diff --cc include/uapi/linux/kvm.h
Simple merge