arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40
  41 #include <asm/uaccess.h>
  42 #include <asm/msr.h>
  43 #include <asm/desc.h>
  44 #include <asm/mtrr.h>
  45 #include <asm/mce.h>
  46
  47 #define MAX_IO_MSRS 256
  48 #define CR0_RESERVED_BITS                                               \
  49         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  50                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  51                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  52 #define CR4_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  54                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  55                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  56                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  57
  58 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  59
  60 #define KVM_MAX_MCE_BANKS 32
  61 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  62
  63 /* EFER defaults:
  64  * - enable syscall per default because its emulated by KVM
  65  * - enable LME and LMA per default on 64 bit KVM
  66  */
  67 #ifdef CONFIG_X86_64
  68 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  69 #else
  70 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  71 #endif
  72
  73 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  74 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  75
  76 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  77                                     struct kvm_cpuid_entry2 __user *entries);
  78 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
  79                                               u32 function, u32 index);
  80
  81 struct kvm_x86_ops *kvm_x86_ops;
  82 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  83
  84 struct kvm_stats_debugfs_item debugfs_entries[] = {
  85         { "pf_fixed", VCPU_STAT(pf_fixed) },
  86         { "pf_guest", VCPU_STAT(pf_guest) },
  87         { "tlb_flush", VCPU_STAT(tlb_flush) },
  88         { "invlpg", VCPU_STAT(invlpg) },
  89         { "exits", VCPU_STAT(exits) },
  90         { "io_exits", VCPU_STAT(io_exits) },
  91         { "mmio_exits", VCPU_STAT(mmio_exits) },
  92         { "signal_exits", VCPU_STAT(signal_exits) },
  93         { "irq_window", VCPU_STAT(irq_window_exits) },
  94         { "nmi_window", VCPU_STAT(nmi_window_exits) },
  95         { "halt_exits", VCPU_STAT(halt_exits) },
  96         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  97         { "hypercalls", VCPU_STAT(hypercalls) },
  98         { "request_irq", VCPU_STAT(request_irq_exits) },
  99         { "irq_exits", VCPU_STAT(irq_exits) },
 100         { "host_state_reload", VCPU_STAT(host_state_reload) },
 101         { "efer_reload", VCPU_STAT(efer_reload) },
 102         { "fpu_reload", VCPU_STAT(fpu_reload) },
 103         { "insn_emulation", VCPU_STAT(insn_emulation) },
 104         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 105         { "irq_injections", VCPU_STAT(irq_injections) },
 106         { "nmi_injections", VCPU_STAT(nmi_injections) },
 107         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 108         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 109         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 110         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 111         { "mmu_flooded", VM_STAT(mmu_flooded) },
 112         { "mmu_recycled", VM_STAT(mmu_recycled) },
 113         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 114         { "mmu_unsync", VM_STAT(mmu_unsync) },
 115         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 116         { "largepages", VM_STAT(lpages) },
 117         { NULL }
 118 };
 119
 120 unsigned long segment_base(u16 selector)
 121 {
 122         struct descriptor_table gdt;
 123         struct desc_struct *d;
 124         unsigned long table_base;
 125         unsigned long v;
 126
 127         if (selector == 0)
 128                 return 0;
 129
 130         asm("sgdt %0" : "=m"(gdt));
 131         table_base = gdt.base;
 132
 133         if (selector & 4) {           /* from ldt */
 134                 u16 ldt_selector;
 135
 136                 asm("sldt %0" : "=g"(ldt_selector));
 137                 table_base = segment_base(ldt_selector);
 138         }
 139         d = (struct desc_struct *)(table_base + (selector & ~7));
 140         v = d->base0 | ((unsigned long)d->base1 << 16) |
 141                 ((unsigned long)d->base2 << 24);
 142 #ifdef CONFIG_X86_64
 143         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 144                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 145 #endif
 146         return v;
 147 }
 148 EXPORT_SYMBOL_GPL(segment_base);
 149
 150 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 151 {
 152         if (irqchip_in_kernel(vcpu->kvm))
 153                 return vcpu->arch.apic_base;
 154         else
 155                 return vcpu->arch.apic_base;
 156 }
 157 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 158
 159 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 160 {
 161         /* TODO: reserve bits check */
 162         if (irqchip_in_kernel(vcpu->kvm))
 163                 kvm_lapic_set_base(vcpu, data);
 164         else
 165                 vcpu->arch.apic_base = data;
 166 }
 167 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 168
 169 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 170 {
 171         WARN_ON(vcpu->arch.exception.pending);
 172         vcpu->arch.exception.pending = true;
 173         vcpu->arch.exception.has_error_code = false;
 174         vcpu->arch.exception.nr = nr;
 175 }
 176 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 177
 178 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 179                            u32 error_code)
 180 {
 181         ++vcpu->stat.pf_guest;
 182
 183         if (vcpu->arch.exception.pending) {
 184                 if (vcpu->arch.exception.nr == PF_VECTOR) {
 185                         printk(KERN_DEBUG "kvm: inject_page_fault:"
 186                                         " double fault 0x%lx\n", addr);
 187                         vcpu->arch.exception.nr = DF_VECTOR;
 188                         vcpu->arch.exception.error_code = 0;
 189                 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
 190                         /* triple fault -> shutdown */
 191                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 192                 }
 193                 return;
 194         }
 195         vcpu->arch.cr2 = addr;
 196         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 197 }
 198
 199 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 200 {
 201         vcpu->arch.nmi_pending = 1;
 202 }
 203 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 204
 205 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 206 {
 207         WARN_ON(vcpu->arch.exception.pending);
 208         vcpu->arch.exception.pending = true;
 209         vcpu->arch.exception.has_error_code = true;
 210         vcpu->arch.exception.nr = nr;
 211         vcpu->arch.exception.error_code = error_code;
 212 }
 213 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 214
 215 static void __queue_exception(struct kvm_vcpu *vcpu)
 216 {
 217         kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
 218                                      vcpu->arch.exception.has_error_code,
 219                                      vcpu->arch.exception.error_code);
 220 }
 221
 222 /*
 223  * Load the pae pdptrs.  Return true is they are all valid.
 224  */
 225 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 226 {
 227         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 228         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 229         int i;
 230         int ret;
 231         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 232
 233         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 234                                   offset * sizeof(u64), sizeof(pdpte));
 235         if (ret < 0) {
 236                 ret = 0;
 237                 goto out;
 238         }
 239         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 240                 if (is_present_pte(pdpte[i]) &&
 241                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 242                         ret = 0;
 243                         goto out;
 244                 }
 245         }
 246         ret = 1;
 247
 248         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 249 out:
 250
 251         return ret;
 252 }
 253 EXPORT_SYMBOL_GPL(load_pdptrs);
 254
 255 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 256 {
 257         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 258         bool changed = true;
 259         int r;
 260
 261         if (is_long_mode(vcpu) || !is_pae(vcpu))
 262                 return false;
 263
 264         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 265         if (r < 0)
 266                 goto out;
 267         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 268 out:
 269
 270         return changed;
 271 }
 272
 273 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 274 {
 275         if (cr0 & CR0_RESERVED_BITS) {
 276                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 277                        cr0, vcpu->arch.cr0);
 278                 kvm_inject_gp(vcpu, 0);
 279                 return;
 280         }
 281
 282         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 283                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 284                 kvm_inject_gp(vcpu, 0);
 285                 return;
 286         }
 287
 288         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 289                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 290                        "and a clear PE flag\n");
 291                 kvm_inject_gp(vcpu, 0);
 292                 return;
 293         }
 294
 295         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 296 #ifdef CONFIG_X86_64
 297                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 298                         int cs_db, cs_l;
 299
 300                         if (!is_pae(vcpu)) {
 301                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 302                                        "in long mode while PAE is disabled\n");
 303                                 kvm_inject_gp(vcpu, 0);
 304                                 return;
 305                         }
 306                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 307                         if (cs_l) {
 308                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 309                                        "in long mode while CS.L == 1\n");
 310                                 kvm_inject_gp(vcpu, 0);
 311                                 return;
 312
 313                         }
 314                 } else
 315 #endif
 316                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 317                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 318                                "reserved bits\n");
 319                         kvm_inject_gp(vcpu, 0);
 320                         return;
 321                 }
 322
 323         }
 324
 325         kvm_x86_ops->set_cr0(vcpu, cr0);
 326         vcpu->arch.cr0 = cr0;
 327
 328         kvm_mmu_reset_context(vcpu);
 329         return;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 332
 333 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 334 {
 335         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 336         KVMTRACE_1D(LMSW, vcpu,
 337                     (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
 338                     handler);
 339 }
 340 EXPORT_SYMBOL_GPL(kvm_lmsw);
 341
 342 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 343 {
 344         unsigned long old_cr4 = vcpu->arch.cr4;
 345         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 346
 347         if (cr4 & CR4_RESERVED_BITS) {
 348                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 349                 kvm_inject_gp(vcpu, 0);
 350                 return;
 351         }
 352
 353         if (is_long_mode(vcpu)) {
 354                 if (!(cr4 & X86_CR4_PAE)) {
 355                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 356                                "in long mode\n");
 357                         kvm_inject_gp(vcpu, 0);
 358                         return;
 359                 }
 360         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 361                    && ((cr4 ^ old_cr4) & pdptr_bits)
 362                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 363                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 364                 kvm_inject_gp(vcpu, 0);
 365                 return;
 366         }
 367
 368         if (cr4 & X86_CR4_VMXE) {
 369                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 370                 kvm_inject_gp(vcpu, 0);
 371                 return;
 372         }
 373         kvm_x86_ops->set_cr4(vcpu, cr4);
 374         vcpu->arch.cr4 = cr4;
 375         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 376         kvm_mmu_reset_context(vcpu);
 377 }
 378 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 379
 380 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 381 {
 382         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 383                 kvm_mmu_sync_roots(vcpu);
 384                 kvm_mmu_flush_tlb(vcpu);
 385                 return;
 386         }
 387
 388         if (is_long_mode(vcpu)) {
 389                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 390                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 391                         kvm_inject_gp(vcpu, 0);
 392                         return;
 393                 }
 394         } else {
 395                 if (is_pae(vcpu)) {
 396                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 397                                 printk(KERN_DEBUG
 398                                        "set_cr3: #GP, reserved bits\n");
 399                                 kvm_inject_gp(vcpu, 0);
 400                                 return;
 401                         }
 402                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 403                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 404                                        "reserved bits\n");
 405                                 kvm_inject_gp(vcpu, 0);
 406                                 return;
 407                         }
 408                 }
 409                 /*
 410                  * We don't check reserved bits in nonpae mode, because
 411                  * this isn't enforced, and VMware depends on this.
 412                  */
 413         }
 414
 415         /*
 416          * Does the new cr3 value map to physical memory? (Note, we
 417          * catch an invalid cr3 even in real-mode, because it would
 418          * cause trouble later on when we turn on paging anyway.)
 419          *
 420          * A real CPU would silently accept an invalid cr3 and would
 421          * attempt to use it - with largely undefined (and often hard
 422          * to debug) behavior on the guest side.
 423          */
 424         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 425                 kvm_inject_gp(vcpu, 0);
 426         else {
 427                 vcpu->arch.cr3 = cr3;
 428                 vcpu->arch.mmu.new_cr3(vcpu);
 429         }
 430 }
 431 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 432
 433 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 434 {
 435         if (cr8 & CR8_RESERVED_BITS) {
 436                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 437                 kvm_inject_gp(vcpu, 0);
 438                 return;
 439         }
 440         if (irqchip_in_kernel(vcpu->kvm))
 441                 kvm_lapic_set_tpr(vcpu, cr8);
 442         else
 443                 vcpu->arch.cr8 = cr8;
 444 }
 445 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 446
 447 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 448 {
 449         if (irqchip_in_kernel(vcpu->kvm))
 450                 return kvm_lapic_get_cr8(vcpu);
 451         else
 452                 return vcpu->arch.cr8;
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 455
 456 static inline u32 bit(int bitno)
 457 {
 458         return 1 << (bitno & 31);
 459 }
 460
 461 /*
 462  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 463  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 464  *
 465  * This list is modified at module load time to reflect the
 466  * capabilities of the host cpu.
 467  */
 468 static u32 msrs_to_save[] = {
 469         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 470         MSR_K6_STAR,
 471 #ifdef CONFIG_X86_64
 472         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 473 #endif
 474         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 475         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 476 };
 477
 478 static unsigned num_msrs_to_save;
 479
 480 static u32 emulated_msrs[] = {
 481         MSR_IA32_MISC_ENABLE,
 482 };
 483
 484 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 485 {
 486         if (efer & efer_reserved_bits) {
 487                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 488                        efer);
 489                 kvm_inject_gp(vcpu, 0);
 490                 return;
 491         }
 492
 493         if (is_paging(vcpu)
 494             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 495                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 496                 kvm_inject_gp(vcpu, 0);
 497                 return;
 498         }
 499
 500         if (efer & EFER_FFXSR) {
 501                 struct kvm_cpuid_entry2 *feat;
 502
 503                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 504                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 505                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 506                         kvm_inject_gp(vcpu, 0);
 507                         return;
 508                 }
 509         }
 510
 511         if (efer & EFER_SVME) {
 512                 struct kvm_cpuid_entry2 *feat;
 513
 514                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 515                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 516                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 517                         kvm_inject_gp(vcpu, 0);
 518                         return;
 519                 }
 520         }
 521
 522         kvm_x86_ops->set_efer(vcpu, efer);
 523
 524         efer &= ~EFER_LMA;
 525         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 526
 527         vcpu->arch.shadow_efer = efer;
 528
 529         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 530         kvm_mmu_reset_context(vcpu);
 531 }
 532
 533 void kvm_enable_efer_bits(u64 mask)
 534 {
 535        efer_reserved_bits &= ~mask;
 536 }
 537 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 538
 539
 540 /*
 541  * Writes msr value into into the appropriate "register".
 542  * Returns 0 on success, non-0 otherwise.
 543  * Assumes vcpu_load() was already called.
 544  */
 545 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 546 {
 547         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 548 }
 549
 550 /*
 551  * Adapt set_msr() to msr_io()'s calling convention
 552  */
 553 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 554 {
 555         return kvm_set_msr(vcpu, index, *data);
 556 }
 557
 558 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 559 {
 560         static int version;
 561         struct pvclock_wall_clock wc;
 562         struct timespec now, sys, boot;
 563
 564         if (!wall_clock)
 565                 return;
 566
 567         version++;
 568
 569         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 570
 571         /*
 572          * The guest calculates current wall clock time by adding
 573          * system time (updated by kvm_write_guest_time below) to the
 574          * wall clock specified here.  guest system time equals host
 575          * system time for us, thus we must fill in host boot time here.
 576          */
 577         now = current_kernel_time();
 578         ktime_get_ts(&sys);
 579         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 580
 581         wc.sec = boot.tv_sec;
 582         wc.nsec = boot.tv_nsec;
 583         wc.version = version;
 584
 585         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 586
 587         version++;
 588         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 589 }
 590
 591 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 592 {
 593         uint32_t quotient, remainder;
 594
 595         /* Don't try to replace with do_div(), this one calculates
 596          * "(dividend << 32) / divisor" */
 597         __asm__ ( "divl %4"
 598                   : "=a" (quotient), "=d" (remainder)
 599                   : "0" (0), "1" (dividend), "r" (divisor) );
 600         return quotient;
 601 }
 602
 603 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 604 {
 605         uint64_t nsecs = 1000000000LL;
 606         int32_t  shift = 0;
 607         uint64_t tps64;
 608         uint32_t tps32;
 609
 610         tps64 = tsc_khz * 1000LL;
 611         while (tps64 > nsecs*2) {
 612                 tps64 >>= 1;
 613                 shift--;
 614         }
 615
 616         tps32 = (uint32_t)tps64;
 617         while (tps32 <= (uint32_t)nsecs) {
 618                 tps32 <<= 1;
 619                 shift++;
 620         }
 621
 622         hv_clock->tsc_shift = shift;
 623         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 624
 625         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 626                  __func__, tsc_khz, hv_clock->tsc_shift,
 627                  hv_clock->tsc_to_system_mul);
 628 }
 629
 630 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 631
 632 static void kvm_write_guest_time(struct kvm_vcpu *v)
 633 {
 634         struct timespec ts;
 635         unsigned long flags;
 636         struct kvm_vcpu_arch *vcpu = &v->arch;
 637         void *shared_kaddr;
 638         unsigned long this_tsc_khz;
 639
 640         if ((!vcpu->time_page))
 641                 return;
 642
 643         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 644         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 645                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 646                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 647         }
 648         put_cpu_var(cpu_tsc_khz);
 649
 650         /* Keep irq disabled to prevent changes to the clock */
 651         local_irq_save(flags);
 652         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 653         ktime_get_ts(&ts);
 654         local_irq_restore(flags);
 655
 656         /* With all the info we got, fill in the values */
 657
 658         vcpu->hv_clock.system_time = ts.tv_nsec +
 659                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 660         /*
 661          * The interface expects us to write an even number signaling that the
 662          * update is finished. Since the guest won't see the intermediate
 663          * state, we just increase by 2 at the end.
 664          */
 665         vcpu->hv_clock.version += 2;
 666
 667         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 668
 669         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 670                sizeof(vcpu->hv_clock));
 671
 672         kunmap_atomic(shared_kaddr, KM_USER0);
 673
 674         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 675 }
 676
 677 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 678 {
 679         struct kvm_vcpu_arch *vcpu = &v->arch;
 680
 681         if (!vcpu->time_page)
 682                 return 0;
 683         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 684         return 1;
 685 }
 686
 687 static bool msr_mtrr_valid(unsigned msr)
 688 {
 689         switch (msr) {
 690         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 691         case MSR_MTRRfix64K_00000:
 692         case MSR_MTRRfix16K_80000:
 693         case MSR_MTRRfix16K_A0000:
 694         case MSR_MTRRfix4K_C0000:
 695         case MSR_MTRRfix4K_C8000:
 696         case MSR_MTRRfix4K_D0000:
 697         case MSR_MTRRfix4K_D8000:
 698         case MSR_MTRRfix4K_E0000:
 699         case MSR_MTRRfix4K_E8000:
 700         case MSR_MTRRfix4K_F0000:
 701         case MSR_MTRRfix4K_F8000:
 702         case MSR_MTRRdefType:
 703         case MSR_IA32_CR_PAT:
 704                 return true;
 705         case 0x2f8:
 706                 return true;
 707         }
 708         return false;
 709 }
 710
 711 static bool valid_pat_type(unsigned t)
 712 {
 713         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 714 }
 715
 716 static bool valid_mtrr_type(unsigned t)
 717 {
 718         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 719 }
 720
 721 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 722 {
 723         int i;
 724
 725         if (!msr_mtrr_valid(msr))
 726                 return false;
 727
 728         if (msr == MSR_IA32_CR_PAT) {
 729                 for (i = 0; i < 8; i++)
 730                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 731                                 return false;
 732                 return true;
 733         } else if (msr == MSR_MTRRdefType) {
 734                 if (data & ~0xcff)
 735                         return false;
 736                 return valid_mtrr_type(data & 0xff);
 737         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 738                 for (i = 0; i < 8 ; i++)
 739                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 740                                 return false;
 741                 return true;
 742         }
 743
 744         /* variable MTRRs */
 745         return valid_mtrr_type(data & 0xff);
 746 }
 747
 748 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 749 {
 750         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 751
 752         if (!mtrr_valid(vcpu, msr, data))
 753                 return 1;
 754
 755         if (msr == MSR_MTRRdefType) {
 756                 vcpu->arch.mtrr_state.def_type = data;
 757                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 758         } else if (msr == MSR_MTRRfix64K_00000)
 759                 p[0] = data;
 760         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 761                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 762         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 763                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 764         else if (msr == MSR_IA32_CR_PAT)
 765                 vcpu->arch.pat = data;
 766         else {  /* Variable MTRRs */
 767                 int idx, is_mtrr_mask;
 768                 u64 *pt;
 769
 770                 idx = (msr - 0x200) / 2;
 771                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 772                 if (!is_mtrr_mask)
 773                         pt =
 774                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 775                 else
 776                         pt =
 777                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 778                 *pt = data;
 779         }
 780
 781         kvm_mmu_reset_context(vcpu);
 782         return 0;
 783 }
 784
 785 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 786 {
 787         u64 mcg_cap = vcpu->arch.mcg_cap;
 788         unsigned bank_num = mcg_cap & 0xff;
 789
 790         switch (msr) {
 791         case MSR_IA32_MCG_STATUS:
 792                 vcpu->arch.mcg_status = data;
 793                 break;
 794         case MSR_IA32_MCG_CTL:
 795                 if (!(mcg_cap & MCG_CTL_P))
 796                         return 1;
 797                 if (data != 0 && data != ~(u64)0)
 798                         return -1;
 799                 vcpu->arch.mcg_ctl = data;
 800                 break;
 801         default:
 802                 if (msr >= MSR_IA32_MC0_CTL &&
 803                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 804                         u32 offset = msr - MSR_IA32_MC0_CTL;
 805                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 806                         if ((offset & 0x3) == 0 &&
 807                             data != 0 && data != ~(u64)0)
 808                                 return -1;
 809                         vcpu->arch.mce_banks[offset] = data;
 810                         break;
 811                 }
 812                 return 1;
 813         }
 814         return 0;
 815 }
 816
 817 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 818 {
 819         switch (msr) {
 820         case MSR_EFER:
 821                 set_efer(vcpu, data);
 822                 break;
 823         case MSR_IA32_DEBUGCTLMSR:
 824                 if (!data) {
 825                         /* We support the non-activated case already */
 826                         break;
 827                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 828                         /* Values other than LBR and BTF are vendor-specific,
 829                            thus reserved and should throw a #GP */
 830                         return 1;
 831                 }
 832                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 833                         __func__, data);
 834                 break;
 835         case MSR_IA32_UCODE_REV:
 836         case MSR_IA32_UCODE_WRITE:
 837         case MSR_VM_HSAVE_PA:
 838                 break;
 839         case 0x200 ... 0x2ff:
 840                 return set_msr_mtrr(vcpu, msr, data);
 841         case MSR_IA32_APICBASE:
 842                 kvm_set_apic_base(vcpu, data);
 843                 break;
 844         case MSR_IA32_MISC_ENABLE:
 845                 vcpu->arch.ia32_misc_enable_msr = data;
 846                 break;
 847         case MSR_KVM_WALL_CLOCK:
 848                 vcpu->kvm->arch.wall_clock = data;
 849                 kvm_write_wall_clock(vcpu->kvm, data);
 850                 break;
 851         case MSR_KVM_SYSTEM_TIME: {
 852                 if (vcpu->arch.time_page) {
 853                         kvm_release_page_dirty(vcpu->arch.time_page);
 854                         vcpu->arch.time_page = NULL;
 855                 }
 856
 857                 vcpu->arch.time = data;
 858
 859                 /* we verify if the enable bit is set... */
 860                 if (!(data & 1))
 861                         break;
 862
 863                 /* ...but clean it before doing the actual write */
 864                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 865
 866                 vcpu->arch.time_page =
 867                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 868
 869                 if (is_error_page(vcpu->arch.time_page)) {
 870                         kvm_release_page_clean(vcpu->arch.time_page);
 871                         vcpu->arch.time_page = NULL;
 872                 }
 873
 874                 kvm_request_guest_time_update(vcpu);
 875                 break;
 876         }
 877         case MSR_IA32_MCG_CTL:
 878         case MSR_IA32_MCG_STATUS:
 879         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 880                 return set_msr_mce(vcpu, msr, data);
 881         default:
 882                 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
 883                 return 1;
 884         }
 885         return 0;
 886 }
 887 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 888
 889
 890 /*
 891  * Reads an msr value (of 'msr_index') into 'pdata'.
 892  * Returns 0 on success, non-0 otherwise.
 893  * Assumes vcpu_load() was already called.
 894  */
 895 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 896 {
 897         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 898 }
 899
 900 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 901 {
 902         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 903
 904         if (!msr_mtrr_valid(msr))
 905                 return 1;
 906
 907         if (msr == MSR_MTRRdefType)
 908                 *pdata = vcpu->arch.mtrr_state.def_type +
 909                          (vcpu->arch.mtrr_state.enabled << 10);
 910         else if (msr == MSR_MTRRfix64K_00000)
 911                 *pdata = p[0];
 912         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 913                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 914         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 915                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 916         else if (msr == MSR_IA32_CR_PAT)
 917                 *pdata = vcpu->arch.pat;
 918         else {  /* Variable MTRRs */
 919                 int idx, is_mtrr_mask;
 920                 u64 *pt;
 921
 922                 idx = (msr - 0x200) / 2;
 923                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 924                 if (!is_mtrr_mask)
 925                         pt =
 926                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 927                 else
 928                         pt =
 929                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 930                 *pdata = *pt;
 931         }
 932
 933         return 0;
 934 }
 935
 936 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 937 {
 938         u64 data;
 939         u64 mcg_cap = vcpu->arch.mcg_cap;
 940         unsigned bank_num = mcg_cap & 0xff;
 941
 942         switch (msr) {
 943         case MSR_IA32_P5_MC_ADDR:
 944         case MSR_IA32_P5_MC_TYPE:
 945                 data = 0;
 946                 break;
 947         case MSR_IA32_MCG_CAP:
 948                 data = vcpu->arch.mcg_cap;
 949                 break;
 950         case MSR_IA32_MCG_CTL:
 951                 if (!(mcg_cap & MCG_CTL_P))
 952                         return 1;
 953                 data = vcpu->arch.mcg_ctl;
 954                 break;
 955         case MSR_IA32_MCG_STATUS:
 956                 data = vcpu->arch.mcg_status;
 957                 break;
 958         default:
 959                 if (msr >= MSR_IA32_MC0_CTL &&
 960                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 961                         u32 offset = msr - MSR_IA32_MC0_CTL;
 962                         data = vcpu->arch.mce_banks[offset];
 963                         break;
 964                 }
 965                 return 1;
 966         }
 967         *pdata = data;
 968         return 0;
 969 }
 970
 971 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 972 {
 973         u64 data;
 974
 975         switch (msr) {
 976         case MSR_IA32_PLATFORM_ID:
 977         case MSR_IA32_UCODE_REV:
 978         case MSR_IA32_EBL_CR_POWERON:
 979         case MSR_IA32_DEBUGCTLMSR:
 980         case MSR_IA32_LASTBRANCHFROMIP:
 981         case MSR_IA32_LASTBRANCHTOIP:
 982         case MSR_IA32_LASTINTFROMIP:
 983         case MSR_IA32_LASTINTTOIP:
 984         case MSR_K8_SYSCFG:
 985         case MSR_K7_HWCR:
 986         case MSR_VM_HSAVE_PA:
 987         case MSR_P6_EVNTSEL0:
 988         case MSR_P6_EVNTSEL1:
 989         case MSR_K7_EVNTSEL0:
 990                 data = 0;
 991                 break;
 992         case MSR_MTRRcap:
 993                 data = 0x500 | KVM_NR_VAR_MTRR;
 994                 break;
 995         case 0x200 ... 0x2ff:
 996                 return get_msr_mtrr(vcpu, msr, pdata);
 997         case 0xcd: /* fsb frequency */
 998                 data = 3;
 999                 break;
1000         case MSR_IA32_APICBASE:
1001                 data = kvm_get_apic_base(vcpu);
1002                 break;
1003         case MSR_IA32_MISC_ENABLE:
1004                 data = vcpu->arch.ia32_misc_enable_msr;
1005                 break;
1006         case MSR_IA32_PERF_STATUS:
1007                 /* TSC increment by tick */
1008                 data = 1000ULL;
1009                 /* CPU multiplier */
1010                 data |= (((uint64_t)4ULL) << 40);
1011                 break;
1012         case MSR_EFER:
1013                 data = vcpu->arch.shadow_efer;
1014                 break;
1015         case MSR_KVM_WALL_CLOCK:
1016                 data = vcpu->kvm->arch.wall_clock;
1017                 break;
1018         case MSR_KVM_SYSTEM_TIME:
1019                 data = vcpu->arch.time;
1020                 break;
1021         case MSR_IA32_P5_MC_ADDR:
1022         case MSR_IA32_P5_MC_TYPE:
1023         case MSR_IA32_MCG_CAP:
1024         case MSR_IA32_MCG_CTL:
1025         case MSR_IA32_MCG_STATUS:
1026         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1027                 return get_msr_mce(vcpu, msr, pdata);
1028         default:
1029                 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1030                 return 1;
1031         }
1032         *pdata = data;
1033         return 0;
1034 }
1035 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1036
1037 /*
1038  * Read or write a bunch of msrs. All parameters are kernel addresses.
1039  *
1040  * @return number of msrs set successfully.
1041  */
1042 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1043                     struct kvm_msr_entry *entries,
1044                     int (*do_msr)(struct kvm_vcpu *vcpu,
1045                                   unsigned index, u64 *data))
1046 {
1047         int i;
1048
1049         vcpu_load(vcpu);
1050
1051         down_read(&vcpu->kvm->slots_lock);
1052         for (i = 0; i < msrs->nmsrs; ++i)
1053                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1054                         break;
1055         up_read(&vcpu->kvm->slots_lock);
1056
1057         vcpu_put(vcpu);
1058
1059         return i;
1060 }
1061
1062 /*
1063  * Read or write a bunch of msrs. Parameters are user addresses.
1064  *
1065  * @return number of msrs set successfully.
1066  */
1067 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1068                   int (*do_msr)(struct kvm_vcpu *vcpu,
1069                                 unsigned index, u64 *data),
1070                   int writeback)
1071 {
1072         struct kvm_msrs msrs;
1073         struct kvm_msr_entry *entries;
1074         int r, n;
1075         unsigned size;
1076
1077         r = -EFAULT;
1078         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1079                 goto out;
1080
1081         r = -E2BIG;
1082         if (msrs.nmsrs >= MAX_IO_MSRS)
1083                 goto out;
1084
1085         r = -ENOMEM;
1086         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1087         entries = vmalloc(size);
1088         if (!entries)
1089                 goto out;
1090
1091         r = -EFAULT;
1092         if (copy_from_user(entries, user_msrs->entries, size))
1093                 goto out_free;
1094
1095         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1096         if (r < 0)
1097                 goto out_free;
1098
1099         r = -EFAULT;
1100         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1101                 goto out_free;
1102
1103         r = n;
1104
1105 out_free:
1106         vfree(entries);
1107 out:
1108         return r;
1109 }
1110
1111 int kvm_dev_ioctl_check_extension(long ext)
1112 {
1113         int r;
1114
1115         switch (ext) {
1116         case KVM_CAP_IRQCHIP:
1117         case KVM_CAP_HLT:
1118         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1119         case KVM_CAP_SET_TSS_ADDR:
1120         case KVM_CAP_EXT_CPUID:
1121         case KVM_CAP_CLOCKSOURCE:
1122         case KVM_CAP_PIT:
1123         case KVM_CAP_NOP_IO_DELAY:
1124         case KVM_CAP_MP_STATE:
1125         case KVM_CAP_SYNC_MMU:
1126         case KVM_CAP_REINJECT_CONTROL:
1127         case KVM_CAP_IRQ_INJECT_STATUS:
1128         case KVM_CAP_ASSIGN_DEV_IRQ:
1129                 r = 1;
1130                 break;
1131         case KVM_CAP_COALESCED_MMIO:
1132                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1133                 break;
1134         case KVM_CAP_VAPIC:
1135                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1136                 break;
1137         case KVM_CAP_NR_VCPUS:
1138                 r = KVM_MAX_VCPUS;
1139                 break;
1140         case KVM_CAP_NR_MEMSLOTS:
1141                 r = KVM_MEMORY_SLOTS;
1142                 break;
1143         case KVM_CAP_PV_MMU:
1144                 r = !tdp_enabled;
1145                 break;
1146         case KVM_CAP_IOMMU:
1147                 r = iommu_found();
1148                 break;
1149         case KVM_CAP_MCE:
1150                 r = KVM_MAX_MCE_BANKS;
1151                 break;
1152         default:
1153                 r = 0;
1154                 break;
1155         }
1156         return r;
1157
1158 }
1159
1160 long kvm_arch_dev_ioctl(struct file *filp,
1161                         unsigned int ioctl, unsigned long arg)
1162 {
1163         void __user *argp = (void __user *)arg;
1164         long r;
1165
1166         switch (ioctl) {
1167         case KVM_GET_MSR_INDEX_LIST: {
1168                 struct kvm_msr_list __user *user_msr_list = argp;
1169                 struct kvm_msr_list msr_list;
1170                 unsigned n;
1171
1172                 r = -EFAULT;
1173                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1174                         goto out;
1175                 n = msr_list.nmsrs;
1176                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1177                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1178                         goto out;
1179                 r = -E2BIG;
1180                 if (n < msr_list.nmsrs)
1181                         goto out;
1182                 r = -EFAULT;
1183                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1184                                  num_msrs_to_save * sizeof(u32)))
1185                         goto out;
1186                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1187                                  &emulated_msrs,
1188                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1189                         goto out;
1190                 r = 0;
1191                 break;
1192         }
1193         case KVM_GET_SUPPORTED_CPUID: {
1194                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1195                 struct kvm_cpuid2 cpuid;
1196
1197                 r = -EFAULT;
1198                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1199                         goto out;
1200                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1201                                                       cpuid_arg->entries);
1202                 if (r)
1203                         goto out;
1204
1205                 r = -EFAULT;
1206                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1207                         goto out;
1208                 r = 0;
1209                 break;
1210         }
1211         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1212                 u64 mce_cap;
1213
1214                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1215                 r = -EFAULT;
1216                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1217                         goto out;
1218                 r = 0;
1219                 break;
1220         }
1221         default:
1222                 r = -EINVAL;
1223         }
1224 out:
1225         return r;
1226 }
1227
1228 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1229 {
1230         kvm_x86_ops->vcpu_load(vcpu, cpu);
1231         kvm_request_guest_time_update(vcpu);
1232 }
1233
1234 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1235 {
1236         kvm_x86_ops->vcpu_put(vcpu);
1237         kvm_put_guest_fpu(vcpu);
1238 }
1239
1240 static int is_efer_nx(void)
1241 {
1242         unsigned long long efer = 0;
1243
1244         rdmsrl_safe(MSR_EFER, &efer);
1245         return efer & EFER_NX;
1246 }
1247
1248 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1249 {
1250         int i;
1251         struct kvm_cpuid_entry2 *e, *entry;
1252
1253         entry = NULL;
1254         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1255                 e = &vcpu->arch.cpuid_entries[i];
1256                 if (e->function == 0x80000001) {
1257                         entry = e;
1258                         break;
1259                 }
1260         }
1261         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1262                 entry->edx &= ~(1 << 20);
1263                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1264         }
1265 }
1266
1267 /* when an old userspace process fills a new kernel module */
1268 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1269                                     struct kvm_cpuid *cpuid,
1270                                     struct kvm_cpuid_entry __user *entries)
1271 {
1272         int r, i;
1273         struct kvm_cpuid_entry *cpuid_entries;
1274
1275         r = -E2BIG;
1276         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1277                 goto out;
1278         r = -ENOMEM;
1279         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1280         if (!cpuid_entries)
1281                 goto out;
1282         r = -EFAULT;
1283         if (copy_from_user(cpuid_entries, entries,
1284                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1285                 goto out_free;
1286         for (i = 0; i < cpuid->nent; i++) {
1287                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1288                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1289                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1290                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1291                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1292                 vcpu->arch.cpuid_entries[i].index = 0;
1293                 vcpu->arch.cpuid_entries[i].flags = 0;
1294                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1295                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1296                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1297         }
1298         vcpu->arch.cpuid_nent = cpuid->nent;
1299         cpuid_fix_nx_cap(vcpu);
1300         r = 0;
1301
1302 out_free:
1303         vfree(cpuid_entries);
1304 out:
1305         return r;
1306 }
1307
1308 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1309                                      struct kvm_cpuid2 *cpuid,
1310                                      struct kvm_cpuid_entry2 __user *entries)
1311 {
1312         int r;
1313
1314         r = -E2BIG;
1315         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1316                 goto out;
1317         r = -EFAULT;
1318         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1319                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1320                 goto out;
1321         vcpu->arch.cpuid_nent = cpuid->nent;
1322         return 0;
1323
1324 out:
1325         return r;
1326 }
1327
1328 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1329                                      struct kvm_cpuid2 *cpuid,
1330                                      struct kvm_cpuid_entry2 __user *entries)
1331 {
1332         int r;
1333
1334         r = -E2BIG;
1335         if (cpuid->nent < vcpu->arch.cpuid_nent)
1336                 goto out;
1337         r = -EFAULT;
1338         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1339                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1340                 goto out;
1341         return 0;
1342
1343 out:
1344         cpuid->nent = vcpu->arch.cpuid_nent;
1345         return r;
1346 }
1347
1348 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1349                            u32 index)
1350 {
1351         entry->function = function;
1352         entry->index = index;
1353         cpuid_count(entry->function, entry->index,
1354                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1355         entry->flags = 0;
1356 }
1357
1358 #define F(x) bit(X86_FEATURE_##x)
1359
1360 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1361                          u32 index, int *nent, int maxnent)
1362 {
1363         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1364 #ifdef CONFIG_X86_64
1365         unsigned f_lm = F(LM);
1366 #else
1367         unsigned f_lm = 0;
1368 #endif
1369
1370         /* cpuid 1.edx */
1371         const u32 kvm_supported_word0_x86_features =
1372                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1373                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1374                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1375                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1376                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1377                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1378                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1379                 0 /* HTT, TM, Reserved, PBE */;
1380         /* cpuid 0x80000001.edx */
1381         const u32 kvm_supported_word1_x86_features =
1382                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1383                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1384                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1385                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1386                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1387                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1388                 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1389                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1390         /* cpuid 1.ecx */
1391         const u32 kvm_supported_word4_x86_features =
1392                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1393                 0 /* DS-CPL, VMX, SMX, EST */ |
1394                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1395                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1396                 0 /* Reserved, DCA */ | F(XMM4_1) |
1397                 F(XMM4_2) | 0 /* x2APIC */ | F(MOVBE) | F(POPCNT) |
1398                 0 /* Reserved, XSAVE, OSXSAVE */;
1399         /* cpuid 0x80000001.ecx */
1400         const u32 kvm_supported_word6_x86_features =
1401                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1402                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1403                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1404                 0 /* SKINIT */ | 0 /* WDT */;
1405
1406         /* all calls to cpuid_count() should be made on the same cpu */
1407         get_cpu();
1408         do_cpuid_1_ent(entry, function, index);
1409         ++*nent;
1410
1411         switch (function) {
1412         case 0:
1413                 entry->eax = min(entry->eax, (u32)0xb);
1414                 break;
1415         case 1:
1416                 entry->edx &= kvm_supported_word0_x86_features;
1417                 entry->ecx &= kvm_supported_word4_x86_features;
1418                 break;
1419         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1420          * may return different values. This forces us to get_cpu() before
1421          * issuing the first command, and also to emulate this annoying behavior
1422          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1423         case 2: {
1424                 int t, times = entry->eax & 0xff;
1425
1426                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1427                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1428                 for (t = 1; t < times && *nent < maxnent; ++t) {
1429                         do_cpuid_1_ent(&entry[t], function, 0);
1430                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1431                         ++*nent;
1432                 }
1433                 break;
1434         }
1435         /* function 4 and 0xb have additional index. */
1436         case 4: {
1437                 int i, cache_type;
1438
1439                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1440                 /* read more entries until cache_type is zero */
1441                 for (i = 1; *nent < maxnent; ++i) {
1442                         cache_type = entry[i - 1].eax & 0x1f;
1443                         if (!cache_type)
1444                                 break;
1445                         do_cpuid_1_ent(&entry[i], function, i);
1446                         entry[i].flags |=
1447                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1448                         ++*nent;
1449                 }
1450                 break;
1451         }
1452         case 0xb: {
1453                 int i, level_type;
1454
1455                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1456                 /* read more entries until level_type is zero */
1457                 for (i = 1; *nent < maxnent; ++i) {
1458                         level_type = entry[i - 1].ecx & 0xff00;
1459                         if (!level_type)
1460                                 break;
1461                         do_cpuid_1_ent(&entry[i], function, i);
1462                         entry[i].flags |=
1463                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1464                         ++*nent;
1465                 }
1466                 break;
1467         }
1468         case 0x80000000:
1469                 entry->eax = min(entry->eax, 0x8000001a);
1470                 break;
1471         case 0x80000001:
1472                 entry->edx &= kvm_supported_word1_x86_features;
1473                 entry->ecx &= kvm_supported_word6_x86_features;
1474                 break;
1475         }
1476         put_cpu();
1477 }
1478
1479 #undef F
1480
1481 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1482                                      struct kvm_cpuid_entry2 __user *entries)
1483 {
1484         struct kvm_cpuid_entry2 *cpuid_entries;
1485         int limit, nent = 0, r = -E2BIG;
1486         u32 func;
1487
1488         if (cpuid->nent < 1)
1489                 goto out;
1490         r = -ENOMEM;
1491         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1492         if (!cpuid_entries)
1493                 goto out;
1494
1495         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1496         limit = cpuid_entries[0].eax;
1497         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1498                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1499                              &nent, cpuid->nent);
1500         r = -E2BIG;
1501         if (nent >= cpuid->nent)
1502                 goto out_free;
1503
1504         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1505         limit = cpuid_entries[nent - 1].eax;
1506         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1507                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1508                              &nent, cpuid->nent);
1509         r = -E2BIG;
1510         if (nent >= cpuid->nent)
1511                 goto out_free;
1512
1513         r = -EFAULT;
1514         if (copy_to_user(entries, cpuid_entries,
1515                          nent * sizeof(struct kvm_cpuid_entry2)))
1516                 goto out_free;
1517         cpuid->nent = nent;
1518         r = 0;
1519
1520 out_free:
1521         vfree(cpuid_entries);
1522 out:
1523         return r;
1524 }
1525
1526 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1527                                     struct kvm_lapic_state *s)
1528 {
1529         vcpu_load(vcpu);
1530         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1531         vcpu_put(vcpu);
1532
1533         return 0;
1534 }
1535
1536 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1537                                     struct kvm_lapic_state *s)
1538 {
1539         vcpu_load(vcpu);
1540         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1541         kvm_apic_post_state_restore(vcpu);
1542         vcpu_put(vcpu);
1543
1544         return 0;
1545 }
1546
1547 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1548                                     struct kvm_interrupt *irq)
1549 {
1550         if (irq->irq < 0 || irq->irq >= 256)
1551                 return -EINVAL;
1552         if (irqchip_in_kernel(vcpu->kvm))
1553                 return -ENXIO;
1554         vcpu_load(vcpu);
1555
1556         kvm_queue_interrupt(vcpu, irq->irq, false);
1557
1558         vcpu_put(vcpu);
1559
1560         return 0;
1561 }
1562
1563 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1564 {
1565         vcpu_load(vcpu);
1566         kvm_inject_nmi(vcpu);
1567         vcpu_put(vcpu);
1568
1569         return 0;
1570 }
1571
1572 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1573                                            struct kvm_tpr_access_ctl *tac)
1574 {
1575         if (tac->flags)
1576                 return -EINVAL;
1577         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1578         return 0;
1579 }
1580
1581 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1582                                         u64 mcg_cap)
1583 {
1584         int r;
1585         unsigned bank_num = mcg_cap & 0xff, bank;
1586
1587         r = -EINVAL;
1588         if (!bank_num)
1589                 goto out;
1590         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1591                 goto out;
1592         r = 0;
1593         vcpu->arch.mcg_cap = mcg_cap;
1594         /* Init IA32_MCG_CTL to all 1s */
1595         if (mcg_cap & MCG_CTL_P)
1596                 vcpu->arch.mcg_ctl = ~(u64)0;
1597         /* Init IA32_MCi_CTL to all 1s */
1598         for (bank = 0; bank < bank_num; bank++)
1599                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1600 out:
1601         return r;
1602 }
1603
1604 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1605                                       struct kvm_x86_mce *mce)
1606 {
1607         u64 mcg_cap = vcpu->arch.mcg_cap;
1608         unsigned bank_num = mcg_cap & 0xff;
1609         u64 *banks = vcpu->arch.mce_banks;
1610
1611         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1612                 return -EINVAL;
1613         /*
1614          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1615          * reporting is disabled
1616          */
1617         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1618             vcpu->arch.mcg_ctl != ~(u64)0)
1619                 return 0;
1620         banks += 4 * mce->bank;
1621         /*
1622          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1623          * reporting is disabled for the bank
1624          */
1625         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1626                 return 0;
1627         if (mce->status & MCI_STATUS_UC) {
1628                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1629                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1630                         printk(KERN_DEBUG "kvm: set_mce: "
1631                                "injects mce exception while "
1632                                "previous one is in progress!\n");
1633                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1634                         return 0;
1635                 }
1636                 if (banks[1] & MCI_STATUS_VAL)
1637                         mce->status |= MCI_STATUS_OVER;
1638                 banks[2] = mce->addr;
1639                 banks[3] = mce->misc;
1640                 vcpu->arch.mcg_status = mce->mcg_status;
1641                 banks[1] = mce->status;
1642                 kvm_queue_exception(vcpu, MC_VECTOR);
1643         } else if (!(banks[1] & MCI_STATUS_VAL)
1644                    || !(banks[1] & MCI_STATUS_UC)) {
1645                 if (banks[1] & MCI_STATUS_VAL)
1646                         mce->status |= MCI_STATUS_OVER;
1647                 banks[2] = mce->addr;
1648                 banks[3] = mce->misc;
1649                 banks[1] = mce->status;
1650         } else
1651                 banks[1] |= MCI_STATUS_OVER;
1652         return 0;
1653 }
1654
1655 long kvm_arch_vcpu_ioctl(struct file *filp,
1656                          unsigned int ioctl, unsigned long arg)
1657 {
1658         struct kvm_vcpu *vcpu = filp->private_data;
1659         void __user *argp = (void __user *)arg;
1660         int r;
1661         struct kvm_lapic_state *lapic = NULL;
1662
1663         switch (ioctl) {
1664         case KVM_GET_LAPIC: {
1665                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1666
1667                 r = -ENOMEM;
1668                 if (!lapic)
1669                         goto out;
1670                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1671                 if (r)
1672                         goto out;
1673                 r = -EFAULT;
1674                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1675                         goto out;
1676                 r = 0;
1677                 break;
1678         }
1679         case KVM_SET_LAPIC: {
1680                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1681                 r = -ENOMEM;
1682                 if (!lapic)
1683                         goto out;
1684                 r = -EFAULT;
1685                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1686                         goto out;
1687                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1688                 if (r)
1689                         goto out;
1690                 r = 0;
1691                 break;
1692         }
1693         case KVM_INTERRUPT: {
1694                 struct kvm_interrupt irq;
1695
1696                 r = -EFAULT;
1697                 if (copy_from_user(&irq, argp, sizeof irq))
1698                         goto out;
1699                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1700                 if (r)
1701                         goto out;
1702                 r = 0;
1703                 break;
1704         }
1705         case KVM_NMI: {
1706                 r = kvm_vcpu_ioctl_nmi(vcpu);
1707                 if (r)
1708                         goto out;
1709                 r = 0;
1710                 break;
1711         }
1712         case KVM_SET_CPUID: {
1713                 struct kvm_cpuid __user *cpuid_arg = argp;
1714                 struct kvm_cpuid cpuid;
1715
1716                 r = -EFAULT;
1717                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1718                         goto out;
1719                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1720                 if (r)
1721                         goto out;
1722                 break;
1723         }
1724         case KVM_SET_CPUID2: {
1725                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1726                 struct kvm_cpuid2 cpuid;
1727
1728                 r = -EFAULT;
1729                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1730                         goto out;
1731                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1732                                               cpuid_arg->entries);
1733                 if (r)
1734                         goto out;
1735                 break;
1736         }
1737         case KVM_GET_CPUID2: {
1738                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1739                 struct kvm_cpuid2 cpuid;
1740
1741                 r = -EFAULT;
1742                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1743                         goto out;
1744                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1745                                               cpuid_arg->entries);
1746                 if (r)
1747                         goto out;
1748                 r = -EFAULT;
1749                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1750                         goto out;
1751                 r = 0;
1752                 break;
1753         }
1754         case KVM_GET_MSRS:
1755                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1756                 break;
1757         case KVM_SET_MSRS:
1758                 r = msr_io(vcpu, argp, do_set_msr, 0);
1759                 break;
1760         case KVM_TPR_ACCESS_REPORTING: {
1761                 struct kvm_tpr_access_ctl tac;
1762
1763                 r = -EFAULT;
1764                 if (copy_from_user(&tac, argp, sizeof tac))
1765                         goto out;
1766                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1767                 if (r)
1768                         goto out;
1769                 r = -EFAULT;
1770                 if (copy_to_user(argp, &tac, sizeof tac))
1771                         goto out;
1772                 r = 0;
1773                 break;
1774         };
1775         case KVM_SET_VAPIC_ADDR: {
1776                 struct kvm_vapic_addr va;
1777
1778                 r = -EINVAL;
1779                 if (!irqchip_in_kernel(vcpu->kvm))
1780                         goto out;
1781                 r = -EFAULT;
1782                 if (copy_from_user(&va, argp, sizeof va))
1783                         goto out;
1784                 r = 0;
1785                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1786                 break;
1787         }
1788         case KVM_X86_SETUP_MCE: {
1789                 u64 mcg_cap;
1790
1791                 r = -EFAULT;
1792                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1793                         goto out;
1794                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1795                 break;
1796         }
1797         case KVM_X86_SET_MCE: {
1798                 struct kvm_x86_mce mce;
1799
1800                 r = -EFAULT;
1801                 if (copy_from_user(&mce, argp, sizeof mce))
1802                         goto out;
1803                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1804                 break;
1805         }
1806         default:
1807                 r = -EINVAL;
1808         }
1809 out:
1810         kfree(lapic);
1811         return r;
1812 }
1813
1814 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1815 {
1816         int ret;
1817
1818         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1819                 return -1;
1820         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1821         return ret;
1822 }
1823
1824 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1825                                           u32 kvm_nr_mmu_pages)
1826 {
1827         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1828                 return -EINVAL;
1829
1830         down_write(&kvm->slots_lock);
1831         spin_lock(&kvm->mmu_lock);
1832
1833         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1834         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1835
1836         spin_unlock(&kvm->mmu_lock);
1837         up_write(&kvm->slots_lock);
1838         return 0;
1839 }
1840
1841 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1842 {
1843         return kvm->arch.n_alloc_mmu_pages;
1844 }
1845
1846 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1847 {
1848         int i;
1849         struct kvm_mem_alias *alias;
1850
1851         for (i = 0; i < kvm->arch.naliases; ++i) {
1852                 alias = &kvm->arch.aliases[i];
1853                 if (gfn >= alias->base_gfn
1854                     && gfn < alias->base_gfn + alias->npages)
1855                         return alias->target_gfn + gfn - alias->base_gfn;
1856         }
1857         return gfn;
1858 }
1859
1860 /*
1861  * Set a new alias region.  Aliases map a portion of physical memory into
1862  * another portion.  This is useful for memory windows, for example the PC
1863  * VGA region.
1864  */
1865 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1866                                          struct kvm_memory_alias *alias)
1867 {
1868         int r, n;
1869         struct kvm_mem_alias *p;
1870
1871         r = -EINVAL;
1872         /* General sanity checks */
1873         if (alias->memory_size & (PAGE_SIZE - 1))
1874                 goto out;
1875         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1876                 goto out;
1877         if (alias->slot >= KVM_ALIAS_SLOTS)
1878                 goto out;
1879         if (alias->guest_phys_addr + alias->memory_size
1880             < alias->guest_phys_addr)
1881                 goto out;
1882         if (alias->target_phys_addr + alias->memory_size
1883             < alias->target_phys_addr)
1884                 goto out;
1885
1886         down_write(&kvm->slots_lock);
1887         spin_lock(&kvm->mmu_lock);
1888
1889         p = &kvm->arch.aliases[alias->slot];
1890         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1891         p->npages = alias->memory_size >> PAGE_SHIFT;
1892         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1893
1894         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1895                 if (kvm->arch.aliases[n - 1].npages)
1896                         break;
1897         kvm->arch.naliases = n;
1898
1899         spin_unlock(&kvm->mmu_lock);
1900         kvm_mmu_zap_all(kvm);
1901
1902         up_write(&kvm->slots_lock);
1903
1904         return 0;
1905
1906 out:
1907         return r;
1908 }
1909
1910 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1911 {
1912         int r;
1913
1914         r = 0;
1915         switch (chip->chip_id) {
1916         case KVM_IRQCHIP_PIC_MASTER:
1917                 memcpy(&chip->chip.pic,
1918                         &pic_irqchip(kvm)->pics[0],
1919                         sizeof(struct kvm_pic_state));
1920                 break;
1921         case KVM_IRQCHIP_PIC_SLAVE:
1922                 memcpy(&chip->chip.pic,
1923                         &pic_irqchip(kvm)->pics[1],
1924                         sizeof(struct kvm_pic_state));
1925                 break;
1926         case KVM_IRQCHIP_IOAPIC:
1927                 memcpy(&chip->chip.ioapic,
1928                         ioapic_irqchip(kvm),
1929                         sizeof(struct kvm_ioapic_state));
1930                 break;
1931         default:
1932                 r = -EINVAL;
1933                 break;
1934         }
1935         return r;
1936 }
1937
1938 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1939 {
1940         int r;
1941
1942         r = 0;
1943         switch (chip->chip_id) {
1944         case KVM_IRQCHIP_PIC_MASTER:
1945                 memcpy(&pic_irqchip(kvm)->pics[0],
1946                         &chip->chip.pic,
1947                         sizeof(struct kvm_pic_state));
1948                 break;
1949         case KVM_IRQCHIP_PIC_SLAVE:
1950                 memcpy(&pic_irqchip(kvm)->pics[1],
1951                         &chip->chip.pic,
1952                         sizeof(struct kvm_pic_state));
1953                 break;
1954         case KVM_IRQCHIP_IOAPIC:
1955                 memcpy(ioapic_irqchip(kvm),
1956                         &chip->chip.ioapic,
1957                         sizeof(struct kvm_ioapic_state));
1958                 break;
1959         default:
1960                 r = -EINVAL;
1961                 break;
1962         }
1963         kvm_pic_update_irq(pic_irqchip(kvm));
1964         return r;
1965 }
1966
1967 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1968 {
1969         int r = 0;
1970
1971         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1972         return r;
1973 }
1974
1975 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1976 {
1977         int r = 0;
1978
1979         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1980         kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1981         return r;
1982 }
1983
1984 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1985                                  struct kvm_reinject_control *control)
1986 {
1987         if (!kvm->arch.vpit)
1988                 return -ENXIO;
1989         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1990         return 0;
1991 }
1992
1993 /*
1994  * Get (and clear) the dirty memory log for a memory slot.
1995  */
1996 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1997                                       struct kvm_dirty_log *log)
1998 {
1999         int r;
2000         int n;
2001         struct kvm_memory_slot *memslot;
2002         int is_dirty = 0;
2003
2004         down_write(&kvm->slots_lock);
2005
2006         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2007         if (r)
2008                 goto out;
2009
2010         /* If nothing is dirty, don't bother messing with page tables. */
2011         if (is_dirty) {
2012                 spin_lock(&kvm->mmu_lock);
2013                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2014                 spin_unlock(&kvm->mmu_lock);
2015                 kvm_flush_remote_tlbs(kvm);
2016                 memslot = &kvm->memslots[log->slot];
2017                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2018                 memset(memslot->dirty_bitmap, 0, n);
2019         }
2020         r = 0;
2021 out:
2022         up_write(&kvm->slots_lock);
2023         return r;
2024 }
2025
2026 long kvm_arch_vm_ioctl(struct file *filp,
2027                        unsigned int ioctl, unsigned long arg)
2028 {
2029         struct kvm *kvm = filp->private_data;
2030         void __user *argp = (void __user *)arg;
2031         int r = -EINVAL;
2032         /*
2033          * This union makes it completely explicit to gcc-3.x
2034          * that these two variables' stack usage should be
2035          * combined, not added together.
2036          */
2037         union {
2038                 struct kvm_pit_state ps;
2039                 struct kvm_memory_alias alias;
2040         } u;
2041
2042         switch (ioctl) {
2043         case KVM_SET_TSS_ADDR:
2044                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2045                 if (r < 0)
2046                         goto out;
2047                 break;
2048         case KVM_SET_MEMORY_REGION: {
2049                 struct kvm_memory_region kvm_mem;
2050                 struct kvm_userspace_memory_region kvm_userspace_mem;
2051
2052                 r = -EFAULT;
2053                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2054                         goto out;
2055                 kvm_userspace_mem.slot = kvm_mem.slot;
2056                 kvm_userspace_mem.flags = kvm_mem.flags;
2057                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2058                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2059                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2060                 if (r)
2061                         goto out;
2062                 break;
2063         }
2064         case KVM_SET_NR_MMU_PAGES:
2065                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2066                 if (r)
2067                         goto out;
2068                 break;
2069         case KVM_GET_NR_MMU_PAGES:
2070                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2071                 break;
2072         case KVM_SET_MEMORY_ALIAS:
2073                 r = -EFAULT;
2074                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2075                         goto out;
2076                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2077                 if (r)
2078                         goto out;
2079                 break;
2080         case KVM_CREATE_IRQCHIP:
2081                 r = -ENOMEM;
2082                 kvm->arch.vpic = kvm_create_pic(kvm);
2083                 if (kvm->arch.vpic) {
2084                         r = kvm_ioapic_init(kvm);
2085                         if (r) {
2086                                 kfree(kvm->arch.vpic);
2087                                 kvm->arch.vpic = NULL;
2088                                 goto out;
2089                         }
2090                 } else
2091                         goto out;
2092                 r = kvm_setup_default_irq_routing(kvm);
2093                 if (r) {
2094                         kfree(kvm->arch.vpic);
2095                         kfree(kvm->arch.vioapic);
2096                         goto out;
2097                 }
2098                 break;
2099         case KVM_CREATE_PIT:
2100                 mutex_lock(&kvm->lock);
2101                 r = -EEXIST;
2102                 if (kvm->arch.vpit)
2103                         goto create_pit_unlock;
2104                 r = -ENOMEM;
2105                 kvm->arch.vpit = kvm_create_pit(kvm);
2106                 if (kvm->arch.vpit)
2107                         r = 0;
2108         create_pit_unlock:
2109                 mutex_unlock(&kvm->lock);
2110                 break;
2111         case KVM_IRQ_LINE_STATUS:
2112         case KVM_IRQ_LINE: {
2113                 struct kvm_irq_level irq_event;
2114
2115                 r = -EFAULT;
2116                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2117                         goto out;
2118                 if (irqchip_in_kernel(kvm)) {
2119                         __s32 status;
2120                         mutex_lock(&kvm->lock);
2121                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2122                                         irq_event.irq, irq_event.level);
2123                         mutex_unlock(&kvm->lock);
2124                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2125                                 irq_event.status = status;
2126                                 if (copy_to_user(argp, &irq_event,
2127                                                         sizeof irq_event))
2128                                         goto out;
2129                         }
2130                         r = 0;
2131                 }
2132                 break;
2133         }
2134         case KVM_GET_IRQCHIP: {
2135                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2136                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2137
2138                 r = -ENOMEM;
2139                 if (!chip)
2140                         goto out;
2141                 r = -EFAULT;
2142                 if (copy_from_user(chip, argp, sizeof *chip))
2143                         goto get_irqchip_out;
2144                 r = -ENXIO;
2145                 if (!irqchip_in_kernel(kvm))
2146                         goto get_irqchip_out;
2147                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2148                 if (r)
2149                         goto get_irqchip_out;
2150                 r = -EFAULT;
2151                 if (copy_to_user(argp, chip, sizeof *chip))
2152                         goto get_irqchip_out;
2153                 r = 0;
2154         get_irqchip_out:
2155                 kfree(chip);
2156                 if (r)
2157                         goto out;
2158                 break;
2159         }
2160         case KVM_SET_IRQCHIP: {
2161                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2162                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2163
2164                 r = -ENOMEM;
2165                 if (!chip)
2166                         goto out;
2167                 r = -EFAULT;
2168                 if (copy_from_user(chip, argp, sizeof *chip))
2169                         goto set_irqchip_out;
2170                 r = -ENXIO;
2171                 if (!irqchip_in_kernel(kvm))
2172                         goto set_irqchip_out;
2173                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2174                 if (r)
2175                         goto set_irqchip_out;
2176                 r = 0;
2177         set_irqchip_out:
2178                 kfree(chip);
2179                 if (r)
2180                         goto out;
2181                 break;
2182         }
2183         case KVM_GET_PIT: {
2184                 r = -EFAULT;
2185                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2186                         goto out;
2187                 r = -ENXIO;
2188                 if (!kvm->arch.vpit)
2189                         goto out;
2190                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2191                 if (r)
2192                         goto out;
2193                 r = -EFAULT;
2194                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2195                         goto out;
2196                 r = 0;
2197                 break;
2198         }
2199         case KVM_SET_PIT: {
2200                 r = -EFAULT;
2201                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2202                         goto out;
2203                 r = -ENXIO;
2204                 if (!kvm->arch.vpit)
2205                         goto out;
2206                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2207                 if (r)
2208                         goto out;
2209                 r = 0;
2210                 break;
2211         }
2212         case KVM_REINJECT_CONTROL: {
2213                 struct kvm_reinject_control control;
2214                 r =  -EFAULT;
2215                 if (copy_from_user(&control, argp, sizeof(control)))
2216                         goto out;
2217                 r = kvm_vm_ioctl_reinject(kvm, &control);
2218                 if (r)
2219                         goto out;
2220                 r = 0;
2221                 break;
2222         }
2223         default:
2224                 ;
2225         }
2226 out:
2227         return r;
2228 }
2229
2230 static void kvm_init_msr_list(void)
2231 {
2232         u32 dummy[2];
2233         unsigned i, j;
2234
2235         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2236                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2237                         continue;
2238                 if (j < i)
2239                         msrs_to_save[j] = msrs_to_save[i];
2240                 j++;
2241         }
2242         num_msrs_to_save = j;
2243 }
2244
2245 /*
2246  * Only apic need an MMIO device hook, so shortcut now..
2247  */
2248 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2249                                                 gpa_t addr, int len,
2250                                                 int is_write)
2251 {
2252         struct kvm_io_device *dev;
2253
2254         if (vcpu->arch.apic) {
2255                 dev = &vcpu->arch.apic->dev;
2256                 if (dev->in_range(dev, addr, len, is_write))
2257                         return dev;
2258         }
2259         return NULL;
2260 }
2261
2262
2263 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2264                                                 gpa_t addr, int len,
2265                                                 int is_write)
2266 {
2267         struct kvm_io_device *dev;
2268
2269         dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2270         if (dev == NULL)
2271                 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2272                                           is_write);
2273         return dev;
2274 }
2275
2276 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2277                                struct kvm_vcpu *vcpu)
2278 {
2279         void *data = val;
2280         int r = X86EMUL_CONTINUE;
2281
2282         while (bytes) {
2283                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2284                 unsigned offset = addr & (PAGE_SIZE-1);
2285                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2286                 int ret;
2287
2288                 if (gpa == UNMAPPED_GVA) {
2289                         r = X86EMUL_PROPAGATE_FAULT;
2290                         goto out;
2291                 }
2292                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2293                 if (ret < 0) {
2294                         r = X86EMUL_UNHANDLEABLE;
2295                         goto out;
2296                 }
2297
2298                 bytes -= toread;
2299                 data += toread;
2300                 addr += toread;
2301         }
2302 out:
2303         return r;
2304 }
2305
2306 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2307                                 struct kvm_vcpu *vcpu)
2308 {
2309         void *data = val;
2310         int r = X86EMUL_CONTINUE;
2311
2312         while (bytes) {
2313                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2314                 unsigned offset = addr & (PAGE_SIZE-1);
2315                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2316                 int ret;
2317
2318                 if (gpa == UNMAPPED_GVA) {
2319                         r = X86EMUL_PROPAGATE_FAULT;
2320                         goto out;
2321                 }
2322                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2323                 if (ret < 0) {
2324                         r = X86EMUL_UNHANDLEABLE;
2325                         goto out;
2326                 }
2327
2328                 bytes -= towrite;
2329                 data += towrite;
2330                 addr += towrite;
2331         }
2332 out:
2333         return r;
2334 }
2335
2336
2337 static int emulator_read_emulated(unsigned long addr,
2338                                   void *val,
2339                                   unsigned int bytes,
2340                                   struct kvm_vcpu *vcpu)
2341 {
2342         struct kvm_io_device *mmio_dev;
2343         gpa_t                 gpa;
2344
2345         if (vcpu->mmio_read_completed) {
2346                 memcpy(val, vcpu->mmio_data, bytes);
2347                 vcpu->mmio_read_completed = 0;
2348                 return X86EMUL_CONTINUE;
2349         }
2350
2351         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2352
2353         /* For APIC access vmexit */
2354         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2355                 goto mmio;
2356
2357         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2358                                 == X86EMUL_CONTINUE)
2359                 return X86EMUL_CONTINUE;
2360         if (gpa == UNMAPPED_GVA)
2361                 return X86EMUL_PROPAGATE_FAULT;
2362
2363 mmio:
2364         /*
2365          * Is this MMIO handled locally?
2366          */
2367         mutex_lock(&vcpu->kvm->lock);
2368         mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2369         if (mmio_dev) {
2370                 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2371                 mutex_unlock(&vcpu->kvm->lock);
2372                 return X86EMUL_CONTINUE;
2373         }
2374         mutex_unlock(&vcpu->kvm->lock);
2375
2376         vcpu->mmio_needed = 1;
2377         vcpu->mmio_phys_addr = gpa;
2378         vcpu->mmio_size = bytes;
2379         vcpu->mmio_is_write = 0;
2380
2381         return X86EMUL_UNHANDLEABLE;
2382 }
2383
2384 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2385                           const void *val, int bytes)
2386 {
2387         int ret;
2388
2389         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2390         if (ret < 0)
2391                 return 0;
2392         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2393         return 1;
2394 }
2395
2396 static int emulator_write_emulated_onepage(unsigned long addr,
2397                                            const void *val,
2398                                            unsigned int bytes,
2399                                            struct kvm_vcpu *vcpu)
2400 {
2401         struct kvm_io_device *mmio_dev;
2402         gpa_t                 gpa;
2403
2404         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2405
2406         if (gpa == UNMAPPED_GVA) {
2407                 kvm_inject_page_fault(vcpu, addr, 2);
2408                 return X86EMUL_PROPAGATE_FAULT;
2409         }
2410
2411         /* For APIC access vmexit */
2412         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2413                 goto mmio;
2414
2415         if (emulator_write_phys(vcpu, gpa, val, bytes))
2416                 return X86EMUL_CONTINUE;
2417
2418 mmio:
2419         /*
2420          * Is this MMIO handled locally?
2421          */
2422         mutex_lock(&vcpu->kvm->lock);
2423         mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2424         if (mmio_dev) {
2425                 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2426                 mutex_unlock(&vcpu->kvm->lock);
2427                 return X86EMUL_CONTINUE;
2428         }
2429         mutex_unlock(&vcpu->kvm->lock);
2430
2431         vcpu->mmio_needed = 1;
2432         vcpu->mmio_phys_addr = gpa;
2433         vcpu->mmio_size = bytes;
2434         vcpu->mmio_is_write = 1;
2435         memcpy(vcpu->mmio_data, val, bytes);
2436
2437         return X86EMUL_CONTINUE;
2438 }
2439
2440 int emulator_write_emulated(unsigned long addr,
2441                                    const void *val,
2442                                    unsigned int bytes,
2443                                    struct kvm_vcpu *vcpu)
2444 {
2445         /* Crossing a page boundary? */
2446         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2447                 int rc, now;
2448
2449                 now = -addr & ~PAGE_MASK;
2450                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2451                 if (rc != X86EMUL_CONTINUE)
2452                         return rc;
2453                 addr += now;
2454                 val += now;
2455                 bytes -= now;
2456         }
2457         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2458 }
2459 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2460
2461 static int emulator_cmpxchg_emulated(unsigned long addr,
2462                                      const void *old,
2463                                      const void *new,
2464                                      unsigned int bytes,
2465                                      struct kvm_vcpu *vcpu)
2466 {
2467         static int reported;
2468
2469         if (!reported) {
2470                 reported = 1;
2471                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2472         }
2473 #ifndef CONFIG_X86_64
2474         /* guests cmpxchg8b have to be emulated atomically */
2475         if (bytes == 8) {
2476                 gpa_t gpa;
2477                 struct page *page;
2478                 char *kaddr;
2479                 u64 val;
2480
2481                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2482
2483                 if (gpa == UNMAPPED_GVA ||
2484                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2485                         goto emul_write;
2486
2487                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2488                         goto emul_write;
2489
2490                 val = *(u64 *)new;
2491
2492                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2493
2494                 kaddr = kmap_atomic(page, KM_USER0);
2495                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2496                 kunmap_atomic(kaddr, KM_USER0);
2497                 kvm_release_page_dirty(page);
2498         }
2499 emul_write:
2500 #endif
2501
2502         return emulator_write_emulated(addr, new, bytes, vcpu);
2503 }
2504
2505 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2506 {
2507         return kvm_x86_ops->get_segment_base(vcpu, seg);
2508 }
2509
2510 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2511 {
2512         kvm_mmu_invlpg(vcpu, address);
2513         return X86EMUL_CONTINUE;
2514 }
2515
2516 int emulate_clts(struct kvm_vcpu *vcpu)
2517 {
2518         KVMTRACE_0D(CLTS, vcpu, handler);
2519         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2520         return X86EMUL_CONTINUE;
2521 }
2522
2523 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2524 {
2525         struct kvm_vcpu *vcpu = ctxt->vcpu;
2526
2527         switch (dr) {
2528         case 0 ... 3:
2529                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2530                 return X86EMUL_CONTINUE;
2531         default:
2532                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2533                 return X86EMUL_UNHANDLEABLE;
2534         }
2535 }
2536
2537 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2538 {
2539         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2540         int exception;
2541
2542         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2543         if (exception) {
2544                 /* FIXME: better handling */
2545                 return X86EMUL_UNHANDLEABLE;
2546         }
2547         return X86EMUL_CONTINUE;
2548 }
2549
2550 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2551 {
2552         u8 opcodes[4];
2553         unsigned long rip = kvm_rip_read(vcpu);
2554         unsigned long rip_linear;
2555
2556         if (!printk_ratelimit())
2557                 return;
2558
2559         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2560
2561         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2562
2563         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2564                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2565 }
2566 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2567
2568 static struct x86_emulate_ops emulate_ops = {
2569         .read_std            = kvm_read_guest_virt,
2570         .read_emulated       = emulator_read_emulated,
2571         .write_emulated      = emulator_write_emulated,
2572         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2573 };
2574
2575 static void cache_all_regs(struct kvm_vcpu *vcpu)
2576 {
2577         kvm_register_read(vcpu, VCPU_REGS_RAX);
2578         kvm_register_read(vcpu, VCPU_REGS_RSP);
2579         kvm_register_read(vcpu, VCPU_REGS_RIP);
2580         vcpu->arch.regs_dirty = ~0;
2581 }
2582
2583 int emulate_instruction(struct kvm_vcpu *vcpu,
2584                         struct kvm_run *run,
2585                         unsigned long cr2,
2586                         u16 error_code,
2587                         int emulation_type)
2588 {
2589         int r, shadow_mask;
2590         struct decode_cache *c;
2591
2592         kvm_clear_exception_queue(vcpu);
2593         vcpu->arch.mmio_fault_cr2 = cr2;
2594         /*
2595          * TODO: fix x86_emulate.c to use guest_read/write_register
2596          * instead of direct ->regs accesses, can save hundred cycles
2597          * on Intel for instructions that don't read/change RSP, for
2598          * for example.
2599          */
2600         cache_all_regs(vcpu);
2601
2602         vcpu->mmio_is_write = 0;
2603         vcpu->arch.pio.string = 0;
2604
2605         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2606                 int cs_db, cs_l;
2607                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2608
2609                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2610                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2611                 vcpu->arch.emulate_ctxt.mode =
2612                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2613                         ? X86EMUL_MODE_REAL : cs_l
2614                         ? X86EMUL_MODE_PROT64 : cs_db
2615                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2616
2617                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2618
2619                 /* Reject the instructions other than VMCALL/VMMCALL when
2620                  * try to emulate invalid opcode */
2621                 c = &vcpu->arch.emulate_ctxt.decode;
2622                 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2623                     (!(c->twobyte && c->b == 0x01 &&
2624                       (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2625                        c->modrm_mod == 3 && c->modrm_rm == 1)))
2626                         return EMULATE_FAIL;
2627
2628                 ++vcpu->stat.insn_emulation;
2629                 if (r)  {
2630                         ++vcpu->stat.insn_emulation_fail;
2631                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2632                                 return EMULATE_DONE;
2633                         return EMULATE_FAIL;
2634                 }
2635         }
2636
2637         if (emulation_type & EMULTYPE_SKIP) {
2638                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2639                 return EMULATE_DONE;
2640         }
2641
2642         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2643         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2644
2645         if (r == 0)
2646                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2647
2648         if (vcpu->arch.pio.string)
2649                 return EMULATE_DO_MMIO;
2650
2651         if ((r || vcpu->mmio_is_write) && run) {
2652                 run->exit_reason = KVM_EXIT_MMIO;
2653                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2654                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2655                 run->mmio.len = vcpu->mmio_size;
2656                 run->mmio.is_write = vcpu->mmio_is_write;
2657         }
2658
2659         if (r) {
2660                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2661                         return EMULATE_DONE;
2662                 if (!vcpu->mmio_needed) {
2663                         kvm_report_emulation_failure(vcpu, "mmio");
2664                         return EMULATE_FAIL;
2665                 }
2666                 return EMULATE_DO_MMIO;
2667         }
2668
2669         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2670
2671         if (vcpu->mmio_is_write) {
2672                 vcpu->mmio_needed = 0;
2673                 return EMULATE_DO_MMIO;
2674         }
2675
2676         return EMULATE_DONE;
2677 }
2678 EXPORT_SYMBOL_GPL(emulate_instruction);
2679
2680 static int pio_copy_data(struct kvm_vcpu *vcpu)
2681 {
2682         void *p = vcpu->arch.pio_data;
2683         gva_t q = vcpu->arch.pio.guest_gva;
2684         unsigned bytes;
2685         int ret;
2686
2687         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2688         if (vcpu->arch.pio.in)
2689                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2690         else
2691                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2692         return ret;
2693 }
2694
2695 int complete_pio(struct kvm_vcpu *vcpu)
2696 {
2697         struct kvm_pio_request *io = &vcpu->arch.pio;
2698         long delta;
2699         int r;
2700         unsigned long val;
2701
2702         if (!io->string) {
2703                 if (io->in) {
2704                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2705                         memcpy(&val, vcpu->arch.pio_data, io->size);
2706                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2707                 }
2708         } else {
2709                 if (io->in) {
2710                         r = pio_copy_data(vcpu);
2711                         if (r)
2712                                 return r;
2713                 }
2714
2715                 delta = 1;
2716                 if (io->rep) {
2717                         delta *= io->cur_count;
2718                         /*
2719                          * The size of the register should really depend on
2720                          * current address size.
2721                          */
2722                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2723                         val -= delta;
2724                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2725                 }
2726                 if (io->down)
2727                         delta = -delta;
2728                 delta *= io->size;
2729                 if (io->in) {
2730                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2731                         val += delta;
2732                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2733                 } else {
2734                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2735                         val += delta;
2736                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2737                 }
2738         }
2739
2740         io->count -= io->cur_count;
2741         io->cur_count = 0;
2742
2743         return 0;
2744 }
2745
2746 static void kernel_pio(struct kvm_io_device *pio_dev,
2747                        struct kvm_vcpu *vcpu,
2748                        void *pd)
2749 {
2750         /* TODO: String I/O for in kernel device */
2751
2752         mutex_lock(&vcpu->kvm->lock);
2753         if (vcpu->arch.pio.in)
2754                 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2755                                   vcpu->arch.pio.size,
2756                                   pd);
2757         else
2758                 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2759                                    vcpu->arch.pio.size,
2760                                    pd);
2761         mutex_unlock(&vcpu->kvm->lock);
2762 }
2763
2764 static void pio_string_write(struct kvm_io_device *pio_dev,
2765                              struct kvm_vcpu *vcpu)
2766 {
2767         struct kvm_pio_request *io = &vcpu->arch.pio;
2768         void *pd = vcpu->arch.pio_data;
2769         int i;
2770
2771         mutex_lock(&vcpu->kvm->lock);
2772         for (i = 0; i < io->cur_count; i++) {
2773                 kvm_iodevice_write(pio_dev, io->port,
2774                                    io->size,
2775                                    pd);
2776                 pd += io->size;
2777         }
2778         mutex_unlock(&vcpu->kvm->lock);
2779 }
2780
2781 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2782                                                gpa_t addr, int len,
2783                                                int is_write)
2784 {
2785         return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2786 }
2787
2788 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2789                   int size, unsigned port)
2790 {
2791         struct kvm_io_device *pio_dev;
2792         unsigned long val;
2793
2794         vcpu->run->exit_reason = KVM_EXIT_IO;
2795         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2796         vcpu->run->io.size = vcpu->arch.pio.size = size;
2797         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2798         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2799         vcpu->run->io.port = vcpu->arch.pio.port = port;
2800         vcpu->arch.pio.in = in;
2801         vcpu->arch.pio.string = 0;
2802         vcpu->arch.pio.down = 0;
2803         vcpu->arch.pio.rep = 0;
2804
2805         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2806                 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2807                             handler);
2808         else
2809                 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2810                             handler);
2811
2812         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2813         memcpy(vcpu->arch.pio_data, &val, 4);
2814
2815         pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2816         if (pio_dev) {
2817                 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2818                 complete_pio(vcpu);
2819                 return 1;
2820         }
2821         return 0;
2822 }
2823 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2824
2825 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2826                   int size, unsigned long count, int down,
2827                   gva_t address, int rep, unsigned port)
2828 {
2829         unsigned now, in_page;
2830         int ret = 0;
2831         struct kvm_io_device *pio_dev;
2832
2833         vcpu->run->exit_reason = KVM_EXIT_IO;
2834         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2835         vcpu->run->io.size = vcpu->arch.pio.size = size;
2836         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2837         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2838         vcpu->run->io.port = vcpu->arch.pio.port = port;
2839         vcpu->arch.pio.in = in;
2840         vcpu->arch.pio.string = 1;
2841         vcpu->arch.pio.down = down;
2842         vcpu->arch.pio.rep = rep;
2843
2844         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2845                 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2846                             handler);
2847         else
2848                 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2849                             handler);
2850
2851         if (!count) {
2852                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2853                 return 1;
2854         }
2855
2856         if (!down)
2857                 in_page = PAGE_SIZE - offset_in_page(address);
2858         else
2859                 in_page = offset_in_page(address) + size;
2860         now = min(count, (unsigned long)in_page / size);
2861         if (!now)
2862                 now = 1;
2863         if (down) {
2864                 /*
2865                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
2866                  */
2867                 pr_unimpl(vcpu, "guest string pio down\n");
2868                 kvm_inject_gp(vcpu, 0);
2869                 return 1;
2870         }
2871         vcpu->run->io.count = now;
2872         vcpu->arch.pio.cur_count = now;
2873
2874         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2875                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2876
2877         vcpu->arch.pio.guest_gva = address;
2878
2879         pio_dev = vcpu_find_pio_dev(vcpu, port,
2880                                     vcpu->arch.pio.cur_count,
2881                                     !vcpu->arch.pio.in);
2882         if (!vcpu->arch.pio.in) {
2883                 /* string PIO write */
2884                 ret = pio_copy_data(vcpu);
2885                 if (ret == X86EMUL_PROPAGATE_FAULT) {
2886                         kvm_inject_gp(vcpu, 0);
2887                         return 1;
2888                 }
2889                 if (ret == 0 && pio_dev) {
2890                         pio_string_write(pio_dev, vcpu);
2891                         complete_pio(vcpu);
2892                         if (vcpu->arch.pio.count == 0)
2893                                 ret = 1;
2894                 }
2895         } else if (pio_dev)
2896                 pr_unimpl(vcpu, "no string pio read support yet, "
2897                        "port %x size %d count %ld\n",
2898                         port, size, count);
2899
2900         return ret;
2901 }
2902 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2903
2904 static void bounce_off(void *info)
2905 {
2906         /* nothing */
2907 }
2908
2909 static unsigned int  ref_freq;
2910 static unsigned long tsc_khz_ref;
2911
2912 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2913                                      void *data)
2914 {
2915         struct cpufreq_freqs *freq = data;
2916         struct kvm *kvm;
2917         struct kvm_vcpu *vcpu;
2918         int i, send_ipi = 0;
2919
2920         if (!ref_freq)
2921                 ref_freq = freq->old;
2922
2923         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2924                 return 0;
2925         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2926                 return 0;
2927         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2928
2929         spin_lock(&kvm_lock);
2930         list_for_each_entry(kvm, &vm_list, vm_list) {
2931                 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2932                         vcpu = kvm->vcpus[i];
2933                         if (!vcpu)
2934                                 continue;
2935                         if (vcpu->cpu != freq->cpu)
2936                                 continue;
2937                         if (!kvm_request_guest_time_update(vcpu))
2938                                 continue;
2939                         if (vcpu->cpu != smp_processor_id())
2940                                 send_ipi++;
2941                 }
2942         }
2943         spin_unlock(&kvm_lock);
2944
2945         if (freq->old < freq->new && send_ipi) {
2946                 /*
2947                  * We upscale the frequency.  Must make the guest
2948                  * doesn't see old kvmclock values while running with
2949                  * the new frequency, otherwise we risk the guest sees
2950                  * time go backwards.
2951                  *
2952                  * In case we update the frequency for another cpu
2953                  * (which might be in guest context) send an interrupt
2954                  * to kick the cpu out of guest context.  Next time
2955                  * guest context is entered kvmclock will be updated,
2956                  * so the guest will not see stale values.
2957                  */
2958                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2959         }
2960         return 0;
2961 }
2962
2963 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2964         .notifier_call  = kvmclock_cpufreq_notifier
2965 };
2966
2967 int kvm_arch_init(void *opaque)
2968 {
2969         int r, cpu;
2970         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2971
2972         if (kvm_x86_ops) {
2973                 printk(KERN_ERR "kvm: already loaded the other module\n");
2974                 r = -EEXIST;
2975                 goto out;
2976         }
2977
2978         if (!ops->cpu_has_kvm_support()) {
2979                 printk(KERN_ERR "kvm: no hardware support\n");
2980                 r = -EOPNOTSUPP;
2981                 goto out;
2982         }
2983         if (ops->disabled_by_bios()) {
2984                 printk(KERN_ERR "kvm: disabled by bios\n");
2985                 r = -EOPNOTSUPP;
2986                 goto out;
2987         }
2988
2989         r = kvm_mmu_module_init();
2990         if (r)
2991                 goto out;
2992
2993         kvm_init_msr_list();
2994
2995         kvm_x86_ops = ops;
2996         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2997         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2998         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2999                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3000
3001         for_each_possible_cpu(cpu)
3002                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3003         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3004                 tsc_khz_ref = tsc_khz;
3005                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3006                                           CPUFREQ_TRANSITION_NOTIFIER);
3007         }
3008
3009         return 0;
3010
3011 out:
3012         return r;
3013 }
3014
3015 void kvm_arch_exit(void)
3016 {
3017         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3018                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3019                                             CPUFREQ_TRANSITION_NOTIFIER);
3020         kvm_x86_ops = NULL;
3021         kvm_mmu_module_exit();
3022 }
3023
3024 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3025 {
3026         ++vcpu->stat.halt_exits;
3027         KVMTRACE_0D(HLT, vcpu, handler);
3028         if (irqchip_in_kernel(vcpu->kvm)) {
3029                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3030                 return 1;
3031         } else {
3032                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3033                 return 0;
3034         }
3035 }
3036 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3037
3038 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3039                            unsigned long a1)
3040 {
3041         if (is_long_mode(vcpu))
3042                 return a0;
3043         else
3044                 return a0 | ((gpa_t)a1 << 32);
3045 }
3046
3047 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3048 {
3049         unsigned long nr, a0, a1, a2, a3, ret;
3050         int r = 1;
3051
3052         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3053         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3054         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3055         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3056         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3057
3058         KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
3059
3060         if (!is_long_mode(vcpu)) {
3061                 nr &= 0xFFFFFFFF;
3062                 a0 &= 0xFFFFFFFF;
3063                 a1 &= 0xFFFFFFFF;
3064                 a2 &= 0xFFFFFFFF;
3065                 a3 &= 0xFFFFFFFF;
3066         }
3067
3068         switch (nr) {
3069         case KVM_HC_VAPIC_POLL_IRQ:
3070                 ret = 0;
3071                 break;
3072         case KVM_HC_MMU_OP:
3073                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3074                 break;
3075         default:
3076                 ret = -KVM_ENOSYS;
3077                 break;
3078         }
3079         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3080         ++vcpu->stat.hypercalls;
3081         return r;
3082 }
3083 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3084
3085 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3086 {
3087         char instruction[3];
3088         int ret = 0;
3089         unsigned long rip = kvm_rip_read(vcpu);
3090
3091
3092         /*
3093          * Blow out the MMU to ensure that no other VCPU has an active mapping
3094          * to ensure that the updated hypercall appears atomically across all
3095          * VCPUs.
3096          */
3097         kvm_mmu_zap_all(vcpu->kvm);
3098
3099         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3100         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3101             != X86EMUL_CONTINUE)
3102                 ret = -EFAULT;
3103
3104         return ret;
3105 }
3106
3107 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3108 {
3109         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3110 }
3111
3112 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3113 {
3114         struct descriptor_table dt = { limit, base };
3115
3116         kvm_x86_ops->set_gdt(vcpu, &dt);
3117 }
3118
3119 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3120 {
3121         struct descriptor_table dt = { limit, base };
3122
3123         kvm_x86_ops->set_idt(vcpu, &dt);
3124 }
3125
3126 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3127                    unsigned long *rflags)
3128 {
3129         kvm_lmsw(vcpu, msw);
3130         *rflags = kvm_x86_ops->get_rflags(vcpu);
3131 }
3132
3133 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3134 {
3135         unsigned long value;
3136
3137         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3138         switch (cr) {
3139         case 0:
3140                 value = vcpu->arch.cr0;
3141                 break;
3142         case 2:
3143                 value = vcpu->arch.cr2;
3144                 break;
3145         case 3:
3146                 value = vcpu->arch.cr3;
3147                 break;
3148         case 4:
3149                 value = vcpu->arch.cr4;
3150                 break;
3151         case 8:
3152                 value = kvm_get_cr8(vcpu);
3153                 break;
3154         default:
3155                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3156                 return 0;
3157         }
3158         KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
3159                     (u32)((u64)value >> 32), handler);
3160
3161         return value;
3162 }
3163
3164 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3165                      unsigned long *rflags)
3166 {
3167         KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
3168                     (u32)((u64)val >> 32), handler);
3169
3170         switch (cr) {
3171         case 0:
3172                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3173                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3174                 break;
3175         case 2:
3176                 vcpu->arch.cr2 = val;
3177                 break;
3178         case 3:
3179                 kvm_set_cr3(vcpu, val);
3180                 break;
3181         case 4:
3182                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3183                 break;
3184         case 8:
3185                 kvm_set_cr8(vcpu, val & 0xfUL);
3186                 break;
3187         default:
3188                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3189         }
3190 }
3191
3192 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3193 {
3194         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3195         int j, nent = vcpu->arch.cpuid_nent;
3196
3197         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3198         /* when no next entry is found, the current entry[i] is reselected */
3199         for (j = i + 1; ; j = (j + 1) % nent) {
3200                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3201                 if (ej->function == e->function) {
3202                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3203                         return j;
3204                 }
3205         }
3206         return 0; /* silence gcc, even though control never reaches here */
3207 }
3208
3209 /* find an entry with matching function, matching index (if needed), and that
3210  * should be read next (if it's stateful) */
3211 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3212         u32 function, u32 index)
3213 {
3214         if (e->function != function)
3215                 return 0;
3216         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3217                 return 0;
3218         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3219             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3220                 return 0;
3221         return 1;
3222 }
3223
3224 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3225                                               u32 function, u32 index)
3226 {
3227         int i;
3228         struct kvm_cpuid_entry2 *best = NULL;
3229
3230         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3231                 struct kvm_cpuid_entry2 *e;
3232
3233                 e = &vcpu->arch.cpuid_entries[i];
3234                 if (is_matching_cpuid_entry(e, function, index)) {
3235                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3236                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3237                         best = e;
3238                         break;
3239                 }
3240                 /*
3241                  * Both basic or both extended?
3242                  */
3243                 if (((e->function ^ function) & 0x80000000) == 0)
3244                         if (!best || e->function > best->function)
3245                                 best = e;
3246         }
3247         return best;
3248 }
3249
3250 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3251 {
3252         struct kvm_cpuid_entry2 *best;
3253
3254         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3255         if (best)
3256                 return best->eax & 0xff;
3257         return 36;
3258 }
3259
3260 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3261 {
3262         u32 function, index;
3263         struct kvm_cpuid_entry2 *best;
3264
3265         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3266         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3267         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3268         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3269         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3270         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3271         best = kvm_find_cpuid_entry(vcpu, function, index);
3272         if (best) {
3273                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3274                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3275                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3276                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3277         }
3278         kvm_x86_ops->skip_emulated_instruction(vcpu);
3279         KVMTRACE_5D(CPUID, vcpu, function,
3280                     (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3281                     (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3282                     (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3283                     (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3284 }
3285 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3286
3287 /*
3288  * Check if userspace requested an interrupt window, and that the
3289  * interrupt window is open.
3290  *
3291  * No need to exit to userspace if we already have an interrupt queued.
3292  */
3293 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3294                                           struct kvm_run *kvm_run)
3295 {
3296         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3297                 kvm_run->request_interrupt_window &&
3298                 kvm_arch_interrupt_allowed(vcpu));
3299 }
3300
3301 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3302                               struct kvm_run *kvm_run)
3303 {
3304         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3305         kvm_run->cr8 = kvm_get_cr8(vcpu);
3306         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3307         if (irqchip_in_kernel(vcpu->kvm))
3308                 kvm_run->ready_for_interrupt_injection = 1;
3309         else
3310                 kvm_run->ready_for_interrupt_injection =
3311                         kvm_arch_interrupt_allowed(vcpu) &&
3312                         !kvm_cpu_has_interrupt(vcpu) &&
3313                         !kvm_event_needs_reinjection(vcpu);
3314 }
3315
3316 static void vapic_enter(struct kvm_vcpu *vcpu)
3317 {
3318         struct kvm_lapic *apic = vcpu->arch.apic;
3319         struct page *page;
3320
3321         if (!apic || !apic->vapic_addr)
3322                 return;
3323
3324         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3325
3326         vcpu->arch.apic->vapic_page = page;
3327 }
3328
3329 static void vapic_exit(struct kvm_vcpu *vcpu)
3330 {
3331         struct kvm_lapic *apic = vcpu->arch.apic;
3332
3333         if (!apic || !apic->vapic_addr)
3334                 return;
3335
3336         down_read(&vcpu->kvm->slots_lock);
3337         kvm_release_page_dirty(apic->vapic_page);
3338         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3339         up_read(&vcpu->kvm->slots_lock);
3340 }
3341
3342 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3343 {
3344         int max_irr, tpr;
3345
3346         if (!kvm_x86_ops->update_cr8_intercept)
3347                 return;
3348
3349         if (!vcpu->arch.apic->vapic_addr)
3350                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3351         else
3352                 max_irr = -1;
3353
3354         if (max_irr != -1)
3355                 max_irr >>= 4;
3356
3357         tpr = kvm_lapic_get_cr8(vcpu);
3358
3359         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3360 }
3361
3362 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3363 {
3364         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3365                 kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
3366
3367         /* try to reinject previous events if any */
3368         if (vcpu->arch.nmi_injected) {
3369                 kvm_x86_ops->set_nmi(vcpu);
3370                 return;
3371         }
3372
3373         if (vcpu->arch.interrupt.pending) {
3374                 kvm_x86_ops->set_irq(vcpu);
3375                 return;
3376         }
3377
3378         /* try to inject new event if pending */
3379         if (vcpu->arch.nmi_pending) {
3380                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3381                         vcpu->arch.nmi_pending = false;
3382                         vcpu->arch.nmi_injected = true;
3383                         kvm_x86_ops->set_nmi(vcpu);
3384                 }
3385         } else if (kvm_cpu_has_interrupt(vcpu)) {
3386                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3387                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3388                                             false);
3389                         kvm_x86_ops->set_irq(vcpu);
3390                 }
3391         }
3392 }
3393
3394 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3395 {
3396         int r;
3397         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3398                 kvm_run->request_interrupt_window;
3399
3400         if (vcpu->requests)
3401                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3402                         kvm_mmu_unload(vcpu);
3403
3404         r = kvm_mmu_reload(vcpu);
3405         if (unlikely(r))
3406                 goto out;
3407
3408         if (vcpu->requests) {
3409                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3410                         __kvm_migrate_timers(vcpu);
3411                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3412                         kvm_write_guest_time(vcpu);
3413                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3414                         kvm_mmu_sync_roots(vcpu);
3415                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3416                         kvm_x86_ops->tlb_flush(vcpu);
3417                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3418                                        &vcpu->requests)) {
3419                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3420                         r = 0;
3421                         goto out;
3422                 }
3423                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3424                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3425                         r = 0;
3426                         goto out;
3427                 }
3428         }
3429
3430         preempt_disable();
3431
3432         kvm_x86_ops->prepare_guest_switch(vcpu);
3433         kvm_load_guest_fpu(vcpu);
3434
3435         local_irq_disable();
3436
3437         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3438         smp_mb__after_clear_bit();
3439
3440         if (vcpu->requests || need_resched() || signal_pending(current)) {
3441                 local_irq_enable();
3442                 preempt_enable();
3443                 r = 1;
3444                 goto out;
3445         }
3446
3447         if (vcpu->arch.exception.pending)
3448                 __queue_exception(vcpu);
3449         else
3450                 inject_pending_irq(vcpu, kvm_run);
3451
3452         /* enable NMI/IRQ window open exits if needed */
3453         if (vcpu->arch.nmi_pending)
3454                 kvm_x86_ops->enable_nmi_window(vcpu);
3455         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3456                 kvm_x86_ops->enable_irq_window(vcpu);
3457
3458         if (kvm_lapic_enabled(vcpu)) {
3459                 update_cr8_intercept(vcpu);
3460                 kvm_lapic_sync_to_vapic(vcpu);
3461         }
3462
3463         up_read(&vcpu->kvm->slots_lock);
3464
3465         kvm_guest_enter();
3466
3467         get_debugreg(vcpu->arch.host_dr6, 6);
3468         get_debugreg(vcpu->arch.host_dr7, 7);
3469         if (unlikely(vcpu->arch.switch_db_regs)) {
3470                 get_debugreg(vcpu->arch.host_db[0], 0);
3471                 get_debugreg(vcpu->arch.host_db[1], 1);
3472                 get_debugreg(vcpu->arch.host_db[2], 2);
3473                 get_debugreg(vcpu->arch.host_db[3], 3);
3474
3475                 set_debugreg(0, 7);
3476                 set_debugreg(vcpu->arch.eff_db[0], 0);
3477                 set_debugreg(vcpu->arch.eff_db[1], 1);
3478                 set_debugreg(vcpu->arch.eff_db[2], 2);
3479                 set_debugreg(vcpu->arch.eff_db[3], 3);
3480         }
3481
3482         KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3483         kvm_x86_ops->run(vcpu, kvm_run);
3484
3485         if (unlikely(vcpu->arch.switch_db_regs)) {
3486                 set_debugreg(0, 7);
3487                 set_debugreg(vcpu->arch.host_db[0], 0);
3488                 set_debugreg(vcpu->arch.host_db[1], 1);
3489                 set_debugreg(vcpu->arch.host_db[2], 2);
3490                 set_debugreg(vcpu->arch.host_db[3], 3);
3491         }
3492         set_debugreg(vcpu->arch.host_dr6, 6);
3493         set_debugreg(vcpu->arch.host_dr7, 7);
3494
3495         set_bit(KVM_REQ_KICK, &vcpu->requests);
3496         local_irq_enable();
3497
3498         ++vcpu->stat.exits;
3499
3500         /*
3501          * We must have an instruction between local_irq_enable() and
3502          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3503          * the interrupt shadow.  The stat.exits increment will do nicely.
3504          * But we need to prevent reordering, hence this barrier():
3505          */
3506         barrier();
3507
3508         kvm_guest_exit();
3509
3510         preempt_enable();
3511
3512         down_read(&vcpu->kvm->slots_lock);
3513
3514         /*
3515          * Profile KVM exit RIPs:
3516          */
3517         if (unlikely(prof_on == KVM_PROFILING)) {
3518                 unsigned long rip = kvm_rip_read(vcpu);
3519                 profile_hit(KVM_PROFILING, (void *)rip);
3520         }
3521
3522
3523         kvm_lapic_sync_from_vapic(vcpu);
3524
3525         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3526 out:
3527         return r;
3528 }
3529
3530
3531 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3532 {
3533         int r;
3534
3535         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3536                 pr_debug("vcpu %d received sipi with vector # %x\n",
3537                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3538                 kvm_lapic_reset(vcpu);
3539                 r = kvm_arch_vcpu_reset(vcpu);
3540                 if (r)
3541                         return r;
3542                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3543         }
3544
3545         down_read(&vcpu->kvm->slots_lock);
3546         vapic_enter(vcpu);
3547
3548         r = 1;
3549         while (r > 0) {
3550                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3551                         r = vcpu_enter_guest(vcpu, kvm_run);
3552                 else {
3553                         up_read(&vcpu->kvm->slots_lock);
3554                         kvm_vcpu_block(vcpu);
3555                         down_read(&vcpu->kvm->slots_lock);
3556                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3557                         {
3558                                 switch(vcpu->arch.mp_state) {
3559                                 case KVM_MP_STATE_HALTED:
3560                                         vcpu->arch.mp_state =
3561                                                 KVM_MP_STATE_RUNNABLE;
3562                                 case KVM_MP_STATE_RUNNABLE:
3563                                         break;
3564                                 case KVM_MP_STATE_SIPI_RECEIVED:
3565                                 default:
3566                                         r = -EINTR;
3567                                         break;
3568                                 }
3569                         }
3570                 }
3571
3572                 if (r <= 0)
3573                         break;
3574
3575                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3576                 if (kvm_cpu_has_pending_timer(vcpu))
3577                         kvm_inject_pending_timer_irqs(vcpu);
3578
3579                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3580                         r = -EINTR;
3581                         kvm_run->exit_reason = KVM_EXIT_INTR;
3582                         ++vcpu->stat.request_irq_exits;
3583                 }
3584                 if (signal_pending(current)) {
3585                         r = -EINTR;
3586                         kvm_run->exit_reason = KVM_EXIT_INTR;
3587                         ++vcpu->stat.signal_exits;
3588                 }
3589                 if (need_resched()) {
3590                         up_read(&vcpu->kvm->slots_lock);
3591                         kvm_resched(vcpu);
3592                         down_read(&vcpu->kvm->slots_lock);
3593                 }
3594         }
3595
3596         up_read(&vcpu->kvm->slots_lock);
3597         post_kvm_run_save(vcpu, kvm_run);
3598
3599         vapic_exit(vcpu);
3600
3601         return r;
3602 }
3603
3604 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3605 {
3606         int r;
3607         sigset_t sigsaved;
3608
3609         vcpu_load(vcpu);
3610
3611         if (vcpu->sigset_active)
3612                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3613
3614         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3615                 kvm_vcpu_block(vcpu);
3616                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3617                 r = -EAGAIN;
3618                 goto out;
3619         }
3620
3621         /* re-sync apic's tpr */
3622         if (!irqchip_in_kernel(vcpu->kvm))
3623                 kvm_set_cr8(vcpu, kvm_run->cr8);
3624
3625         if (vcpu->arch.pio.cur_count) {
3626                 r = complete_pio(vcpu);
3627                 if (r)
3628                         goto out;
3629         }
3630 #if CONFIG_HAS_IOMEM
3631         if (vcpu->mmio_needed) {
3632                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3633                 vcpu->mmio_read_completed = 1;
3634                 vcpu->mmio_needed = 0;
3635
3636                 down_read(&vcpu->kvm->slots_lock);
3637                 r = emulate_instruction(vcpu, kvm_run,
3638                                         vcpu->arch.mmio_fault_cr2, 0,
3639                                         EMULTYPE_NO_DECODE);
3640                 up_read(&vcpu->kvm->slots_lock);
3641                 if (r == EMULATE_DO_MMIO) {
3642                         /*
3643                          * Read-modify-write.  Back to userspace.
3644                          */
3645                         r = 0;
3646                         goto out;
3647                 }
3648         }
3649 #endif
3650         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3651                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3652                                      kvm_run->hypercall.ret);
3653
3654         r = __vcpu_run(vcpu, kvm_run);
3655
3656 out:
3657         if (vcpu->sigset_active)
3658                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3659
3660         vcpu_put(vcpu);
3661         return r;
3662 }
3663
3664 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3665 {
3666         vcpu_load(vcpu);
3667
3668         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3669         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3670         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3671         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3672         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3673         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3674         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3675         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3676 #ifdef CONFIG_X86_64
3677         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3678         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3679         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3680         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3681         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3682         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3683         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3684         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3685 #endif
3686
3687         regs->rip = kvm_rip_read(vcpu);
3688         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3689
3690         /*
3691          * Don't leak debug flags in case they were set for guest debugging
3692          */
3693         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3694                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3695
3696         vcpu_put(vcpu);
3697
3698         return 0;
3699 }
3700
3701 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3702 {
3703         vcpu_load(vcpu);
3704
3705         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3706         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3707         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3708         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3709         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3710         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3711         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3712         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3713 #ifdef CONFIG_X86_64
3714         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3715         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3716         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3717         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3718         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3719         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3720         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3721         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3722
3723 #endif
3724
3725         kvm_rip_write(vcpu, regs->rip);
3726         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3727
3728
3729         vcpu->arch.exception.pending = false;
3730
3731         vcpu_put(vcpu);
3732
3733         return 0;
3734 }
3735
3736 void kvm_get_segment(struct kvm_vcpu *vcpu,
3737                      struct kvm_segment *var, int seg)
3738 {
3739         kvm_x86_ops->get_segment(vcpu, var, seg);
3740 }
3741
3742 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3743 {
3744         struct kvm_segment cs;
3745
3746         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3747         *db = cs.db;
3748         *l = cs.l;
3749 }
3750 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3751
3752 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3753                                   struct kvm_sregs *sregs)
3754 {
3755         struct descriptor_table dt;
3756
3757         vcpu_load(vcpu);
3758
3759         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3760         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3761         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3762         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3763         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3764         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3765
3766         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3767         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3768
3769         kvm_x86_ops->get_idt(vcpu, &dt);
3770         sregs->idt.limit = dt.limit;
3771         sregs->idt.base = dt.base;
3772         kvm_x86_ops->get_gdt(vcpu, &dt);
3773         sregs->gdt.limit = dt.limit;
3774         sregs->gdt.base = dt.base;
3775
3776         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3777         sregs->cr0 = vcpu->arch.cr0;
3778         sregs->cr2 = vcpu->arch.cr2;
3779         sregs->cr3 = vcpu->arch.cr3;
3780         sregs->cr4 = vcpu->arch.cr4;
3781         sregs->cr8 = kvm_get_cr8(vcpu);
3782         sregs->efer = vcpu->arch.shadow_efer;
3783         sregs->apic_base = kvm_get_apic_base(vcpu);
3784
3785         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3786
3787         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3788                 set_bit(vcpu->arch.interrupt.nr,
3789                         (unsigned long *)sregs->interrupt_bitmap);
3790
3791         vcpu_put(vcpu);
3792
3793         return 0;
3794 }
3795
3796 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3797                                     struct kvm_mp_state *mp_state)
3798 {
3799         vcpu_load(vcpu);
3800         mp_state->mp_state = vcpu->arch.mp_state;
3801         vcpu_put(vcpu);
3802         return 0;
3803 }
3804
3805 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3806                                     struct kvm_mp_state *mp_state)
3807 {
3808         vcpu_load(vcpu);
3809         vcpu->arch.mp_state = mp_state->mp_state;
3810         vcpu_put(vcpu);
3811         return 0;
3812 }
3813
3814 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3815                         struct kvm_segment *var, int seg)
3816 {
3817         kvm_x86_ops->set_segment(vcpu, var, seg);
3818 }
3819
3820 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3821                                    struct kvm_segment *kvm_desct)
3822 {
3823         kvm_desct->base = seg_desc->base0;
3824         kvm_desct->base |= seg_desc->base1 << 16;
3825         kvm_desct->base |= seg_desc->base2 << 24;
3826         kvm_desct->limit = seg_desc->limit0;
3827         kvm_desct->limit |= seg_desc->limit << 16;
3828         if (seg_desc->g) {
3829                 kvm_desct->limit <<= 12;
3830                 kvm_desct->limit |= 0xfff;
3831         }
3832         kvm_desct->selector = selector;
3833         kvm_desct->type = seg_desc->type;
3834         kvm_desct->present = seg_desc->p;
3835         kvm_desct->dpl = seg_desc->dpl;
3836         kvm_desct->db = seg_desc->d;
3837         kvm_desct->s = seg_desc->s;
3838         kvm_desct->l = seg_desc->l;
3839         kvm_desct->g = seg_desc->g;
3840         kvm_desct->avl = seg_desc->avl;
3841         if (!selector)
3842                 kvm_desct->unusable = 1;
3843         else
3844                 kvm_desct->unusable = 0;
3845         kvm_desct->padding = 0;
3846 }
3847
3848 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3849                                           u16 selector,
3850                                           struct descriptor_table *dtable)
3851 {
3852         if (selector & 1 << 2) {
3853                 struct kvm_segment kvm_seg;
3854
3855                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3856
3857                 if (kvm_seg.unusable)
3858                         dtable->limit = 0;
3859                 else
3860                         dtable->limit = kvm_seg.limit;
3861                 dtable->base = kvm_seg.base;
3862         }
3863         else
3864                 kvm_x86_ops->get_gdt(vcpu, dtable);
3865 }
3866
3867 /* allowed just for 8 bytes segments */
3868 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3869                                          struct desc_struct *seg_desc)
3870 {
3871         gpa_t gpa;
3872         struct descriptor_table dtable;
3873         u16 index = selector >> 3;
3874
3875         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3876
3877         if (dtable.limit < index * 8 + 7) {
3878                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3879                 return 1;
3880         }
3881         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3882         gpa += index * 8;
3883         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3884 }
3885
3886 /* allowed just for 8 bytes segments */
3887 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3888                                          struct desc_struct *seg_desc)
3889 {
3890         gpa_t gpa;
3891         struct descriptor_table dtable;
3892         u16 index = selector >> 3;
3893
3894         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3895
3896         if (dtable.limit < index * 8 + 7)
3897                 return 1;
3898         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3899         gpa += index * 8;
3900         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3901 }
3902
3903 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3904                              struct desc_struct *seg_desc)
3905 {
3906         u32 base_addr;
3907
3908         base_addr = seg_desc->base0;
3909         base_addr |= (seg_desc->base1 << 16);
3910         base_addr |= (seg_desc->base2 << 24);
3911
3912         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3913 }
3914
3915 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3916 {
3917         struct kvm_segment kvm_seg;
3918
3919         kvm_get_segment(vcpu, &kvm_seg, seg);
3920         return kvm_seg.selector;
3921 }
3922
3923 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3924                                                 u16 selector,
3925                                                 struct kvm_segment *kvm_seg)
3926 {
3927         struct desc_struct seg_desc;
3928
3929         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3930                 return 1;
3931         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3932         return 0;
3933 }
3934
3935 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3936 {
3937         struct kvm_segment segvar = {
3938                 .base = selector << 4,
3939                 .limit = 0xffff,
3940                 .selector = selector,
3941                 .type = 3,
3942                 .present = 1,
3943                 .dpl = 3,
3944                 .db = 0,
3945                 .s = 1,
3946                 .l = 0,
3947                 .g = 0,
3948                 .avl = 0,
3949                 .unusable = 0,
3950         };
3951         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3952         return 0;
3953 }
3954
3955 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3956                                 int type_bits, int seg)
3957 {
3958         struct kvm_segment kvm_seg;
3959
3960         if (!(vcpu->arch.cr0 & X86_CR0_PE))
3961                 return kvm_load_realmode_segment(vcpu, selector, seg);
3962         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3963                 return 1;
3964         kvm_seg.type |= type_bits;
3965
3966         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3967             seg != VCPU_SREG_LDTR)
3968                 if (!kvm_seg.s)
3969                         kvm_seg.unusable = 1;
3970
3971         kvm_set_segment(vcpu, &kvm_seg, seg);
3972         return 0;
3973 }
3974
3975 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3976                                 struct tss_segment_32 *tss)
3977 {
3978         tss->cr3 = vcpu->arch.cr3;
3979         tss->eip = kvm_rip_read(vcpu);
3980         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3981         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3982         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3983         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3984         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3985         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3986         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3987         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3988         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3989         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3990         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3991         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3992         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3993         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3994         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3995         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3996 }
3997
3998 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3999                                   struct tss_segment_32 *tss)
4000 {
4001         kvm_set_cr3(vcpu, tss->cr3);
4002
4003         kvm_rip_write(vcpu, tss->eip);
4004         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4005
4006         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4007         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4008         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4009         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4010         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4011         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4012         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4013         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4014
4015         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4016                 return 1;
4017
4018         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4019                 return 1;
4020
4021         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4022                 return 1;
4023
4024         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4025                 return 1;
4026
4027         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4028                 return 1;
4029
4030         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4031                 return 1;
4032
4033         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4034                 return 1;
4035         return 0;
4036 }
4037
4038 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4039                                 struct tss_segment_16 *tss)
4040 {
4041         tss->ip = kvm_rip_read(vcpu);
4042         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4043         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4044         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4045         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4046         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4047         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4048         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4049         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4050         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4051
4052         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4053         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4054         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4055         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4056         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4057         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4058 }
4059
4060 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4061                                  struct tss_segment_16 *tss)
4062 {
4063         kvm_rip_write(vcpu, tss->ip);
4064         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4065         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4066         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4067         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4068         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4069         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4070         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4071         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4072         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4073
4074         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4075                 return 1;
4076
4077         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4078                 return 1;
4079
4080         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4081                 return 1;
4082
4083         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4084                 return 1;
4085
4086         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4087                 return 1;
4088         return 0;
4089 }
4090
4091 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4092                               u16 old_tss_sel, u32 old_tss_base,
4093                               struct desc_struct *nseg_desc)
4094 {
4095         struct tss_segment_16 tss_segment_16;
4096         int ret = 0;
4097
4098         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4099                            sizeof tss_segment_16))
4100                 goto out;
4101
4102         save_state_to_tss16(vcpu, &tss_segment_16);
4103
4104         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4105                             sizeof tss_segment_16))
4106                 goto out;
4107
4108         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4109                            &tss_segment_16, sizeof tss_segment_16))
4110                 goto out;
4111
4112         if (old_tss_sel != 0xffff) {
4113                 tss_segment_16.prev_task_link = old_tss_sel;
4114
4115                 if (kvm_write_guest(vcpu->kvm,
4116                                     get_tss_base_addr(vcpu, nseg_desc),
4117                                     &tss_segment_16.prev_task_link,
4118                                     sizeof tss_segment_16.prev_task_link))
4119                         goto out;
4120         }
4121
4122         if (load_state_from_tss16(vcpu, &tss_segment_16))
4123                 goto out;
4124
4125         ret = 1;
4126 out:
4127         return ret;
4128 }
4129
4130 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4131                        u16 old_tss_sel, u32 old_tss_base,
4132                        struct desc_struct *nseg_desc)
4133 {
4134         struct tss_segment_32 tss_segment_32;
4135         int ret = 0;
4136
4137         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4138                            sizeof tss_segment_32))
4139                 goto out;
4140
4141         save_state_to_tss32(vcpu, &tss_segment_32);
4142
4143         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4144                             sizeof tss_segment_32))
4145                 goto out;
4146
4147         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4148                            &tss_segment_32, sizeof tss_segment_32))
4149                 goto out;
4150
4151         if (old_tss_sel != 0xffff) {
4152                 tss_segment_32.prev_task_link = old_tss_sel;
4153
4154                 if (kvm_write_guest(vcpu->kvm,
4155                                     get_tss_base_addr(vcpu, nseg_desc),
4156                                     &tss_segment_32.prev_task_link,
4157                                     sizeof tss_segment_32.prev_task_link))
4158                         goto out;
4159         }
4160
4161         if (load_state_from_tss32(vcpu, &tss_segment_32))
4162                 goto out;
4163
4164         ret = 1;
4165 out:
4166         return ret;
4167 }
4168
4169 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4170 {
4171         struct kvm_segment tr_seg;
4172         struct desc_struct cseg_desc;
4173         struct desc_struct nseg_desc;
4174         int ret = 0;
4175         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4176         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4177
4178         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4179
4180         /* FIXME: Handle errors. Failure to read either TSS or their
4181          * descriptors should generate a pagefault.
4182          */
4183         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4184                 goto out;
4185
4186         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4187                 goto out;
4188
4189         if (reason != TASK_SWITCH_IRET) {
4190                 int cpl;
4191
4192                 cpl = kvm_x86_ops->get_cpl(vcpu);
4193                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4194                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4195                         return 1;
4196                 }
4197         }
4198
4199         if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4200                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4201                 return 1;
4202         }
4203
4204         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4205                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4206                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4207         }
4208
4209         if (reason == TASK_SWITCH_IRET) {
4210                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4211                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4212         }
4213
4214         /* set back link to prev task only if NT bit is set in eflags
4215            note that old_tss_sel is not used afetr this point */
4216         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4217                 old_tss_sel = 0xffff;
4218
4219         /* set back link to prev task only if NT bit is set in eflags
4220            note that old_tss_sel is not used afetr this point */
4221         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4222                 old_tss_sel = 0xffff;
4223
4224         if (nseg_desc.type & 8)
4225                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4226                                          old_tss_base, &nseg_desc);
4227         else
4228                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4229                                          old_tss_base, &nseg_desc);
4230
4231         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4232                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4233                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4234         }
4235
4236         if (reason != TASK_SWITCH_IRET) {
4237                 nseg_desc.type |= (1 << 1);
4238                 save_guest_segment_descriptor(vcpu, tss_selector,
4239                                               &nseg_desc);
4240         }
4241
4242         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4243         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4244         tr_seg.type = 11;
4245         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4246 out:
4247         return ret;
4248 }
4249 EXPORT_SYMBOL_GPL(kvm_task_switch);
4250
4251 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4252                                   struct kvm_sregs *sregs)
4253 {
4254         int mmu_reset_needed = 0;
4255         int pending_vec, max_bits;
4256         struct descriptor_table dt;
4257
4258         vcpu_load(vcpu);
4259
4260         dt.limit = sregs->idt.limit;
4261         dt.base = sregs->idt.base;
4262         kvm_x86_ops->set_idt(vcpu, &dt);
4263         dt.limit = sregs->gdt.limit;
4264         dt.base = sregs->gdt.base;
4265         kvm_x86_ops->set_gdt(vcpu, &dt);
4266
4267         vcpu->arch.cr2 = sregs->cr2;
4268         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4269
4270         down_read(&vcpu->kvm->slots_lock);
4271         if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4272                 vcpu->arch.cr3 = sregs->cr3;
4273         else
4274                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4275         up_read(&vcpu->kvm->slots_lock);
4276
4277         kvm_set_cr8(vcpu, sregs->cr8);
4278
4279         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4280         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4281         kvm_set_apic_base(vcpu, sregs->apic_base);
4282
4283         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4284
4285         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4286         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4287         vcpu->arch.cr0 = sregs->cr0;
4288
4289         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4290         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4291         if (!is_long_mode(vcpu) && is_pae(vcpu))
4292                 load_pdptrs(vcpu, vcpu->arch.cr3);
4293
4294         if (mmu_reset_needed)
4295                 kvm_mmu_reset_context(vcpu);
4296
4297         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4298         pending_vec = find_first_bit(
4299                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4300         if (pending_vec < max_bits) {
4301                 kvm_queue_interrupt(vcpu, pending_vec, false);
4302                 pr_debug("Set back pending irq %d\n", pending_vec);
4303                 if (irqchip_in_kernel(vcpu->kvm))
4304                         kvm_pic_clear_isr_ack(vcpu->kvm);
4305         }
4306
4307         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4308         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4309         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4310         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4311         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4312         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4313
4314         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4315         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4316
4317         /* Older userspace won't unhalt the vcpu on reset. */
4318         if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4319             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4320             !(vcpu->arch.cr0 & X86_CR0_PE))
4321                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4322
4323         vcpu_put(vcpu);
4324
4325         return 0;
4326 }
4327
4328 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4329                                         struct kvm_guest_debug *dbg)
4330 {
4331         int i, r;
4332
4333         vcpu_load(vcpu);
4334
4335         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4336             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4337                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4338                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4339                 vcpu->arch.switch_db_regs =
4340                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4341         } else {
4342                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4343                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4344                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4345         }
4346
4347         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4348
4349         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4350                 kvm_queue_exception(vcpu, DB_VECTOR);
4351         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4352                 kvm_queue_exception(vcpu, BP_VECTOR);
4353
4354         vcpu_put(vcpu);
4355
4356         return r;
4357 }
4358
4359 /*
4360  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4361  * we have asm/x86/processor.h
4362  */
4363 struct fxsave {
4364         u16     cwd;
4365         u16     swd;
4366         u16     twd;
4367         u16     fop;
4368         u64     rip;
4369         u64     rdp;
4370         u32     mxcsr;
4371         u32     mxcsr_mask;
4372         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4373 #ifdef CONFIG_X86_64
4374         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4375 #else
4376         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4377 #endif
4378 };
4379
4380 /*
4381  * Translate a guest virtual address to a guest physical address.
4382  */
4383 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4384                                     struct kvm_translation *tr)
4385 {
4386         unsigned long vaddr = tr->linear_address;
4387         gpa_t gpa;
4388
4389         vcpu_load(vcpu);
4390         down_read(&vcpu->kvm->slots_lock);
4391         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4392         up_read(&vcpu->kvm->slots_lock);
4393         tr->physical_address = gpa;
4394         tr->valid = gpa != UNMAPPED_GVA;
4395         tr->writeable = 1;
4396         tr->usermode = 0;
4397         vcpu_put(vcpu);
4398
4399         return 0;
4400 }
4401
4402 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4403 {
4404         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4405
4406         vcpu_load(vcpu);
4407
4408         memcpy(fpu->fpr, fxsave->st_space, 128);
4409         fpu->fcw = fxsave->cwd;
4410         fpu->fsw = fxsave->swd;
4411         fpu->ftwx = fxsave->twd;
4412         fpu->last_opcode = fxsave->fop;
4413         fpu->last_ip = fxsave->rip;
4414         fpu->last_dp = fxsave->rdp;
4415         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4416
4417         vcpu_put(vcpu);
4418
4419         return 0;
4420 }
4421
4422 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4423 {
4424         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4425
4426         vcpu_load(vcpu);
4427
4428         memcpy(fxsave->st_space, fpu->fpr, 128);
4429         fxsave->cwd = fpu->fcw;
4430         fxsave->swd = fpu->fsw;
4431         fxsave->twd = fpu->ftwx;
4432         fxsave->fop = fpu->last_opcode;
4433         fxsave->rip = fpu->last_ip;
4434         fxsave->rdp = fpu->last_dp;
4435         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4436
4437         vcpu_put(vcpu);
4438
4439         return 0;
4440 }
4441
4442 void fx_init(struct kvm_vcpu *vcpu)
4443 {
4444         unsigned after_mxcsr_mask;
4445
4446         /*
4447          * Touch the fpu the first time in non atomic context as if
4448          * this is the first fpu instruction the exception handler
4449          * will fire before the instruction returns and it'll have to
4450          * allocate ram with GFP_KERNEL.
4451          */
4452         if (!used_math())
4453                 kvm_fx_save(&vcpu->arch.host_fx_image);
4454
4455         /* Initialize guest FPU by resetting ours and saving into guest's */
4456         preempt_disable();
4457         kvm_fx_save(&vcpu->arch.host_fx_image);
4458         kvm_fx_finit();
4459         kvm_fx_save(&vcpu->arch.guest_fx_image);
4460         kvm_fx_restore(&vcpu->arch.host_fx_image);
4461         preempt_enable();
4462
4463         vcpu->arch.cr0 |= X86_CR0_ET;
4464         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4465         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4466         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4467                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4468 }
4469 EXPORT_SYMBOL_GPL(fx_init);
4470
4471 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4472 {
4473         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4474                 return;
4475
4476         vcpu->guest_fpu_loaded = 1;
4477         kvm_fx_save(&vcpu->arch.host_fx_image);
4478         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4479 }
4480 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4481
4482 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4483 {
4484         if (!vcpu->guest_fpu_loaded)
4485                 return;
4486
4487         vcpu->guest_fpu_loaded = 0;
4488         kvm_fx_save(&vcpu->arch.guest_fx_image);
4489         kvm_fx_restore(&vcpu->arch.host_fx_image);
4490         ++vcpu->stat.fpu_reload;
4491 }
4492 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4493
4494 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4495 {
4496         if (vcpu->arch.time_page) {
4497                 kvm_release_page_dirty(vcpu->arch.time_page);
4498                 vcpu->arch.time_page = NULL;
4499         }
4500
4501         kvm_x86_ops->vcpu_free(vcpu);
4502 }
4503
4504 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4505                                                 unsigned int id)
4506 {
4507         return kvm_x86_ops->vcpu_create(kvm, id);
4508 }
4509
4510 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4511 {
4512         int r;
4513
4514         /* We do fxsave: this must be aligned. */
4515         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4516
4517         vcpu->arch.mtrr_state.have_fixed = 1;
4518         vcpu_load(vcpu);
4519         r = kvm_arch_vcpu_reset(vcpu);
4520         if (r == 0)
4521                 r = kvm_mmu_setup(vcpu);
4522         vcpu_put(vcpu);
4523         if (r < 0)
4524                 goto free_vcpu;
4525
4526         return 0;
4527 free_vcpu:
4528         kvm_x86_ops->vcpu_free(vcpu);
4529         return r;
4530 }
4531
4532 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4533 {
4534         vcpu_load(vcpu);
4535         kvm_mmu_unload(vcpu);
4536         vcpu_put(vcpu);
4537
4538         kvm_x86_ops->vcpu_free(vcpu);
4539 }
4540
4541 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4542 {
4543         vcpu->arch.nmi_pending = false;
4544         vcpu->arch.nmi_injected = false;
4545
4546         vcpu->arch.switch_db_regs = 0;
4547         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4548         vcpu->arch.dr6 = DR6_FIXED_1;
4549         vcpu->arch.dr7 = DR7_FIXED_1;
4550
4551         return kvm_x86_ops->vcpu_reset(vcpu);
4552 }
4553
4554 void kvm_arch_hardware_enable(void *garbage)
4555 {
4556         kvm_x86_ops->hardware_enable(garbage);
4557 }
4558
4559 void kvm_arch_hardware_disable(void *garbage)
4560 {
4561         kvm_x86_ops->hardware_disable(garbage);
4562 }
4563
4564 int kvm_arch_hardware_setup(void)
4565 {
4566         return kvm_x86_ops->hardware_setup();
4567 }
4568
4569 void kvm_arch_hardware_unsetup(void)
4570 {
4571         kvm_x86_ops->hardware_unsetup();
4572 }
4573
4574 void kvm_arch_check_processor_compat(void *rtn)
4575 {
4576         kvm_x86_ops->check_processor_compatibility(rtn);
4577 }
4578
4579 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4580 {
4581         struct page *page;
4582         struct kvm *kvm;
4583         int r;
4584
4585         BUG_ON(vcpu->kvm == NULL);
4586         kvm = vcpu->kvm;
4587
4588         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4589         if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4590                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4591         else
4592                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4593
4594         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4595         if (!page) {
4596                 r = -ENOMEM;
4597                 goto fail;
4598         }
4599         vcpu->arch.pio_data = page_address(page);
4600
4601         r = kvm_mmu_create(vcpu);
4602         if (r < 0)
4603                 goto fail_free_pio_data;
4604
4605         if (irqchip_in_kernel(kvm)) {
4606                 r = kvm_create_lapic(vcpu);
4607                 if (r < 0)
4608                         goto fail_mmu_destroy;
4609         }
4610
4611         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4612                                        GFP_KERNEL);
4613         if (!vcpu->arch.mce_banks) {
4614                 r = -ENOMEM;
4615                 goto fail_mmu_destroy;
4616         }
4617         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4618
4619         return 0;
4620
4621 fail_mmu_destroy:
4622         kvm_mmu_destroy(vcpu);
4623 fail_free_pio_data:
4624         free_page((unsigned long)vcpu->arch.pio_data);
4625 fail:
4626         return r;
4627 }
4628
4629 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4630 {
4631         kvm_free_lapic(vcpu);
4632         down_read(&vcpu->kvm->slots_lock);
4633         kvm_mmu_destroy(vcpu);
4634         up_read(&vcpu->kvm->slots_lock);
4635         free_page((unsigned long)vcpu->arch.pio_data);
4636 }
4637
4638 struct  kvm *kvm_arch_create_vm(void)
4639 {
4640         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4641
4642         if (!kvm)
4643                 return ERR_PTR(-ENOMEM);
4644
4645         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4646         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4647
4648         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4649         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4650
4651         rdtscll(kvm->arch.vm_init_tsc);
4652
4653         return kvm;
4654 }
4655
4656 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4657 {
4658         vcpu_load(vcpu);
4659         kvm_mmu_unload(vcpu);
4660         vcpu_put(vcpu);
4661 }
4662
4663 static void kvm_free_vcpus(struct kvm *kvm)
4664 {
4665         unsigned int i;
4666
4667         /*
4668          * Unpin any mmu pages first.
4669          */
4670         for (i = 0; i < KVM_MAX_VCPUS; ++i)
4671                 if (kvm->vcpus[i])
4672                         kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4673         for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4674                 if (kvm->vcpus[i]) {
4675                         kvm_arch_vcpu_free(kvm->vcpus[i]);
4676                         kvm->vcpus[i] = NULL;
4677                 }
4678         }
4679
4680 }
4681
4682 void kvm_arch_sync_events(struct kvm *kvm)
4683 {
4684         kvm_free_all_assigned_devices(kvm);
4685 }
4686
4687 void kvm_arch_destroy_vm(struct kvm *kvm)
4688 {
4689         kvm_iommu_unmap_guest(kvm);
4690         kvm_free_pit(kvm);
4691         kfree(kvm->arch.vpic);
4692         kfree(kvm->arch.vioapic);
4693         kvm_free_vcpus(kvm);
4694         kvm_free_physmem(kvm);
4695         if (kvm->arch.apic_access_page)
4696                 put_page(kvm->arch.apic_access_page);
4697         if (kvm->arch.ept_identity_pagetable)
4698                 put_page(kvm->arch.ept_identity_pagetable);
4699         kfree(kvm);
4700 }
4701
4702 int kvm_arch_set_memory_region(struct kvm *kvm,
4703                                 struct kvm_userspace_memory_region *mem,
4704                                 struct kvm_memory_slot old,
4705                                 int user_alloc)
4706 {
4707         int npages = mem->memory_size >> PAGE_SHIFT;
4708         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4709
4710         /*To keep backward compatibility with older userspace,
4711          *x86 needs to hanlde !user_alloc case.
4712          */
4713         if (!user_alloc) {
4714                 if (npages && !old.rmap) {
4715                         unsigned long userspace_addr;
4716
4717                         down_write(&current->mm->mmap_sem);
4718                         userspace_addr = do_mmap(NULL, 0,
4719                                                  npages * PAGE_SIZE,
4720                                                  PROT_READ | PROT_WRITE,
4721                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4722                                                  0);
4723                         up_write(&current->mm->mmap_sem);
4724
4725                         if (IS_ERR((void *)userspace_addr))
4726                                 return PTR_ERR((void *)userspace_addr);
4727
4728                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4729                         spin_lock(&kvm->mmu_lock);
4730                         memslot->userspace_addr = userspace_addr;
4731                         spin_unlock(&kvm->mmu_lock);
4732                 } else {
4733                         if (!old.user_alloc && old.rmap) {
4734                                 int ret;
4735
4736                                 down_write(&current->mm->mmap_sem);
4737                                 ret = do_munmap(current->mm, old.userspace_addr,
4738                                                 old.npages * PAGE_SIZE);
4739                                 up_write(&current->mm->mmap_sem);
4740                                 if (ret < 0)
4741                                         printk(KERN_WARNING
4742                                        "kvm_vm_ioctl_set_memory_region: "
4743                                        "failed to munmap memory\n");
4744                         }
4745                 }
4746         }
4747
4748         spin_lock(&kvm->mmu_lock);
4749         if (!kvm->arch.n_requested_mmu_pages) {
4750                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4751                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4752         }
4753
4754         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4755         spin_unlock(&kvm->mmu_lock);
4756         kvm_flush_remote_tlbs(kvm);
4757
4758         return 0;
4759 }
4760
4761 void kvm_arch_flush_shadow(struct kvm *kvm)
4762 {
4763         kvm_mmu_zap_all(kvm);
4764         kvm_reload_remote_mmus(kvm);
4765 }
4766
4767 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4768 {
4769         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4770                || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4771                || vcpu->arch.nmi_pending;
4772 }
4773
4774 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4775 {
4776         int me;
4777         int cpu = vcpu->cpu;
4778
4779         if (waitqueue_active(&vcpu->wq)) {
4780                 wake_up_interruptible(&vcpu->wq);
4781                 ++vcpu->stat.halt_wakeup;
4782         }
4783
4784         me = get_cpu();
4785         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4786                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4787                         smp_send_reschedule(cpu);
4788         put_cpu();
4789 }
4790
4791 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4792 {
4793         return kvm_x86_ops->interrupt_allowed(vcpu);
4794 }