Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt

   1 Hisilicon Platforms Device Tree Bindings
   2 ----------------------------------------------------
   3
   4 Hi4511 Board
   5 Required root node properties:
   6         - compatible = "hisilicon,hi3620-hi4511";
   7
   8 Hisilicon system controller
   9
  10 Required properties:
  11 - compatible : "hisilicon,sysctrl"
  12 - reg : Register address and size
  13
  14 Optional properties:
  15 - smp-offset : offset in sysctrl for notifying slave cpu booting
  16                 cpu 1, reg;
  17                 cpu 2, reg + 0x4;
  18                 cpu 3, reg + 0x8;
  19                 If reg value is not zero, cpun exit wfi and go
  20 - resume-offset : offset in sysctrl for notifying cpu0 when resume
  21 - reboot-offset : offset in sysctrl for system reboot
  22
  23 Example:
  24
  25         /* for Hi3620 */
  26         sysctrl: system-controller@fc802000 {
  27                 compatible = "hisilicon,sysctrl";
  28                 reg = <0xfc802000 0x1000>;
  29                 smp-offset = <0x31c>;
  30                 resume-offset = <0x308>;
  31                 reboot-offset = <0x4>;
  32         };
  33
  34 -----------------------------------------------------------------------
  35 Hisilicon CPU controller
  36
  37 Required properties:
  38 - compatible : "hisilicon,cpuctrl"
  39 - reg : Register address and size
  40
  41 The clock registers and power registers of secondary cores are defined
  42 in CPU controller, especially in HIX5HD2 SoC.
  43
  44 -----------------------------------------------------------------------
  45 PCTRL: Peripheral misc control register
  46
  47 Required Properties:
  48 - compatible: "hisilicon,pctrl"
  49 - reg: Address and size of pctrl.
  50
  51 Example:
  52
  53         /* for Hi3620 */
  54         pctrl: pctrl@fca09000 {
  55                 compatible = "hisilicon,pctrl";
  56                 reg = <0xfca09000 0x1000>;
  57         };