1 Samsung Exynos Analog to Digital Converter bindings
3 The devicetree bindings are for the new ADC driver written for
4 Exynos4 and upward SoCs from Samsung.
6 New driver handles the following
7 1. Supports ADC IF found on EXYNOS4412/EXYNOS5250
8 and future SoCs from Samsung
9 2. Add ADC driver under iio/adc framework
10 3. Also adds the Documentation for device tree bindings
13 - compatible: Must be "samsung,exynos-adc-v1"
14 for exynos4412/5250 and s5pv210 controllers.
15 Must be "samsung,exynos-adc-v2" for
17 Must be "samsung,exynos3250-adc" for
18 controllers compatible with ADC of Exynos3250.
19 Must be "samsung,s3c2410-adc" for
20 the ADC in s3c2410 and compatibles
21 Must be "samsung,s3c2416-adc" for
22 the ADC in s3c2416 and compatibles
23 Must be "samsung,s3c2440-adc" for
24 the ADC in s3c2440 and compatibles
25 Must be "samsung,s3c2443-adc" for
26 the ADC in s3c2443 and compatibles
27 Must be "samsung,s3c6410-adc" for
28 the ADC in s3c6410 and compatibles
29 - reg: List of ADC register address range
30 - The base address and range of ADC register
31 - The base address and range of ADC_PHY register (every
32 SoC except for s3c24xx/s3c64xx ADC)
33 - interrupts: Contains the interrupt information for the timer. The
34 format is being dependent on which interrupt controller
35 the Samsung device uses.
36 - #io-channel-cells = <1>; As ADC has multiple outputs
37 - clocks From common clock bindings: handles to clocks specified
38 in "clock-names" property, in the same order.
39 - clock-names From common clock bindings: list of clock input names
41 - "adc" : ADC bus clock
42 - "sclk" : ADC special clock (only for Exynos3250 and
44 - vdd-supply VDD input supply.
46 Note: child nodes can be added for auto probing from device tree.
48 Example: adding device info in dtsi file
51 compatible = "samsung,exynos-adc-v1";
52 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
53 interrupts = <0 106 0>;
54 #io-channel-cells = <1>;
57 clocks = <&clock 303>;
60 vdd-supply = <&buck5_reg>;
63 Example: adding device info in dtsi file for Exynos3250 with additional sclk
66 compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
67 reg = <0x126C0000 0x100>, <0x10020718 0x4>;
68 interrupts = <0 137 0>;
69 #io-channel-cells = <1>;
72 clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
73 clock-names = "adc", "sclk";
75 vdd-supply = <&buck5_reg>;
78 Example: Adding child nodes in dts file
82 /* NTC thermistor is a hwmon device */
84 compatible = "murata,ncp15wb473";
85 pullup-uv = <1800000>;
88 io-channels = <&adc 4>;
92 Note: Does not apply to ADC driver under arch/arm/plat-samsung/
93 Note: The child node can be added under the adc node or separately.