3 Each multi-function pin is controlled, driven and routed through the
4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
8 When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
9 Pull Up (PU) are driven by the related PIO block.
11 ST pinctrl driver controls PIO multiplexing block and also interacts with
12 gpio driver to configure a pin.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
16 First type is via irqmux, single interrupt is used by multiple gpio banks. This
17 reduces number of overall interrupts numbers required. All these banks belong to
18 a single pincontroller.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
26 Second type has a dedicated interrupt per gpio bank.
28 [irqN]----> [gpio-bank (n)]
33 - compatible : should be "st,<SOC>-<pio-block>-pinctrl"
34 like st,stih415-sbc-pinctrl, st,stih415-front-pinctrl and so on.
35 - st,syscfg : Should be a phandle of the syscfg node.
36 - st,retime-pin-mask : Should be mask to specify which pins can be retimed.
37 If the property is not present, it is assumed that all the pins in the
38 bank are capable of retiming. Retiming is mainly used to improve the
39 IO timing margins of external synchronous interfaces.
40 - ranges : defines mapping between pin controller node (parent) to gpio-bank
44 - interrupts : Interrupt number of the irqmux. If the interrupt is shared
45 with other gpio banks via irqmux.
46 a irqline and gpio banks.
47 - reg : irqmux memory resource. If irqmux is present.
48 - reg-names : irqmux resource should be named as "irqmux".
50 GPIO controller/bank node.
52 - gpio-controller : Indicates this device is a GPIO controller
53 - #gpio-cells : Must be two.
54 - First cell: specifies the pin number inside the controller
55 - Second cell: specifies whether the pin is logically inverted.
58 - st,bank-name : Should be a name string for this bank as specified in
62 - interrupts : Interrupt number for this gpio bank. If there is a dedicated
63 interrupt wired up for this gpio bank.
65 - interrupt-controller : Indicates this device is a interrupt controller. GPIO
66 bank can be an interrupt controller iff one of the interrupt type either via
67 irqmux or a dedicated interrupt per bank is specified.
69 - #interrupt-cells: the value of this property should be 2.
70 - First Cell: represents the external gpio interrupt number local to the
71 gpio interrupt space of the controller.
72 - Second Cell: flags to identify the type of the interrupt
73 - 1 = rising edge triggered
74 - 2 = falling edge triggered
75 - 3 = rising and falling edge triggered
76 - 4 = high level triggered
77 - 8 = low level triggered
78 for related macros look in:
79 include/dt-bindings/interrupt-controller/irq.h
85 compatible = "st,stih415-sbc-pinctrl";
86 st,syscfg = <&syscfg_sbc>;
87 reg = <0xfe61f080 0x4>;
89 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
90 interrupt-names = "irqmux";
91 ranges = <0 0xfe610000 0x5000>;
97 #interrupt-cells = <2>;
99 st,bank-name = "PIO0";
102 pin-functions nodes follow...
106 Contents of function subnode node:
107 ----------------------
108 Required properties for pin configuration node:
109 - st,pins : Child node with list of pins with configuration.
111 Below is the format of how each pin conf should look like.
113 <bank offset mux mode rt_type rt_delay rt_clk>
115 Every PIO is represented with 4-7 parameters depending on retime configuration.
116 Each parameter is explained as below.
118 -bank : Should be bank phandle to which this PIO belongs.
119 -offset : Offset in the PIO bank.
120 -mux : Should be alternate function number associated this pin.
121 Use same numbers from datasheet.
122 -mode :pin configuration is selected from one of the below values.
129 -rt_type Retiming Configuration for the pin.
130 Possible retime configuration are:
132 ------- -------------
134 ------- -------------
136 ICLK_IO <delay> <clk>
139 SE_ICLK_IO <delay> <clk>
140 SE_NICLK_IO <delay> <clk>
142 - delay is retime delay in pico seconds as mentioned in data sheet.
144 - rt_clk :clk to be use for retime.
151 Example of mmcclk pin which is a bi-direction pull pu with retime config
152 as non inverted clock retimed with CLK_B and delay of 0 pico seconds:
159 mmcclk = <&PIO13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;
167 sdhci0:sdhci@fe810000{
169 interrupt-parent = <&PIO3>;
170 #interrupt-cells = <2>;
171 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */
172 interrupt-names = "card-detect";
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_mmc>;