spi: octeon: Convert to let spi core validate transfer speed
[cascardo/linux.git] / Documentation / devicetree / bindings / spi / spi-fsl-dspi.txt
1 ARM Freescale DSPI controller
2
3 Required properties:
4 - compatible : "fsl,vf610-dspi"
5 - reg : Offset and length of the register set for the device
6 - interrupts : Should contain SPI controller interrupt
7 - clocks: from common clock binding: handle to dspi clock.
8 - clock-names: from common clock binding: Shall be "dspi".
9 - pinctrl-0: pin control group to be used for this controller.
10 - pinctrl-names: must contain a "default" entry.
11 - spi-num-chipselects : the number of the chipselect signals.
12 - bus-num : the slave chip chipselect signal number.
13 Example:
14
15 dspi0@4002c000 {
16         #address-cells = <1>;
17         #size-cells = <0>;
18         compatible = "fsl,vf610-dspi";
19         reg = <0x4002c000 0x1000>;
20         interrupts = <0 67 0x04>;
21         clocks = <&clks VF610_CLK_DSPI0>;
22         clock-names = "dspi";
23         spi-num-chipselects = <5>;
24         bus-num = <0>;
25         pinctrl-names = "default";
26         pinctrl-0 = <&pinctrl_dspi0_1>;
27         status = "okay";
28
29         sflash: at26df081a@0 {
30                 #address-cells = <1>;
31                 #size-cells = <1>;
32                 compatible = "atmel,at26df081a";
33                 spi-max-frequency = <16000000>;
34                 spi-cpol;
35                 spi-cpha;
36                 reg = <0>;
37                 linux,modalias = "m25p80";
38                 modal = "at26df081a";
39         };
40 };
41
42