arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/console.h>
  14 #include <linux/module.h>
  15 #include <linux/cpu.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/of_fdt.h>
  18 #include <linux/of_platform.h>
  19 #include <linux/cache.h>
  20 #include <asm/sections.h>
  21 #include <asm/arcregs.h>
  22 #include <asm/tlb.h>
  23 #include <asm/setup.h>
  24 #include <asm/page.h>
  25 #include <asm/irq.h>
  26 #include <asm/unwind.h>
  27 #include <asm/clk.h>
  28 #include <asm/mach_desc.h>
  29 #include <asm/smp.h>
  30
  31 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  32
  33 unsigned int intr_to_DE_cnt;
  34
  35 /* Part of U-boot ABI: see head.S */
  36 int __initdata uboot_tag;
  37 char __initdata *uboot_arg;
  38
  39 const struct machine_desc *machine_desc;
  40
  41 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  42
  43 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  44
  45 static void read_arc_build_cfg_regs(void)
  46 {
  47         struct bcr_perip uncached_space;
  48         struct bcr_timer timer;
  49         struct bcr_generic bcr;
  50         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  51         unsigned long perip_space;
  52         FIX_PTR(cpu);
  53
  54         READ_BCR(AUX_IDENTITY, cpu->core);
  55         READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
  56
  57         READ_BCR(ARC_REG_TIMERS_BCR, timer);
  58         cpu->extn.timer0 = timer.t0;
  59         cpu->extn.timer1 = timer.t1;
  60         cpu->extn.rtc = timer.rtc;
  61
  62         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
  63
  64         READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
  65         if (uncached_space.ver < 3)
  66                 perip_space = uncached_space.start << 24;
  67         else
  68                 perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000;
  69
  70         BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE);
  71
  72         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
  73
  74         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
  75         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
  76         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
  77         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
  78         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
  79
  80         /* Note that we read the CCM BCRs independent of kernel config
  81          * This is to catch the cases where user doesn't know that
  82          * CCMs are present in hardware build
  83          */
  84         {
  85                 struct bcr_iccm iccm;
  86                 struct bcr_dccm dccm;
  87                 struct bcr_dccm_base dccm_base;
  88                 unsigned int bcr_32bit_val;
  89
  90                 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
  91                 if (bcr_32bit_val) {
  92                         iccm = *((struct bcr_iccm *)&bcr_32bit_val);
  93                         cpu->iccm.base_addr = iccm.base << 16;
  94                         cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
  95                 }
  96
  97                 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
  98                 if (bcr_32bit_val) {
  99                         dccm = *((struct bcr_dccm *)&bcr_32bit_val);
 100                         cpu->dccm.sz = 0x800 << (dccm.sz);
 101
 102                         READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
 103                         cpu->dccm.base_addr = dccm_base.addr << 8;
 104                 }
 105         }
 106
 107         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 108
 109         read_decode_mmu_bcr();
 110         read_decode_cache_bcr();
 111
 112         if (is_isa_arcompact()) {
 113                 struct bcr_fp_arcompact sp, dp;
 114                 struct bcr_bpu_arcompact bpu;
 115
 116                 READ_BCR(ARC_REG_FP_BCR, sp);
 117                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 118                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 119                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 120
 121                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 122                 cpu->bpu.ver = bpu.ver;
 123                 cpu->bpu.full = bpu.fam ? 1 : 0;
 124                 if (bpu.ent) {
 125                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 126                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 127                 }
 128         } else {
 129                 struct bcr_fp_arcv2 spdp;
 130                 struct bcr_bpu_arcv2 bpu;
 131
 132                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 133                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 134                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 135
 136                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 137                 cpu->bpu.ver = bpu.ver;
 138                 cpu->bpu.full = bpu.ft;
 139                 cpu->bpu.num_cache = 256 << bpu.bce;
 140                 cpu->bpu.num_pred = 2048 << bpu.pte;
 141         }
 142
 143         READ_BCR(ARC_REG_AP_BCR, bcr);
 144         cpu->extn.ap = bcr.ver ? 1 : 0;
 145
 146         READ_BCR(ARC_REG_SMART_BCR, bcr);
 147         cpu->extn.smart = bcr.ver ? 1 : 0;
 148
 149         READ_BCR(ARC_REG_RTT_BCR, bcr);
 150         cpu->extn.rtt = bcr.ver ? 1 : 0;
 151
 152         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 153 }
 154
 155 static const struct cpuinfo_data arc_cpu_tbl[] = {
 156 #ifdef CONFIG_ISA_ARCOMPACT
 157         { {0x20, "ARC 600"      }, 0x2F},
 158         { {0x30, "ARC 700"      }, 0x33},
 159         { {0x34, "ARC 700 R4.10"}, 0x34},
 160         { {0x35, "ARC 700 R4.11"}, 0x35},
 161 #else
 162         { {0x50, "ARC HS38 R2.0"}, 0x51},
 163         { {0x52, "ARC HS38 R2.1"}, 0x52},
 164 #endif
 165         { {0x00, NULL           } }
 166 };
 167
 168
 169 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 170 {
 171         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 172         struct bcr_identity *core = &cpu->core;
 173         const struct cpuinfo_data *tbl;
 174         char *isa_nm;
 175         int i, be, atomic;
 176         int n = 0;
 177
 178         FIX_PTR(cpu);
 179
 180         if (is_isa_arcompact()) {
 181                 isa_nm = "ARCompact";
 182                 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 183
 184                 atomic = cpu->isa.atomic1;
 185                 if (!cpu->isa.ver)      /* ISA BCR absent, use Kconfig info */
 186                         atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 187         } else {
 188                 isa_nm = "ARCv2";
 189                 be = cpu->isa.be;
 190                 atomic = cpu->isa.atomic;
 191         }
 192
 193         n += scnprintf(buf + n, len - n,
 194                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 195                        core->family, core->cpu_id, core->chip_id);
 196
 197         for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
 198                 if ((core->family >= tbl->info.id) &&
 199                     (core->family <= tbl->up_range)) {
 200                         n += scnprintf(buf + n, len - n,
 201                                        "processor [%d]\t: %s (%s ISA) %s\n",
 202                                        cpu_id, tbl->info.str, isa_nm,
 203                                        IS_AVAIL1(be, "[Big-Endian]"));
 204                         break;
 205                 }
 206         }
 207
 208         if (tbl->info.id == 0)
 209                 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
 210
 211         n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
 212                        (unsigned int)(arc_get_core_freq() / 1000000),
 213                        (unsigned int)(arc_get_core_freq() / 10000) % 100);
 214
 215         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
 216                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 217                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 218                        IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
 219                                  CONFIG_ARC_HAS_RTC));
 220
 221         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 222                            IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 223                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 224                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 225
 226         if (i)
 227                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 228
 229         if (cpu->extn_mpy.ver) {
 230                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 231                         n += scnprintf(buf + n, len - n, "mpy ");
 232                 } else {
 233                         int opt = 2;    /* stock MPY/MPYH */
 234
 235                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 236                                 opt = cpu->extn_mpy.dsp + 6;
 237
 238                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 239                 }
 240         }
 241
 242         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 243                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 244                        IS_AVAIL1(cpu->extn.norm, "norm "),
 245                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 246                        IS_AVAIL1(cpu->extn.swap, "swap "),
 247                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 248                        IS_AVAIL1(cpu->extn.crc, "crc "),
 249                        IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
 250
 251         if (cpu->bpu.ver)
 252                 n += scnprintf(buf + n, len - n,
 253                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 254                               IS_AVAIL1(cpu->bpu.full, "full"),
 255                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 256                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 257
 258         return buf;
 259 }
 260
 261 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 262 {
 263         int n = 0;
 264         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 265
 266         FIX_PTR(cpu);
 267
 268         n += scnprintf(buf + n, len - n,
 269                        "Vector Table\t: %#x\nUncached Base\t: %#x\n",
 270                        cpu->vec_base, ARC_UNCACHED_ADDR_SPACE);
 271
 272         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 273                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 274                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 275                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 276
 277         if (cpu->extn.debug)
 278                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 279                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 280                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 281                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 282
 283         if (cpu->dccm.sz || cpu->iccm.sz)
 284                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 285                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 286                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 287
 288         n += scnprintf(buf + n, len - n,
 289                        "OS ABI [v3]\t: no-legacy-syscalls\n");
 290
 291         return buf;
 292 }
 293
 294 static void arc_chk_core_config(void)
 295 {
 296         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 297         int fpu_enabled;
 298
 299         if (!cpu->extn.timer0)
 300                 panic("Timer0 is not present!\n");
 301
 302         if (!cpu->extn.timer1)
 303                 panic("Timer1 is not present!\n");
 304
 305         if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->extn.rtc)
 306                 panic("RTC is not present\n");
 307
 308 #ifdef CONFIG_ARC_HAS_DCCM
 309         /*
 310          * DCCM can be arbit placed in hardware.
 311          * Make sure it's placement/sz matches what Linux is built with
 312          */
 313         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 314                 panic("Linux built with incorrect DCCM Base address\n");
 315
 316         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 317                 panic("Linux built with incorrect DCCM Size\n");
 318 #endif
 319
 320 #ifdef CONFIG_ARC_HAS_ICCM
 321         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 322                 panic("Linux built with incorrect ICCM Size\n");
 323 #endif
 324
 325         /*
 326          * FP hardware/software config sanity
 327          * -If hardware contains DPFP, kernel needs to save/restore FPU state
 328          * -If not, it will crash trying to save/restore the non-existant regs
 329          *
 330          * (only DPDP checked since SP has no arch visible regs)
 331          */
 332         fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 333
 334         if (cpu->extn.fpu_dp && !fpu_enabled)
 335                 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 336         else if (!cpu->extn.fpu_dp && fpu_enabled)
 337                 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
 338
 339         if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
 340             IS_ENABLED(CONFIG_ARC_HAS_LLSC) &&
 341             !IS_ENABLED(CONFIG_ARC_STAR_9000923308))
 342                 panic("llock/scond livelock workaround missing\n");
 343 }
 344
 345 /*
 346  * Initialize and setup the processor core
 347  * This is called by all the CPUs thus should not do special case stuff
 348  *    such as only for boot CPU etc
 349  */
 350
 351 void setup_processor(void)
 352 {
 353         char str[512];
 354         int cpu_id = smp_processor_id();
 355
 356         read_arc_build_cfg_regs();
 357         arc_init_IRQ();
 358
 359         printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 360
 361         arc_mmu_init();
 362         arc_cache_init();
 363
 364         printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 365         printk(arc_platform_smp_cpuinfo());
 366
 367         arc_chk_core_config();
 368 }
 369
 370 static inline int is_kernel(unsigned long addr)
 371 {
 372         if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
 373                 return 1;
 374         return 0;
 375 }
 376
 377 void __init setup_arch(char **cmdline_p)
 378 {
 379 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 380         /* make sure that uboot passed pointer to cmdline/dtb is valid */
 381         if (uboot_tag && is_kernel((unsigned long)uboot_arg))
 382                 panic("Invalid uboot arg\n");
 383
 384         /* See if u-boot passed an external Device Tree blob */
 385         machine_desc = setup_machine_fdt(uboot_arg);    /* uboot_tag == 2 */
 386         if (!machine_desc)
 387 #endif
 388         {
 389                 /* No, so try the embedded one */
 390                 machine_desc = setup_machine_fdt(__dtb_start);
 391                 if (!machine_desc)
 392                         panic("Embedded DT invalid\n");
 393
 394                 /*
 395                  * If we are here, it is established that @uboot_arg didn't
 396                  * point to DT blob. Instead if u-boot says it is cmdline,
 397                  * Appent to embedded DT cmdline.
 398                  * setup_machine_fdt() would have populated @boot_command_line
 399                  */
 400                 if (uboot_tag == 1) {
 401                         /* Ensure a whitespace between the 2 cmdlines */
 402                         strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 403                         strlcat(boot_command_line, uboot_arg,
 404                                 COMMAND_LINE_SIZE);
 405                 }
 406         }
 407
 408         /* Save unparsed command line copy for /proc/cmdline */
 409         *cmdline_p = boot_command_line;
 410
 411         /* To force early parsing of things like mem=xxx */
 412         parse_early_param();
 413
 414         /* Platform/board specific: e.g. early console registration */
 415         if (machine_desc->init_early)
 416                 machine_desc->init_early();
 417
 418         smp_init_cpus();
 419
 420         setup_processor();
 421         setup_arch_memory();
 422
 423         /* copy flat DT out of .init and then unflatten it */
 424         unflatten_and_copy_device_tree();
 425
 426         /* Can be issue if someone passes cmd line arg "ro"
 427          * But that is unlikely so keeping it as it is
 428          */
 429         root_mountflags &= ~MS_RDONLY;
 430
 431 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 432         conswitchp = &dummy_con;
 433 #endif
 434
 435         arc_unwind_init();
 436 }
 437
 438 static int __init customize_machine(void)
 439 {
 440         of_clk_init(NULL);
 441         /*
 442          * Traverses flattened DeviceTree - registering platform devices
 443          * (if any) complete with their resources
 444          */
 445         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 446
 447         if (machine_desc->init_machine)
 448                 machine_desc->init_machine();
 449
 450         return 0;
 451 }
 452 arch_initcall(customize_machine);
 453
 454 static int __init init_late_machine(void)
 455 {
 456         if (machine_desc->init_late)
 457                 machine_desc->init_late();
 458
 459         return 0;
 460 }
 461 late_initcall(init_late_machine);
 462 /*
 463  *  Get CPU information for use by the procfs.
 464  */
 465
 466 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 467 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 468
 469 static int show_cpuinfo(struct seq_file *m, void *v)
 470 {
 471         char *str;
 472         int cpu_id = ptr_to_cpu(v);
 473
 474         if (!cpu_online(cpu_id)) {
 475                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 476                 goto done;
 477         }
 478
 479         str = (char *)__get_free_page(GFP_TEMPORARY);
 480         if (!str)
 481                 goto done;
 482
 483         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 484
 485         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 486                    loops_per_jiffy / (500000 / HZ),
 487                    (loops_per_jiffy / (5000 / HZ)) % 100);
 488
 489         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 490         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 491         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 492         seq_printf(m, arc_platform_smp_cpuinfo());
 493
 494         free_page((unsigned long)str);
 495 done:
 496         seq_printf(m, "\n");
 497
 498         return 0;
 499 }
 500
 501 static void *c_start(struct seq_file *m, loff_t *pos)
 502 {
 503         /*
 504          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 505          * However since NULL is also a valid cpu-id (0), we use a round-about
 506          * way to pass it w/o having to kmalloc/free a 2 byte string.
 507          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 508          */
 509         return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
 510 }
 511
 512 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 513 {
 514         ++*pos;
 515         return c_start(m, pos);
 516 }
 517
 518 static void c_stop(struct seq_file *m, void *v)
 519 {
 520 }
 521
 522 const struct seq_operations cpuinfo_op = {
 523         .start  = c_start,
 524         .next   = c_next,
 525         .stop   = c_stop,
 526         .show   = show_cpuinfo
 527 };
 528
 529 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 530
 531 static int __init topology_init(void)
 532 {
 533         int cpu;
 534
 535         for_each_present_cpu(cpu)
 536             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 537
 538         return 0;
 539 }
 540
 541 subsys_initcall(topology_init);