arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/console.h>
  14 #include <linux/module.h>
  15 #include <linux/cpu.h>
  16 #include <linux/of_fdt.h>
  17 #include <linux/cache.h>
  18 #include <asm/sections.h>
  19 #include <asm/arcregs.h>
  20 #include <asm/tlb.h>
  21 #include <asm/setup.h>
  22 #include <asm/page.h>
  23 #include <asm/irq.h>
  24 #include <asm/unwind.h>
  25 #include <asm/mach_desc.h>
  26 #include <asm/smp.h>
  27
  28 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  29
  30 unsigned int intr_to_DE_cnt;
  31
  32 /* Part of U-boot ABI: see head.S */
  33 int __initdata uboot_tag;
  34 char __initdata *uboot_arg;
  35
  36 const struct machine_desc *machine_desc;
  37
  38 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  39
  40 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  41
  42 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  43 {
  44         if (is_isa_arcompact()) {
  45                 struct bcr_iccm_arcompact iccm;
  46                 struct bcr_dccm_arcompact dccm;
  47
  48                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  49                 if (iccm.ver) {
  50                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  51                         cpu->iccm.base_addr = iccm.base << 16;
  52                 }
  53
  54                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  55                 if (dccm.ver) {
  56                         unsigned long base;
  57                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  58
  59                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  60                         cpu->dccm.base_addr = base & ~0xF;
  61                 }
  62         } else {
  63                 struct bcr_iccm_arcv2 iccm;
  64                 struct bcr_dccm_arcv2 dccm;
  65                 unsigned long region;
  66
  67                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  68                 if (iccm.ver) {
  69                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
  70                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
  71                                 cpu->iccm.sz <<= iccm.sz01;
  72
  73                         region = read_aux_reg(ARC_REG_AUX_ICCM);
  74                         cpu->iccm.base_addr = region & 0xF0000000;
  75                 }
  76
  77                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  78                 if (dccm.ver) {
  79                         cpu->dccm.sz = 256 << dccm.sz0;
  80                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
  81                                 cpu->dccm.sz <<= dccm.sz1;
  82
  83                         region = read_aux_reg(ARC_REG_AUX_DCCM);
  84                         cpu->dccm.base_addr = region & 0xF0000000;
  85                 }
  86         }
  87 }
  88
  89 static void read_arc_build_cfg_regs(void)
  90 {
  91         struct bcr_timer timer;
  92         struct bcr_generic bcr;
  93         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  94         FIX_PTR(cpu);
  95
  96         READ_BCR(AUX_IDENTITY, cpu->core);
  97         READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
  98
  99         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 100         cpu->extn.timer0 = timer.t0;
 101         cpu->extn.timer1 = timer.t1;
 102         cpu->extn.rtc = timer.rtc;
 103
 104         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 105
 106         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 107
 108         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 109         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 110         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 111         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 112         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 113         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 114
 115         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 116         read_decode_ccm_bcr(cpu);
 117
 118         read_decode_mmu_bcr();
 119         read_decode_cache_bcr();
 120
 121         if (is_isa_arcompact()) {
 122                 struct bcr_fp_arcompact sp, dp;
 123                 struct bcr_bpu_arcompact bpu;
 124
 125                 READ_BCR(ARC_REG_FP_BCR, sp);
 126                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 127                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 128                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 129
 130                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 131                 cpu->bpu.ver = bpu.ver;
 132                 cpu->bpu.full = bpu.fam ? 1 : 0;
 133                 if (bpu.ent) {
 134                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 135                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 136                 }
 137         } else {
 138                 struct bcr_fp_arcv2 spdp;
 139                 struct bcr_bpu_arcv2 bpu;
 140
 141                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 142                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 143                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 144
 145                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 146                 cpu->bpu.ver = bpu.ver;
 147                 cpu->bpu.full = bpu.ft;
 148                 cpu->bpu.num_cache = 256 << bpu.bce;
 149                 cpu->bpu.num_pred = 2048 << bpu.pte;
 150         }
 151
 152         READ_BCR(ARC_REG_AP_BCR, bcr);
 153         cpu->extn.ap = bcr.ver ? 1 : 0;
 154
 155         READ_BCR(ARC_REG_SMART_BCR, bcr);
 156         cpu->extn.smart = bcr.ver ? 1 : 0;
 157
 158         READ_BCR(ARC_REG_RTT_BCR, bcr);
 159         cpu->extn.rtt = bcr.ver ? 1 : 0;
 160
 161         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 162 }
 163
 164 static const struct cpuinfo_data arc_cpu_tbl[] = {
 165 #ifdef CONFIG_ISA_ARCOMPACT
 166         { {0x20, "ARC 600"      }, 0x2F},
 167         { {0x30, "ARC 700"      }, 0x33},
 168         { {0x34, "ARC 700 R4.10"}, 0x34},
 169         { {0x35, "ARC 700 R4.11"}, 0x35},
 170 #else
 171         { {0x50, "ARC HS38 R2.0"}, 0x51},
 172         { {0x52, "ARC HS38 R2.1"}, 0x52},
 173 #endif
 174         { {0x00, NULL           } }
 175 };
 176
 177
 178 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 179 {
 180         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 181         struct bcr_identity *core = &cpu->core;
 182         const struct cpuinfo_data *tbl;
 183         char *isa_nm;
 184         int i, be, atomic;
 185         int n = 0;
 186
 187         FIX_PTR(cpu);
 188
 189         if (is_isa_arcompact()) {
 190                 isa_nm = "ARCompact";
 191                 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 192
 193                 atomic = cpu->isa.atomic1;
 194                 if (!cpu->isa.ver)      /* ISA BCR absent, use Kconfig info */
 195                         atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 196         } else {
 197                 isa_nm = "ARCv2";
 198                 be = cpu->isa.be;
 199                 atomic = cpu->isa.atomic;
 200         }
 201
 202         n += scnprintf(buf + n, len - n,
 203                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 204                        core->family, core->cpu_id, core->chip_id);
 205
 206         for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
 207                 if ((core->family >= tbl->info.id) &&
 208                     (core->family <= tbl->up_range)) {
 209                         n += scnprintf(buf + n, len - n,
 210                                        "processor [%d]\t: %s (%s ISA) %s\n",
 211                                        cpu_id, tbl->info.str, isa_nm,
 212                                        IS_AVAIL1(be, "[Big-Endian]"));
 213                         break;
 214                 }
 215         }
 216
 217         if (tbl->info.id == 0)
 218                 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
 219
 220         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
 221                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 222                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 223                        IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
 224                                  CONFIG_ARC_HAS_RTC));
 225
 226         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 227                            IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 228                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 229                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 230
 231         if (i)
 232                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 233
 234         if (cpu->extn_mpy.ver) {
 235                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 236                         n += scnprintf(buf + n, len - n, "mpy ");
 237                 } else {
 238                         int opt = 2;    /* stock MPY/MPYH */
 239
 240                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 241                                 opt = cpu->extn_mpy.dsp + 6;
 242
 243                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 244                 }
 245         }
 246
 247         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 248                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 249                        IS_AVAIL1(cpu->extn.norm, "norm "),
 250                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 251                        IS_AVAIL1(cpu->extn.swap, "swap "),
 252                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 253                        IS_AVAIL1(cpu->extn.crc, "crc "),
 254                        IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
 255
 256         if (cpu->bpu.ver)
 257                 n += scnprintf(buf + n, len - n,
 258                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 259                               IS_AVAIL1(cpu->bpu.full, "full"),
 260                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 261                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 262
 263         return buf;
 264 }
 265
 266 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 267 {
 268         int n = 0;
 269         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 270
 271         FIX_PTR(cpu);
 272
 273         n += scnprintf(buf + n, len - n,
 274                        "Vector Table\t: %#x\nUncached Base\t: %#lx\n",
 275                        cpu->vec_base, perip_base);
 276
 277         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 278                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 279                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 280                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 281
 282         if (cpu->extn.debug)
 283                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 284                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 285                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 286                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 287
 288         if (cpu->dccm.sz || cpu->iccm.sz)
 289                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 290                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 291                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 292
 293         n += scnprintf(buf + n, len - n,
 294                        "OS ABI [v3]\t: no-legacy-syscalls\n");
 295
 296         return buf;
 297 }
 298
 299 static void arc_chk_core_config(void)
 300 {
 301         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 302         int fpu_enabled;
 303
 304         if (!cpu->extn.timer0)
 305                 panic("Timer0 is not present!\n");
 306
 307         if (!cpu->extn.timer1)
 308                 panic("Timer1 is not present!\n");
 309
 310 #ifdef CONFIG_ARC_HAS_DCCM
 311         /*
 312          * DCCM can be arbit placed in hardware.
 313          * Make sure it's placement/sz matches what Linux is built with
 314          */
 315         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 316                 panic("Linux built with incorrect DCCM Base address\n");
 317
 318         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 319                 panic("Linux built with incorrect DCCM Size\n");
 320 #endif
 321
 322 #ifdef CONFIG_ARC_HAS_ICCM
 323         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 324                 panic("Linux built with incorrect ICCM Size\n");
 325 #endif
 326
 327         /*
 328          * FP hardware/software config sanity
 329          * -If hardware contains DPFP, kernel needs to save/restore FPU state
 330          * -If not, it will crash trying to save/restore the non-existant regs
 331          *
 332          * (only DPDP checked since SP has no arch visible regs)
 333          */
 334         fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 335
 336         if (cpu->extn.fpu_dp && !fpu_enabled)
 337                 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 338         else if (!cpu->extn.fpu_dp && fpu_enabled)
 339                 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
 340 }
 341
 342 /*
 343  * Initialize and setup the processor core
 344  * This is called by all the CPUs thus should not do special case stuff
 345  *    such as only for boot CPU etc
 346  */
 347
 348 void setup_processor(void)
 349 {
 350         char str[512];
 351         int cpu_id = smp_processor_id();
 352
 353         read_arc_build_cfg_regs();
 354         arc_init_IRQ();
 355
 356         printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 357
 358         arc_mmu_init();
 359         arc_cache_init();
 360
 361         printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 362         printk(arc_platform_smp_cpuinfo());
 363
 364         arc_chk_core_config();
 365 }
 366
 367 static inline int is_kernel(unsigned long addr)
 368 {
 369         if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
 370                 return 1;
 371         return 0;
 372 }
 373
 374 void __init setup_arch(char **cmdline_p)
 375 {
 376 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 377         /* make sure that uboot passed pointer to cmdline/dtb is valid */
 378         if (uboot_tag && is_kernel((unsigned long)uboot_arg))
 379                 panic("Invalid uboot arg\n");
 380
 381         /* See if u-boot passed an external Device Tree blob */
 382         machine_desc = setup_machine_fdt(uboot_arg);    /* uboot_tag == 2 */
 383         if (!machine_desc)
 384 #endif
 385         {
 386                 /* No, so try the embedded one */
 387                 machine_desc = setup_machine_fdt(__dtb_start);
 388                 if (!machine_desc)
 389                         panic("Embedded DT invalid\n");
 390
 391                 /*
 392                  * If we are here, it is established that @uboot_arg didn't
 393                  * point to DT blob. Instead if u-boot says it is cmdline,
 394                  * append to embedded DT cmdline.
 395                  * setup_machine_fdt() would have populated @boot_command_line
 396                  */
 397                 if (uboot_tag == 1) {
 398                         /* Ensure a whitespace between the 2 cmdlines */
 399                         strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 400                         strlcat(boot_command_line, uboot_arg,
 401                                 COMMAND_LINE_SIZE);
 402                 }
 403         }
 404
 405         /* Save unparsed command line copy for /proc/cmdline */
 406         *cmdline_p = boot_command_line;
 407
 408         /* To force early parsing of things like mem=xxx */
 409         parse_early_param();
 410
 411         /* Platform/board specific: e.g. early console registration */
 412         if (machine_desc->init_early)
 413                 machine_desc->init_early();
 414
 415         smp_init_cpus();
 416
 417         setup_processor();
 418         setup_arch_memory();
 419
 420         /* copy flat DT out of .init and then unflatten it */
 421         unflatten_and_copy_device_tree();
 422
 423         /* Can be issue if someone passes cmd line arg "ro"
 424          * But that is unlikely so keeping it as it is
 425          */
 426         root_mountflags &= ~MS_RDONLY;
 427
 428 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 429         conswitchp = &dummy_con;
 430 #endif
 431
 432         arc_unwind_init();
 433 }
 434
 435 static int __init customize_machine(void)
 436 {
 437         if (machine_desc->init_machine)
 438                 machine_desc->init_machine();
 439
 440         return 0;
 441 }
 442 arch_initcall(customize_machine);
 443
 444 static int __init init_late_machine(void)
 445 {
 446         if (machine_desc->init_late)
 447                 machine_desc->init_late();
 448
 449         return 0;
 450 }
 451 late_initcall(init_late_machine);
 452 /*
 453  *  Get CPU information for use by the procfs.
 454  */
 455
 456 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 457 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 458
 459 static int show_cpuinfo(struct seq_file *m, void *v)
 460 {
 461         char *str;
 462         int cpu_id = ptr_to_cpu(v);
 463         struct device_node *core_clk = of_find_node_by_name(NULL, "core_clk");
 464         u32 freq = 0;
 465
 466         if (!cpu_online(cpu_id)) {
 467                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 468                 goto done;
 469         }
 470
 471         str = (char *)__get_free_page(GFP_TEMPORARY);
 472         if (!str)
 473                 goto done;
 474
 475         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 476
 477         of_property_read_u32(core_clk, "clock-frequency", &freq);
 478         if (freq)
 479                 seq_printf(m, "CPU speed\t: %u.%02u Mhz\n",
 480                            freq / 1000000, (freq / 10000) % 100);
 481
 482         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 483                    loops_per_jiffy / (500000 / HZ),
 484                    (loops_per_jiffy / (5000 / HZ)) % 100);
 485
 486         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 487         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 488         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 489         seq_printf(m, arc_platform_smp_cpuinfo());
 490
 491         free_page((unsigned long)str);
 492 done:
 493         seq_printf(m, "\n");
 494
 495         return 0;
 496 }
 497
 498 static void *c_start(struct seq_file *m, loff_t *pos)
 499 {
 500         /*
 501          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 502          * However since NULL is also a valid cpu-id (0), we use a round-about
 503          * way to pass it w/o having to kmalloc/free a 2 byte string.
 504          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 505          */
 506         return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
 507 }
 508
 509 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 510 {
 511         ++*pos;
 512         return c_start(m, pos);
 513 }
 514
 515 static void c_stop(struct seq_file *m, void *v)
 516 {
 517 }
 518
 519 const struct seq_operations cpuinfo_op = {
 520         .start  = c_start,
 521         .next   = c_next,
 522         .stop   = c_stop,
 523         .show   = show_cpuinfo
 524 };
 525
 526 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 527
 528 static int __init topology_init(void)
 529 {
 530         int cpu;
 531
 532         for_each_present_cpu(cpu)
 533             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 534
 535         return 0;
 536 }
 537
 538 subsys_initcall(topology_init);