arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/console.h>
  14 #include <linux/module.h>
  15 #include <linux/cpu.h>
  16 #include <linux/of_fdt.h>
  17 #include <linux/of_platform.h>
  18 #include <linux/cache.h>
  19 #include <asm/sections.h>
  20 #include <asm/arcregs.h>
  21 #include <asm/tlb.h>
  22 #include <asm/setup.h>
  23 #include <asm/page.h>
  24 #include <asm/irq.h>
  25 #include <asm/unwind.h>
  26 #include <asm/clk.h>
  27 #include <asm/mach_desc.h>
  28 #include <asm/smp.h>
  29
  30 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  31
  32 unsigned int intr_to_DE_cnt;
  33
  34 /* Part of U-boot ABI: see head.S */
  35 int __initdata uboot_tag;
  36 char __initdata *uboot_arg;
  37
  38 const struct machine_desc *machine_desc;
  39
  40 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  41
  42 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  43
  44 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  45 {
  46         if (is_isa_arcompact()) {
  47                 struct bcr_iccm_arcompact iccm;
  48                 struct bcr_dccm_arcompact dccm;
  49
  50                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  51                 if (iccm.ver) {
  52                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  53                         cpu->iccm.base_addr = iccm.base << 16;
  54                 }
  55
  56                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  57                 if (dccm.ver) {
  58                         unsigned long base;
  59                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  60
  61                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  62                         cpu->dccm.base_addr = base & ~0xF;
  63                 }
  64         } else {
  65                 struct bcr_iccm_arcv2 iccm;
  66                 struct bcr_dccm_arcv2 dccm;
  67                 unsigned long region;
  68
  69                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  70                 if (iccm.ver) {
  71                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
  72                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
  73                                 cpu->iccm.sz <<= iccm.sz01;
  74
  75                         region = read_aux_reg(ARC_REG_AUX_ICCM);
  76                         cpu->iccm.base_addr = region & 0xF0000000;
  77                 }
  78
  79                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  80                 if (dccm.ver) {
  81                         cpu->dccm.sz = 256 << dccm.sz0;
  82                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
  83                                 cpu->dccm.sz <<= dccm.sz1;
  84
  85                         region = read_aux_reg(ARC_REG_AUX_DCCM);
  86                         cpu->dccm.base_addr = region & 0xF0000000;
  87                 }
  88         }
  89 }
  90
  91 static void read_arc_build_cfg_regs(void)
  92 {
  93         struct bcr_timer timer;
  94         struct bcr_generic bcr;
  95         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  96         FIX_PTR(cpu);
  97
  98         READ_BCR(AUX_IDENTITY, cpu->core);
  99         READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
 100
 101         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 102         cpu->extn.timer0 = timer.t0;
 103         cpu->extn.timer1 = timer.t1;
 104         cpu->extn.rtc = timer.rtc;
 105
 106         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 107
 108         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 109
 110         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 111         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 112         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 113         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 114         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 115         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 116
 117         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 118         read_decode_ccm_bcr(cpu);
 119
 120         read_decode_mmu_bcr();
 121         read_decode_cache_bcr();
 122
 123         if (is_isa_arcompact()) {
 124                 struct bcr_fp_arcompact sp, dp;
 125                 struct bcr_bpu_arcompact bpu;
 126
 127                 READ_BCR(ARC_REG_FP_BCR, sp);
 128                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 129                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 130                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 131
 132                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 133                 cpu->bpu.ver = bpu.ver;
 134                 cpu->bpu.full = bpu.fam ? 1 : 0;
 135                 if (bpu.ent) {
 136                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 137                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 138                 }
 139         } else {
 140                 struct bcr_fp_arcv2 spdp;
 141                 struct bcr_bpu_arcv2 bpu;
 142
 143                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 144                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 145                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 146
 147                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 148                 cpu->bpu.ver = bpu.ver;
 149                 cpu->bpu.full = bpu.ft;
 150                 cpu->bpu.num_cache = 256 << bpu.bce;
 151                 cpu->bpu.num_pred = 2048 << bpu.pte;
 152         }
 153
 154         READ_BCR(ARC_REG_AP_BCR, bcr);
 155         cpu->extn.ap = bcr.ver ? 1 : 0;
 156
 157         READ_BCR(ARC_REG_SMART_BCR, bcr);
 158         cpu->extn.smart = bcr.ver ? 1 : 0;
 159
 160         READ_BCR(ARC_REG_RTT_BCR, bcr);
 161         cpu->extn.rtt = bcr.ver ? 1 : 0;
 162
 163         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 164 }
 165
 166 static const struct cpuinfo_data arc_cpu_tbl[] = {
 167 #ifdef CONFIG_ISA_ARCOMPACT
 168         { {0x20, "ARC 600"      }, 0x2F},
 169         { {0x30, "ARC 700"      }, 0x33},
 170         { {0x34, "ARC 700 R4.10"}, 0x34},
 171         { {0x35, "ARC 700 R4.11"}, 0x35},
 172 #else
 173         { {0x50, "ARC HS38 R2.0"}, 0x51},
 174         { {0x52, "ARC HS38 R2.1"}, 0x52},
 175 #endif
 176         { {0x00, NULL           } }
 177 };
 178
 179
 180 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 181 {
 182         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 183         struct bcr_identity *core = &cpu->core;
 184         const struct cpuinfo_data *tbl;
 185         char *isa_nm;
 186         int i, be, atomic;
 187         int n = 0;
 188
 189         FIX_PTR(cpu);
 190
 191         if (is_isa_arcompact()) {
 192                 isa_nm = "ARCompact";
 193                 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 194
 195                 atomic = cpu->isa.atomic1;
 196                 if (!cpu->isa.ver)      /* ISA BCR absent, use Kconfig info */
 197                         atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 198         } else {
 199                 isa_nm = "ARCv2";
 200                 be = cpu->isa.be;
 201                 atomic = cpu->isa.atomic;
 202         }
 203
 204         n += scnprintf(buf + n, len - n,
 205                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 206                        core->family, core->cpu_id, core->chip_id);
 207
 208         for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
 209                 if ((core->family >= tbl->info.id) &&
 210                     (core->family <= tbl->up_range)) {
 211                         n += scnprintf(buf + n, len - n,
 212                                        "processor [%d]\t: %s (%s ISA) %s\n",
 213                                        cpu_id, tbl->info.str, isa_nm,
 214                                        IS_AVAIL1(be, "[Big-Endian]"));
 215                         break;
 216                 }
 217         }
 218
 219         if (tbl->info.id == 0)
 220                 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
 221
 222         n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
 223                        (unsigned int)(arc_get_core_freq() / 1000000),
 224                        (unsigned int)(arc_get_core_freq() / 10000) % 100);
 225
 226         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
 227                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 228                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 229                        IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
 230                                  CONFIG_ARC_HAS_RTC));
 231
 232         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 233                            IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 234                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 235                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 236
 237         if (i)
 238                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 239
 240         if (cpu->extn_mpy.ver) {
 241                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 242                         n += scnprintf(buf + n, len - n, "mpy ");
 243                 } else {
 244                         int opt = 2;    /* stock MPY/MPYH */
 245
 246                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 247                                 opt = cpu->extn_mpy.dsp + 6;
 248
 249                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 250                 }
 251         }
 252
 253         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 254                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 255                        IS_AVAIL1(cpu->extn.norm, "norm "),
 256                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 257                        IS_AVAIL1(cpu->extn.swap, "swap "),
 258                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 259                        IS_AVAIL1(cpu->extn.crc, "crc "),
 260                        IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
 261
 262         if (cpu->bpu.ver)
 263                 n += scnprintf(buf + n, len - n,
 264                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 265                               IS_AVAIL1(cpu->bpu.full, "full"),
 266                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 267                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 268
 269         return buf;
 270 }
 271
 272 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 273 {
 274         int n = 0;
 275         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 276
 277         FIX_PTR(cpu);
 278
 279         n += scnprintf(buf + n, len - n,
 280                        "Vector Table\t: %#x\nUncached Base\t: %#lx\n",
 281                        cpu->vec_base, perip_base);
 282
 283         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 284                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 285                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 286                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 287
 288         if (cpu->extn.debug)
 289                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 290                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 291                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 292                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 293
 294         if (cpu->dccm.sz || cpu->iccm.sz)
 295                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 296                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 297                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 298
 299         n += scnprintf(buf + n, len - n,
 300                        "OS ABI [v3]\t: no-legacy-syscalls\n");
 301
 302         return buf;
 303 }
 304
 305 static void arc_chk_core_config(void)
 306 {
 307         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 308         int fpu_enabled;
 309
 310         if (!cpu->extn.timer0)
 311                 panic("Timer0 is not present!\n");
 312
 313         if (!cpu->extn.timer1)
 314                 panic("Timer1 is not present!\n");
 315
 316 #ifdef CONFIG_ARC_HAS_DCCM
 317         /*
 318          * DCCM can be arbit placed in hardware.
 319          * Make sure it's placement/sz matches what Linux is built with
 320          */
 321         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 322                 panic("Linux built with incorrect DCCM Base address\n");
 323
 324         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 325                 panic("Linux built with incorrect DCCM Size\n");
 326 #endif
 327
 328 #ifdef CONFIG_ARC_HAS_ICCM
 329         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 330                 panic("Linux built with incorrect ICCM Size\n");
 331 #endif
 332
 333         /*
 334          * FP hardware/software config sanity
 335          * -If hardware contains DPFP, kernel needs to save/restore FPU state
 336          * -If not, it will crash trying to save/restore the non-existant regs
 337          *
 338          * (only DPDP checked since SP has no arch visible regs)
 339          */
 340         fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 341
 342         if (cpu->extn.fpu_dp && !fpu_enabled)
 343                 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 344         else if (!cpu->extn.fpu_dp && fpu_enabled)
 345                 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
 346 }
 347
 348 /*
 349  * Initialize and setup the processor core
 350  * This is called by all the CPUs thus should not do special case stuff
 351  *    such as only for boot CPU etc
 352  */
 353
 354 void setup_processor(void)
 355 {
 356         char str[512];
 357         int cpu_id = smp_processor_id();
 358
 359         read_arc_build_cfg_regs();
 360         arc_init_IRQ();
 361
 362         printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 363
 364         arc_mmu_init();
 365         arc_cache_init();
 366
 367         printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 368         printk(arc_platform_smp_cpuinfo());
 369
 370         arc_chk_core_config();
 371 }
 372
 373 static inline int is_kernel(unsigned long addr)
 374 {
 375         if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
 376                 return 1;
 377         return 0;
 378 }
 379
 380 void __init setup_arch(char **cmdline_p)
 381 {
 382 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 383         /* make sure that uboot passed pointer to cmdline/dtb is valid */
 384         if (uboot_tag && is_kernel((unsigned long)uboot_arg))
 385                 panic("Invalid uboot arg\n");
 386
 387         /* See if u-boot passed an external Device Tree blob */
 388         machine_desc = setup_machine_fdt(uboot_arg);    /* uboot_tag == 2 */
 389         if (!machine_desc)
 390 #endif
 391         {
 392                 /* No, so try the embedded one */
 393                 machine_desc = setup_machine_fdt(__dtb_start);
 394                 if (!machine_desc)
 395                         panic("Embedded DT invalid\n");
 396
 397                 /*
 398                  * If we are here, it is established that @uboot_arg didn't
 399                  * point to DT blob. Instead if u-boot says it is cmdline,
 400                  * Appent to embedded DT cmdline.
 401                  * setup_machine_fdt() would have populated @boot_command_line
 402                  */
 403                 if (uboot_tag == 1) {
 404                         /* Ensure a whitespace between the 2 cmdlines */
 405                         strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 406                         strlcat(boot_command_line, uboot_arg,
 407                                 COMMAND_LINE_SIZE);
 408                 }
 409         }
 410
 411         /* Save unparsed command line copy for /proc/cmdline */
 412         *cmdline_p = boot_command_line;
 413
 414         /* To force early parsing of things like mem=xxx */
 415         parse_early_param();
 416
 417         /* Platform/board specific: e.g. early console registration */
 418         if (machine_desc->init_early)
 419                 machine_desc->init_early();
 420
 421         smp_init_cpus();
 422
 423         setup_processor();
 424         setup_arch_memory();
 425
 426         /* copy flat DT out of .init and then unflatten it */
 427         unflatten_and_copy_device_tree();
 428
 429         /* Can be issue if someone passes cmd line arg "ro"
 430          * But that is unlikely so keeping it as it is
 431          */
 432         root_mountflags &= ~MS_RDONLY;
 433
 434 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 435         conswitchp = &dummy_con;
 436 #endif
 437
 438         arc_unwind_init();
 439 }
 440
 441 static int __init customize_machine(void)
 442 {
 443         /*
 444          * Traverses flattened DeviceTree - registering platform devices
 445          * (if any) complete with their resources
 446          */
 447         of_platform_default_populate(NULL, NULL, NULL);
 448
 449         if (machine_desc->init_machine)
 450                 machine_desc->init_machine();
 451
 452         return 0;
 453 }
 454 arch_initcall(customize_machine);
 455
 456 static int __init init_late_machine(void)
 457 {
 458         if (machine_desc->init_late)
 459                 machine_desc->init_late();
 460
 461         return 0;
 462 }
 463 late_initcall(init_late_machine);
 464 /*
 465  *  Get CPU information for use by the procfs.
 466  */
 467
 468 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 469 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 470
 471 static int show_cpuinfo(struct seq_file *m, void *v)
 472 {
 473         char *str;
 474         int cpu_id = ptr_to_cpu(v);
 475
 476         if (!cpu_online(cpu_id)) {
 477                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 478                 goto done;
 479         }
 480
 481         str = (char *)__get_free_page(GFP_TEMPORARY);
 482         if (!str)
 483                 goto done;
 484
 485         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 486
 487         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 488                    loops_per_jiffy / (500000 / HZ),
 489                    (loops_per_jiffy / (5000 / HZ)) % 100);
 490
 491         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 492         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 493         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 494         seq_printf(m, arc_platform_smp_cpuinfo());
 495
 496         free_page((unsigned long)str);
 497 done:
 498         seq_printf(m, "\n");
 499
 500         return 0;
 501 }
 502
 503 static void *c_start(struct seq_file *m, loff_t *pos)
 504 {
 505         /*
 506          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 507          * However since NULL is also a valid cpu-id (0), we use a round-about
 508          * way to pass it w/o having to kmalloc/free a 2 byte string.
 509          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 510          */
 511         return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
 512 }
 513
 514 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 515 {
 516         ++*pos;
 517         return c_start(m, pos);
 518 }
 519
 520 static void c_stop(struct seq_file *m, void *v)
 521 {
 522 }
 523
 524 const struct seq_operations cpuinfo_op = {
 525         .start  = c_start,
 526         .next   = c_next,
 527         .stop   = c_stop,
 528         .show   = show_cpuinfo
 529 };
 530
 531 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 532
 533 static int __init topology_init(void)
 534 {
 535         int cpu;
 536
 537         for_each_present_cpu(cpu)
 538             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 539
 540         return 0;
 541 }
 542
 543 subsys_initcall(topology_init);