arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/console.h>
  14 #include <linux/module.h>
  15 #include <linux/cpu.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/of_fdt.h>
  18 #include <linux/of_platform.h>
  19 #include <linux/cache.h>
  20 #include <asm/sections.h>
  21 #include <asm/arcregs.h>
  22 #include <asm/tlb.h>
  23 #include <asm/setup.h>
  24 #include <asm/page.h>
  25 #include <asm/irq.h>
  26 #include <asm/unwind.h>
  27 #include <asm/clk.h>
  28 #include <asm/mach_desc.h>
  29 #include <asm/smp.h>
  30
  31 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  32
  33 unsigned int intr_to_DE_cnt;
  34
  35 /* Part of U-boot ABI: see head.S */
  36 int __initdata uboot_tag;
  37 char __initdata *uboot_arg;
  38
  39 const struct machine_desc *machine_desc;
  40
  41 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  42
  43 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  44
  45 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  46 {
  47         if (is_isa_arcompact()) {
  48                 struct bcr_iccm_arcompact iccm;
  49                 struct bcr_dccm_arcompact dccm;
  50
  51                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  52                 if (iccm.ver) {
  53                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  54                         cpu->iccm.base_addr = iccm.base << 16;
  55                 }
  56
  57                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  58                 if (dccm.ver) {
  59                         unsigned long base;
  60                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  61
  62                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  63                         cpu->dccm.base_addr = base & ~0xF;
  64                 }
  65         } else {
  66                 struct bcr_iccm_arcv2 iccm;
  67                 struct bcr_dccm_arcv2 dccm;
  68                 unsigned long region;
  69
  70                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  71                 if (iccm.ver) {
  72                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
  73                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
  74                                 cpu->iccm.sz <<= iccm.sz01;
  75
  76                         region = read_aux_reg(ARC_REG_AUX_ICCM);
  77                         cpu->iccm.base_addr = region & 0xF0000000;
  78                 }
  79
  80                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  81                 if (dccm.ver) {
  82                         cpu->dccm.sz = 256 << dccm.sz0;
  83                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
  84                                 cpu->dccm.sz <<= dccm.sz1;
  85
  86                         region = read_aux_reg(ARC_REG_AUX_DCCM);
  87                         cpu->dccm.base_addr = region & 0xF0000000;
  88                 }
  89         }
  90 }
  91
  92 static void read_arc_build_cfg_regs(void)
  93 {
  94         struct bcr_timer timer;
  95         struct bcr_generic bcr;
  96         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  97         FIX_PTR(cpu);
  98
  99         READ_BCR(AUX_IDENTITY, cpu->core);
 100         READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
 101
 102         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 103         cpu->extn.timer0 = timer.t0;
 104         cpu->extn.timer1 = timer.t1;
 105         cpu->extn.rtc = timer.rtc;
 106
 107         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 108
 109         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 110
 111         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 112         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 113         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 114         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 115         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 116         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 117
 118         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 119         read_decode_ccm_bcr(cpu);
 120
 121         read_decode_mmu_bcr();
 122         read_decode_cache_bcr();
 123
 124         if (is_isa_arcompact()) {
 125                 struct bcr_fp_arcompact sp, dp;
 126                 struct bcr_bpu_arcompact bpu;
 127
 128                 READ_BCR(ARC_REG_FP_BCR, sp);
 129                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 130                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 131                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 132
 133                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 134                 cpu->bpu.ver = bpu.ver;
 135                 cpu->bpu.full = bpu.fam ? 1 : 0;
 136                 if (bpu.ent) {
 137                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 138                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 139                 }
 140         } else {
 141                 struct bcr_fp_arcv2 spdp;
 142                 struct bcr_bpu_arcv2 bpu;
 143
 144                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 145                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 146                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 147
 148                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 149                 cpu->bpu.ver = bpu.ver;
 150                 cpu->bpu.full = bpu.ft;
 151                 cpu->bpu.num_cache = 256 << bpu.bce;
 152                 cpu->bpu.num_pred = 2048 << bpu.pte;
 153         }
 154
 155         READ_BCR(ARC_REG_AP_BCR, bcr);
 156         cpu->extn.ap = bcr.ver ? 1 : 0;
 157
 158         READ_BCR(ARC_REG_SMART_BCR, bcr);
 159         cpu->extn.smart = bcr.ver ? 1 : 0;
 160
 161         READ_BCR(ARC_REG_RTT_BCR, bcr);
 162         cpu->extn.rtt = bcr.ver ? 1 : 0;
 163
 164         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 165 }
 166
 167 static const struct cpuinfo_data arc_cpu_tbl[] = {
 168 #ifdef CONFIG_ISA_ARCOMPACT
 169         { {0x20, "ARC 600"      }, 0x2F},
 170         { {0x30, "ARC 700"      }, 0x33},
 171         { {0x34, "ARC 700 R4.10"}, 0x34},
 172         { {0x35, "ARC 700 R4.11"}, 0x35},
 173 #else
 174         { {0x50, "ARC HS38 R2.0"}, 0x51},
 175         { {0x52, "ARC HS38 R2.1"}, 0x52},
 176 #endif
 177         { {0x00, NULL           } }
 178 };
 179
 180
 181 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 182 {
 183         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 184         struct bcr_identity *core = &cpu->core;
 185         const struct cpuinfo_data *tbl;
 186         char *isa_nm;
 187         int i, be, atomic;
 188         int n = 0;
 189
 190         FIX_PTR(cpu);
 191
 192         if (is_isa_arcompact()) {
 193                 isa_nm = "ARCompact";
 194                 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 195
 196                 atomic = cpu->isa.atomic1;
 197                 if (!cpu->isa.ver)      /* ISA BCR absent, use Kconfig info */
 198                         atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 199         } else {
 200                 isa_nm = "ARCv2";
 201                 be = cpu->isa.be;
 202                 atomic = cpu->isa.atomic;
 203         }
 204
 205         n += scnprintf(buf + n, len - n,
 206                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 207                        core->family, core->cpu_id, core->chip_id);
 208
 209         for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
 210                 if ((core->family >= tbl->info.id) &&
 211                     (core->family <= tbl->up_range)) {
 212                         n += scnprintf(buf + n, len - n,
 213                                        "processor [%d]\t: %s (%s ISA) %s\n",
 214                                        cpu_id, tbl->info.str, isa_nm,
 215                                        IS_AVAIL1(be, "[Big-Endian]"));
 216                         break;
 217                 }
 218         }
 219
 220         if (tbl->info.id == 0)
 221                 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
 222
 223         n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
 224                        (unsigned int)(arc_get_core_freq() / 1000000),
 225                        (unsigned int)(arc_get_core_freq() / 10000) % 100);
 226
 227         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
 228                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 229                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 230                        IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
 231                                  CONFIG_ARC_HAS_RTC));
 232
 233         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 234                            IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 235                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 236                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 237
 238         if (i)
 239                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 240
 241         if (cpu->extn_mpy.ver) {
 242                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 243                         n += scnprintf(buf + n, len - n, "mpy ");
 244                 } else {
 245                         int opt = 2;    /* stock MPY/MPYH */
 246
 247                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 248                                 opt = cpu->extn_mpy.dsp + 6;
 249
 250                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 251                 }
 252         }
 253
 254         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 255                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 256                        IS_AVAIL1(cpu->extn.norm, "norm "),
 257                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 258                        IS_AVAIL1(cpu->extn.swap, "swap "),
 259                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 260                        IS_AVAIL1(cpu->extn.crc, "crc "),
 261                        IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
 262
 263         if (cpu->bpu.ver)
 264                 n += scnprintf(buf + n, len - n,
 265                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 266                               IS_AVAIL1(cpu->bpu.full, "full"),
 267                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 268                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 269
 270         return buf;
 271 }
 272
 273 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 274 {
 275         int n = 0;
 276         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 277
 278         FIX_PTR(cpu);
 279
 280         n += scnprintf(buf + n, len - n,
 281                        "Vector Table\t: %#x\nUncached Base\t: %#lx\n",
 282                        cpu->vec_base, perip_base);
 283
 284         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 285                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 286                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 287                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 288
 289         if (cpu->extn.debug)
 290                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 291                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 292                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 293                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 294
 295         if (cpu->dccm.sz || cpu->iccm.sz)
 296                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 297                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 298                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 299
 300         n += scnprintf(buf + n, len - n,
 301                        "OS ABI [v3]\t: no-legacy-syscalls\n");
 302
 303         return buf;
 304 }
 305
 306 static void arc_chk_core_config(void)
 307 {
 308         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 309         int fpu_enabled;
 310
 311         if (!cpu->extn.timer0)
 312                 panic("Timer0 is not present!\n");
 313
 314         if (!cpu->extn.timer1)
 315                 panic("Timer1 is not present!\n");
 316
 317         if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->extn.rtc)
 318                 panic("RTC is not present\n");
 319
 320 #ifdef CONFIG_ARC_HAS_DCCM
 321         /*
 322          * DCCM can be arbit placed in hardware.
 323          * Make sure it's placement/sz matches what Linux is built with
 324          */
 325         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 326                 panic("Linux built with incorrect DCCM Base address\n");
 327
 328         if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
 329                 panic("Linux built with incorrect DCCM Size\n");
 330 #endif
 331
 332 #ifdef CONFIG_ARC_HAS_ICCM
 333         if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
 334                 panic("Linux built with incorrect ICCM Size\n");
 335 #endif
 336
 337         /*
 338          * FP hardware/software config sanity
 339          * -If hardware contains DPFP, kernel needs to save/restore FPU state
 340          * -If not, it will crash trying to save/restore the non-existant regs
 341          *
 342          * (only DPDP checked since SP has no arch visible regs)
 343          */
 344         fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 345
 346         if (cpu->extn.fpu_dp && !fpu_enabled)
 347                 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 348         else if (!cpu->extn.fpu_dp && fpu_enabled)
 349                 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
 350 }
 351
 352 /*
 353  * Initialize and setup the processor core
 354  * This is called by all the CPUs thus should not do special case stuff
 355  *    such as only for boot CPU etc
 356  */
 357
 358 void setup_processor(void)
 359 {
 360         char str[512];
 361         int cpu_id = smp_processor_id();
 362
 363         read_arc_build_cfg_regs();
 364         arc_init_IRQ();
 365
 366         printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 367
 368         arc_mmu_init();
 369         arc_cache_init();
 370
 371         printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 372         printk(arc_platform_smp_cpuinfo());
 373
 374         arc_chk_core_config();
 375 }
 376
 377 static inline int is_kernel(unsigned long addr)
 378 {
 379         if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
 380                 return 1;
 381         return 0;
 382 }
 383
 384 void __init setup_arch(char **cmdline_p)
 385 {
 386 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 387         /* make sure that uboot passed pointer to cmdline/dtb is valid */
 388         if (uboot_tag && is_kernel((unsigned long)uboot_arg))
 389                 panic("Invalid uboot arg\n");
 390
 391         /* See if u-boot passed an external Device Tree blob */
 392         machine_desc = setup_machine_fdt(uboot_arg);    /* uboot_tag == 2 */
 393         if (!machine_desc)
 394 #endif
 395         {
 396                 /* No, so try the embedded one */
 397                 machine_desc = setup_machine_fdt(__dtb_start);
 398                 if (!machine_desc)
 399                         panic("Embedded DT invalid\n");
 400
 401                 /*
 402                  * If we are here, it is established that @uboot_arg didn't
 403                  * point to DT blob. Instead if u-boot says it is cmdline,
 404                  * Appent to embedded DT cmdline.
 405                  * setup_machine_fdt() would have populated @boot_command_line
 406                  */
 407                 if (uboot_tag == 1) {
 408                         /* Ensure a whitespace between the 2 cmdlines */
 409                         strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 410                         strlcat(boot_command_line, uboot_arg,
 411                                 COMMAND_LINE_SIZE);
 412                 }
 413         }
 414
 415         /* Save unparsed command line copy for /proc/cmdline */
 416         *cmdline_p = boot_command_line;
 417
 418         /* To force early parsing of things like mem=xxx */
 419         parse_early_param();
 420
 421         /* Platform/board specific: e.g. early console registration */
 422         if (machine_desc->init_early)
 423                 machine_desc->init_early();
 424
 425         smp_init_cpus();
 426
 427         setup_processor();
 428         setup_arch_memory();
 429
 430         /* copy flat DT out of .init and then unflatten it */
 431         unflatten_and_copy_device_tree();
 432
 433         /* Can be issue if someone passes cmd line arg "ro"
 434          * But that is unlikely so keeping it as it is
 435          */
 436         root_mountflags &= ~MS_RDONLY;
 437
 438 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 439         conswitchp = &dummy_con;
 440 #endif
 441
 442         arc_unwind_init();
 443 }
 444
 445 static int __init customize_machine(void)
 446 {
 447         of_clk_init(NULL);
 448         /*
 449          * Traverses flattened DeviceTree - registering platform devices
 450          * (if any) complete with their resources
 451          */
 452         of_platform_default_populate(NULL, NULL, NULL);
 453
 454         if (machine_desc->init_machine)
 455                 machine_desc->init_machine();
 456
 457         return 0;
 458 }
 459 arch_initcall(customize_machine);
 460
 461 static int __init init_late_machine(void)
 462 {
 463         if (machine_desc->init_late)
 464                 machine_desc->init_late();
 465
 466         return 0;
 467 }
 468 late_initcall(init_late_machine);
 469 /*
 470  *  Get CPU information for use by the procfs.
 471  */
 472
 473 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 474 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 475
 476 static int show_cpuinfo(struct seq_file *m, void *v)
 477 {
 478         char *str;
 479         int cpu_id = ptr_to_cpu(v);
 480
 481         if (!cpu_online(cpu_id)) {
 482                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 483                 goto done;
 484         }
 485
 486         str = (char *)__get_free_page(GFP_TEMPORARY);
 487         if (!str)
 488                 goto done;
 489
 490         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 491
 492         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 493                    loops_per_jiffy / (500000 / HZ),
 494                    (loops_per_jiffy / (5000 / HZ)) % 100);
 495
 496         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 497         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 498         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 499         seq_printf(m, arc_platform_smp_cpuinfo());
 500
 501         free_page((unsigned long)str);
 502 done:
 503         seq_printf(m, "\n");
 504
 505         return 0;
 506 }
 507
 508 static void *c_start(struct seq_file *m, loff_t *pos)
 509 {
 510         /*
 511          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 512          * However since NULL is also a valid cpu-id (0), we use a round-about
 513          * way to pass it w/o having to kmalloc/free a 2 byte string.
 514          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 515          */
 516         return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
 517 }
 518
 519 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 520 {
 521         ++*pos;
 522         return c_start(m, pos);
 523 }
 524
 525 static void c_stop(struct seq_file *m, void *v)
 526 {
 527 }
 528
 529 const struct seq_operations cpuinfo_op = {
 530         .start  = c_start,
 531         .next   = c_next,
 532         .stop   = c_stop,
 533         .show   = show_cpuinfo
 534 };
 535
 536 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 537
 538 static int __init topology_init(void)
 539 {
 540         int cpu;
 541
 542         for_each_present_cpu(cpu)
 543             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 544
 545         return 0;
 546 }
 547
 548 subsys_initcall(topology_init);