arch/arm/boot/dts/am335x-igep0033.dtsi

   1 /*
   2  * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
   3  *
   4  * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 /dts-v1/;
  12
  13 #include "am33xx.dtsi"
  14
  15 / {
  16         cpus {
  17                 cpu@0 {
  18                         cpu0-supply = <&vdd1_reg>;
  19                 };
  20         };
  21
  22         memory {
  23                 device_type = "memory";
  24                 reg = <0x80000000 0x10000000>; /* 256 MB */
  25         };
  26
  27         leds {
  28                 pinctrl-names = "default";
  29                 pinctrl-0 = <&leds_pins>;
  30
  31                 compatible = "gpio-leds";
  32
  33                 led@0 {
  34                         label = "com:green:user";
  35                         gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
  36                         default-state = "on";
  37                 };
  38         };
  39
  40         vbat: fixedregulator@0 {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "vbat";
  43                 regulator-min-microvolt = <5000000>;
  44                 regulator-max-microvolt = <5000000>;
  45                 regulator-boot-on;
  46         };
  47
  48         vmmc: fixedregulator@0 {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "vmmc";
  51                 regulator-min-microvolt = <3300000>;
  52                 regulator-max-microvolt = <3300000>;
  53         };
  54 };
  55
  56 &am33xx_pinmux {
  57         i2c0_pins: pinmux_i2c0_pins {
  58                 pinctrl-single,pins = <
  59                         0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
  60                         0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
  61                 >;
  62         };
  63
  64         nandflash_pins: pinmux_nandflash_pins {
  65                 pinctrl-single,pins = <
  66                         0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
  67                         0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
  68                         0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
  69                         0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
  70                         0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
  71                         0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
  72                         0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
  73                         0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
  74                         0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
  75                         0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
  76                         0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0 */
  77                         0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
  78                         0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
  79                         0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
  80                         0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
  81                 >;
  82         };
  83
  84         uart0_pins: pinmux_uart0_pins {
  85                 pinctrl-single,pins = <
  86                         0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
  87                         0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  88                 >;
  89         };
  90
  91         leds_pins: pinmux_leds_pins {
  92                 pinctrl-single,pins = <
  93                         0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a7.gpio1_23 */
  94                 >;
  95         };
  96 };
  97
  98 &mac {
  99         status = "okay";
 100 };
 101
 102 &davinci_mdio {
 103         status = "okay";
 104 };
 105
 106 &cpsw_emac0 {
 107         phy_id = <&davinci_mdio>, <0>;
 108 };
 109
 110 &cpsw_emac1 {
 111         phy_id = <&davinci_mdio>, <1>;
 112 };
 113
 114 &elm {
 115         status = "okay";
 116 };
 117
 118 &gpmc {
 119         status = "okay";
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&nandflash_pins>;
 122
 123         ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
 124
 125         nand@0,0 {
 126                 reg = <0 0 0>; /* CS0, offset 0 */
 127                 nand-bus-width = <8>;
 128                 ti,nand-ecc-opt = "bch8";
 129                 gpmc,device-width = <1>;
 130                 gpmc,sync-clk-ps = <0>;
 131                 gpmc,cs-on-ns = <0>;
 132                 gpmc,cs-rd-off-ns = <44>;
 133                 gpmc,cs-wr-off-ns = <44>;
 134                 gpmc,adv-on-ns = <6>;
 135                 gpmc,adv-rd-off-ns = <34>;
 136                 gpmc,adv-wr-off-ns = <44>;
 137                 gpmc,we-on-ns = <0>;
 138                 gpmc,we-off-ns = <40>;
 139                 gpmc,oe-on-ns = <0>;
 140                 gpmc,oe-off-ns = <54>;
 141                 gpmc,access-ns = <64>;
 142                 gpmc,rd-cycle-ns = <82>;
 143                 gpmc,wr-cycle-ns = <82>;
 144                 gpmc,wait-on-read = "true";
 145                 gpmc,wait-on-write = "true";
 146                 gpmc,bus-turnaround-ns = <0>;
 147                 gpmc,cycle2cycle-delay-ns = <0>;
 148                 gpmc,clk-activation-ns = <0>;
 149                 gpmc,wait-monitoring-ns = <0>;
 150                 gpmc,wr-access-ns = <40>;
 151                 gpmc,wr-data-mux-bus-ns = <0>;
 152
 153                 #address-cells = <1>;
 154                 #size-cells = <1>;
 155                 elm_id = <&elm>;
 156
 157                 /* MTD partition table */
 158                 partition@0 {
 159                         label = "SPL";
 160                         reg = <0x00000000 0x000080000>;
 161                 };
 162
 163                 partition@1 {
 164                         label = "U-boot";
 165                         reg = <0x00080000 0x001e0000>;
 166                 };
 167
 168                 partition@2 {
 169                         label = "U-Boot Env";
 170                         reg = <0x00260000 0x00020000>;
 171                 };
 172
 173                 partition@3 {
 174                         label = "Kernel";
 175                         reg = <0x00280000 0x00500000>;
 176                 };
 177
 178                 partition@4 {
 179                         label = "File System";
 180                         reg = <0x00780000 0x007880000>;
 181                 };
 182         };
 183 };
 184
 185 &i2c0 {
 186         status = "okay";
 187         pinctrl-names = "default";
 188         pinctrl-0 = <&i2c0_pins>;
 189
 190         clock-frequency = <400000>;
 191
 192         tps: tps@2d {
 193                 reg = <0x2d>;
 194         };
 195 };
 196
 197 &mmc1 {
 198         status = "okay";
 199         vmmc-supply = <&vmmc>;
 200         bus-width = <4>;
 201 };
 202
 203 &uart0 {
 204         status = "okay";
 205         pinctrl-names = "default";
 206         pinctrl-0 = <&uart0_pins>;
 207 };
 208
 209 &usb {
 210         status = "okay";
 211 };
 212
 213 &usb_ctrl_mod {
 214         status = "okay";
 215 };
 216
 217 &usb0_phy {
 218         status = "okay";
 219 };
 220
 221 &usb1_phy {
 222         status = "okay";
 223 };
 224
 225 &usb0 {
 226         status = "okay";
 227 };
 228
 229 &usb1 {
 230         status = "okay";
 231         dr_mode = "host";
 232 };
 233
 234 &cppi41dma  {
 235         status = "okay";
 236 };
 237
 238 #include "tps65910.dtsi"
 239
 240 &tps {
 241         vcc1-supply = <&vbat>;
 242         vcc2-supply = <&vbat>;
 243         vcc3-supply = <&vbat>;
 244         vcc4-supply = <&vbat>;
 245         vcc5-supply = <&vbat>;
 246         vcc6-supply = <&vbat>;
 247         vcc7-supply = <&vbat>;
 248         vccio-supply = <&vbat>;
 249
 250         regulators {
 251                 vrtc_reg: regulator@0 {
 252                         regulator-always-on;
 253                 };
 254
 255                 vio_reg: regulator@1 {
 256                         regulator-always-on;
 257                 };
 258
 259                 vdd1_reg: regulator@2 {
 260                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 261                         regulator-name = "vdd_mpu";
 262                         regulator-min-microvolt = <912500>;
 263                         regulator-max-microvolt = <1312500>;
 264                         regulator-boot-on;
 265                         regulator-always-on;
 266                 };
 267
 268                 vdd2_reg: regulator@3 {
 269                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 270                         regulator-name = "vdd_core";
 271                         regulator-min-microvolt = <912500>;
 272                         regulator-max-microvolt = <1150000>;
 273                         regulator-boot-on;
 274                         regulator-always-on;
 275                 };
 276
 277                 vdd3_reg: regulator@4 {
 278                         regulator-always-on;
 279                 };
 280
 281                 vdig1_reg: regulator@5 {
 282                         regulator-always-on;
 283                 };
 284
 285                 vdig2_reg: regulator@6 {
 286                         regulator-always-on;
 287                 };
 288
 289                 vpll_reg: regulator@7 {
 290                         regulator-always-on;
 291                 };
 292
 293                 vdac_reg: regulator@8 {
 294                         regulator-always-on;
 295                 };
 296
 297                 vaux1_reg: regulator@9 {
 298                         regulator-always-on;
 299                 };
 300
 301                 vaux2_reg: regulator@10 {
 302                         regulator-always-on;
 303                 };
 304
 305                 vaux33_reg: regulator@11 {
 306                         regulator-always-on;
 307                 };
 308
 309                 vmmc_reg: regulator@12 {
 310                         regulator-always-on;
 311                 };
 312         };
 313 };
 314