arch/arm/boot/dts/dove.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   4
   5 / {
   6         compatible = "marvell,dove";
   7         model = "Marvell Armada 88AP510 SoC";
   8         interrupt-parent = <&intc>;
   9
  10         aliases {
  11                 gpio0 = &gpio0;
  12                 gpio1 = &gpio1;
  13                 gpio2 = &gpio2;
  14         };
  15
  16         cpus {
  17                 #address-cells = <1>;
  18                 #size-cells = <0>;
  19
  20                 cpu0: cpu@0 {
  21                         compatible = "marvell,pj4a", "marvell,sheeva-v7";
  22                         device_type = "cpu";
  23                         next-level-cache = <&l2>;
  24                         reg = <0>;
  25                 };
  26         };
  27
  28         l2: l2-cache {
  29                 compatible = "marvell,tauros2-cache";
  30                 marvell,tauros2-cache-features = <0>;
  31         };
  32
  33         mbus {
  34                 compatible = "marvell,dove-mbus", "marvell,mbus", "simple-bus";
  35                 #address-cells = <2>;
  36                 #size-cells = <1>;
  37                 controller = <&mbusc>;
  38                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256M MEM space */
  39                 pcie-io-aperture  = <0xf2000000 0x00200000>; /*   2M I/O space */
  40
  41                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x0100000   /* MBUS regs  1M */
  42                           MBUS_ID(0xf0, 0x02) 0 0xf1800000 0x1000000   /* AXI  regs 16M */
  43                           MBUS_ID(0x01, 0xfd) 0 0xf8000000 0x8000000   /* BootROM  128M */
  44                           MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000   /* CESA SRAM  1M */
  45                           MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU  SRAM  1M */
  46
  47                 pcie: pcie-controller {
  48                         compatible = "marvell,dove-pcie";
  49                         status = "disabled";
  50                         device_type = "pci";
  51                         #address-cells = <3>;
  52                         #size-cells = <2>;
  53
  54                         msi-parent = <&intc>;
  55                         bus-range = <0x00 0xff>;
  56
  57                         ranges = <0x82000000 0x0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x2000
  58                                   0x82000000 0x0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x2000
  59                                   0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0   /* Port 0.0 Mem */
  60                                   0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0   /* Port 0.0 I/O */
  61                                   0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0   /* Port 1.0 Mem */
  62                                   0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */
  63
  64                         pcie-port@0 {
  65                                 device_type = "pci";
  66                                 status = "disabled";
  67                                 assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
  68                                 reg = <0x0800 0 0 0 0>;
  69                                 clocks = <&gate_clk 4>;
  70                                 marvell,pcie-port = <0>;
  71
  72                                 #address-cells = <3>;
  73                                 #size-cells = <2>;
  74                                 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
  75                                           0x81000000 0 0 0x81000000 0x1 0 1 0>;
  76
  77                                 #interrupt-cells = <1>;
  78                                 interrupt-map-mask = <0 0 0 0>;
  79                                 interrupt-map = <0 0 0 0 &intc 16>;
  80                         };
  81
  82                         pcie-port@1 {
  83                                 device_type = "pci";
  84                                 status = "disabled";
  85                                 assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
  86                                 reg = <0x1000 0 0 0 0>;
  87                                 clocks = <&gate_clk 5>;
  88                                 marvell,pcie-port = <1>;
  89
  90                                 #address-cells = <3>;
  91                                 #size-cells = <2>;
  92                                 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
  93                                           0x81000000 0 0 0x81000000 0x2 0 1 0>;
  94
  95                                 #interrupt-cells = <1>;
  96                                 interrupt-map-mask = <0 0 0 0>;
  97                                 interrupt-map = <0 0 0 0 &intc 18>;
  98                         };
  99                 };
 100
 101                 internal-regs {
 102                         compatible = "simple-bus";
 103                         #address-cells = <1>;
 104                         #size-cells = <1>;
 105                         ranges = <0x00000000 MBUS_ID(0xf0, 0x01) 0 0x0100000   /* MBUS regs  1M */
 106                                   0x00800000 MBUS_ID(0xf0, 0x02) 0 0x1000000   /* AXI  regs 16M */
 107                                   0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800   /* CESA SRAM  2k */
 108                                   0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU  SRAM  2k */
 109
 110                         spi0: spi-ctrl@10600 {
 111                                 compatible = "marvell,orion-spi";
 112                                 #address-cells = <1>;
 113                                 #size-cells = <0>;
 114                                 cell-index = <0>;
 115                                 interrupts = <6>;
 116                                 reg = <0x10600 0x28>;
 117                                 clocks = <&core_clk 0>;
 118                                 pinctrl-0 = <&pmx_spi0>;
 119                                 pinctrl-names = "default";
 120                                 status = "disabled";
 121                         };
 122
 123                         i2c0: i2c-ctrl@11000 {
 124                                 compatible = "marvell,mv64xxx-i2c";
 125                                 reg = <0x11000 0x20>;
 126                                 #address-cells = <1>;
 127                                 #size-cells = <0>;
 128                                 interrupts = <11>;
 129                                 clock-frequency = <400000>;
 130                                 timeout-ms = <1000>;
 131                                 clocks = <&core_clk 0>;
 132                                 status = "disabled";
 133                         };
 134
 135                         uart0: serial@12000 {
 136                                 compatible = "ns16550a";
 137                                 reg = <0x12000 0x100>;
 138                                 reg-shift = <2>;
 139                                 interrupts = <7>;
 140                                 clocks = <&core_clk 0>;
 141                                 status = "disabled";
 142                         };
 143
 144                         uart1: serial@12100 {
 145                                 compatible = "ns16550a";
 146                                 reg = <0x12100 0x100>;
 147                                 reg-shift = <2>;
 148                                 interrupts = <8>;
 149                                 clocks = <&core_clk 0>;
 150                                 pinctrl-0 = <&pmx_uart1>;
 151                                 pinctrl-names = "default";
 152                                 status = "disabled";
 153                         };
 154
 155                         uart2: serial@12200 {
 156                                 compatible = "ns16550a";
 157                                 reg = <0x12000 0x100>;
 158                                 reg-shift = <2>;
 159                                 interrupts = <9>;
 160                                 clocks = <&core_clk 0>;
 161                                 status = "disabled";
 162                         };
 163
 164                         uart3: serial@12300 {
 165                                 compatible = "ns16550a";
 166                                 reg = <0x12100 0x100>;
 167                                 reg-shift = <2>;
 168                                 interrupts = <10>;
 169                                 clocks = <&core_clk 0>;
 170                                 status = "disabled";
 171                         };
 172
 173                         spi1: spi-ctrl@14600 {
 174                                 compatible = "marvell,orion-spi";
 175                                 #address-cells = <1>;
 176                                 #size-cells = <0>;
 177                                 cell-index = <1>;
 178                                 interrupts = <5>;
 179                                 reg = <0x14600 0x28>;
 180                                 clocks = <&core_clk 0>;
 181                                 status = "disabled";
 182                         };
 183
 184                         mbusc: mbus-ctrl@20000 {
 185                                 compatible = "marvell,mbus-controller";
 186                                 reg = <0x20000 0x80>, <0x800100 0x8>;
 187                         };
 188
 189                         bridge_intc: bridge-interrupt-ctrl@20110 {
 190                                 compatible = "marvell,orion-bridge-intc";
 191                                 interrupt-controller;
 192                                 #interrupt-cells = <1>;
 193                                 reg = <0x20110 0x8>;
 194                                 interrupts = <0>;
 195                                 marvell,#interrupts = <5>;
 196                         };
 197
 198                         intc: main-interrupt-ctrl@20200 {
 199                                 compatible = "marvell,orion-intc";
 200                                 interrupt-controller;
 201                                 #interrupt-cells = <1>;
 202                                 reg = <0x20200 0x10>, <0x20210 0x10>;
 203                         };
 204
 205                         timer: timer@20300 {
 206                                 compatible = "marvell,orion-timer";
 207                                 reg = <0x20300 0x20>;
 208                                 interrupt-parent = <&bridge_intc>;
 209                                 interrupts = <1>, <2>;
 210                                 clocks = <&core_clk 0>;
 211                         };
 212
 213                         crypto: crypto-engine@30000 {
 214                                 compatible = "marvell,orion-crypto";
 215                                 reg = <0x30000 0x10000>,
 216                                       <0xffffe000 0x800>;
 217                                 reg-names = "regs", "sram";
 218                                 interrupts = <31>;
 219                                 clocks = <&gate_clk 15>;
 220                                 status = "okay";
 221                         };
 222
 223                         ehci0: usb-host@50000 {
 224                                 compatible = "marvell,orion-ehci";
 225                                 reg = <0x50000 0x1000>;
 226                                 interrupts = <24>;
 227                                 clocks = <&gate_clk 0>;
 228                                 status = "okay";
 229                         };
 230
 231                         ehci1: usb-host@51000 {
 232                                 compatible = "marvell,orion-ehci";
 233                                 reg = <0x51000 0x1000>;
 234                                 interrupts = <25>;
 235                                 clocks = <&gate_clk 1>;
 236                                 status = "okay";
 237                         };
 238
 239                         xor0: dma-engine@60800 {
 240                                 compatible = "marvell,orion-xor";
 241                                 reg = <0x60800 0x100
 242                                        0x60a00 0x100>;
 243                                 clocks = <&gate_clk 23>;
 244                                 status = "okay";
 245
 246                                 channel0 {
 247                                         interrupts = <39>;
 248                                         dmacap,memcpy;
 249                                         dmacap,xor;
 250                                 };
 251
 252                                 channel1 {
 253                                         interrupts = <40>;
 254                                         dmacap,memcpy;
 255                                         dmacap,xor;
 256                                 };
 257                         };
 258
 259                         xor1: dma-engine@60900 {
 260                                 compatible = "marvell,orion-xor";
 261                                 reg = <0x60900 0x100
 262                                        0x60b00 0x100>;
 263                                 clocks = <&gate_clk 24>;
 264                                 status = "okay";
 265
 266                                 channel0 {
 267                                         interrupts = <42>;
 268                                         dmacap,memcpy;
 269                                         dmacap,xor;
 270                                 };
 271
 272                                 channel1 {
 273                                         interrupts = <43>;
 274                                         dmacap,memcpy;
 275                                         dmacap,xor;
 276                                 };
 277                         };
 278
 279                         sdio1: sdio-host@90000 {
 280                                 compatible = "marvell,dove-sdhci";
 281                                 reg = <0x90000 0x100>;
 282                                 interrupts = <36>, <38>;
 283                                 clocks = <&gate_clk 9>;
 284                                 pinctrl-0 = <&pmx_sdio1>;
 285                                 pinctrl-names = "default";
 286                                 status = "disabled";
 287                         };
 288
 289                         eth: ethernet-ctrl@72000 {
 290                                 compatible = "marvell,orion-eth";
 291                                 #address-cells = <1>;
 292                                 #size-cells = <0>;
 293                                 reg = <0x72000 0x4000>;
 294                                 clocks = <&gate_clk 2>;
 295                                 marvell,tx-checksum-limit = <1600>;
 296                                 status = "disabled";
 297
 298                                 ethernet-port@0 {
 299                                         compatible = "marvell,orion-eth-port";
 300                                         reg = <0>;
 301                                         interrupts = <29>;
 302                                         /* overwrite MAC address in bootloader */
 303                                         local-mac-address = [00 00 00 00 00 00];
 304                                         phy-handle = <&ethphy>;
 305                                 };
 306                         };
 307
 308                         mdio: mdio-bus@72004 {
 309                                 compatible = "marvell,orion-mdio";
 310                                 #address-cells = <1>;
 311                                 #size-cells = <0>;
 312                                 reg = <0x72004 0x84>;
 313                                 interrupts = <30>;
 314                                 clocks = <&gate_clk 2>;
 315                                 status = "disabled";
 316
 317                                 ethphy: ethernet-phy {
 318                                         /* set phy address in board file */
 319                                 };
 320                         };
 321
 322                         sdio0: sdio-host@92000 {
 323                                 compatible = "marvell,dove-sdhci";
 324                                 reg = <0x92000 0x100>;
 325                                 interrupts = <35>, <37>;
 326                                 clocks = <&gate_clk 8>;
 327                                 pinctrl-0 = <&pmx_sdio0>;
 328                                 pinctrl-names = "default";
 329                                 status = "disabled";
 330                         };
 331
 332                         sata0: sata-host@a0000 {
 333                                 compatible = "marvell,orion-sata";
 334                                 reg = <0xa0000 0x2400>;
 335                                 interrupts = <62>;
 336                                 clocks = <&gate_clk 3>;
 337                                 phys = <&sata_phy0>;
 338                                 phy-names = "port0";
 339                                 nr-ports = <1>;
 340                                 status = "disabled";
 341                         };
 342
 343                         sata_phy0: sata-phy@a2000 {
 344                                 compatible = "marvell,mvebu-sata-phy";
 345                                 reg = <0xa2000 0x0334>;
 346                                 clocks = <&gate_clk 3>;
 347                                 clock-names = "sata";
 348                                 #phy-cells = <0>;
 349                                 status = "ok";
 350                         };
 351
 352                         audio0: audio-controller@b0000 {
 353                                 compatible = "marvell,dove-audio";
 354                                 reg = <0xb0000 0x2210>;
 355                                 interrupts = <19>, <20>;
 356                                 clocks = <&gate_clk 12>;
 357                                 clock-names = "internal";
 358                                 status = "disabled";
 359                         };
 360
 361                         audio1: audio-controller@b4000 {
 362                                 compatible = "marvell,dove-audio";
 363                                 reg = <0xb4000 0x2210>;
 364                                 interrupts = <21>, <22>;
 365                                 clocks = <&gate_clk 13>;
 366                                 clock-names = "internal";
 367                                 status = "disabled";
 368                         };
 369
 370                         thermal: thermal-diode@d001c {
 371                                 compatible = "marvell,dove-thermal";
 372                                 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
 373                         };
 374
 375                         gate_clk: clock-gating-ctrl@d0038 {
 376                                 compatible = "marvell,dove-gating-clock";
 377                                 reg = <0xd0038 0x4>;
 378                                 clocks = <&core_clk 0>;
 379                                 #clock-cells = <1>;
 380                         };
 381
 382                         pmu_intc: pmu-interrupt-ctrl@d0050 {
 383                                 compatible = "marvell,dove-pmu-intc";
 384                                 interrupt-controller;
 385                                 #interrupt-cells = <1>;
 386                                 reg = <0xd0050 0x8>;
 387                                 interrupts = <33>;
 388                                 marvell,#interrupts = <7>;
 389                         };
 390
 391                         pinctrl: pin-ctrl@d0200 {
 392                                 compatible = "marvell,dove-pinctrl";
 393                                 reg = <0xd0200 0x10>;
 394                                 clocks = <&gate_clk 22>;
 395
 396                                 pmx_gpio_0: pmx-gpio-0 {
 397                                         marvell,pins = "mpp0";
 398                                         marvell,function = "gpio";
 399                                 };
 400
 401                                 pmx_gpio_1: pmx-gpio-1 {
 402                                         marvell,pins = "mpp1";
 403                                         marvell,function = "gpio";
 404                                 };
 405
 406                                 pmx_gpio_2: pmx-gpio-2 {
 407                                         marvell,pins = "mpp2";
 408                                         marvell,function = "gpio";
 409                                 };
 410
 411                                 pmx_gpio_3: pmx-gpio-3 {
 412                                         marvell,pins = "mpp3";
 413                                         marvell,function = "gpio";
 414                                 };
 415
 416                                 pmx_gpio_4: pmx-gpio-4 {
 417                                         marvell,pins = "mpp4";
 418                                         marvell,function = "gpio";
 419                                 };
 420
 421                                 pmx_gpio_5: pmx-gpio-5 {
 422                                         marvell,pins = "mpp5";
 423                                         marvell,function = "gpio";
 424                                 };
 425
 426                                 pmx_gpio_6: pmx-gpio-6 {
 427                                         marvell,pins = "mpp6";
 428                                         marvell,function = "gpio";
 429                                 };
 430
 431                                 pmx_gpio_7: pmx-gpio-7 {
 432                                         marvell,pins = "mpp7";
 433                                         marvell,function = "gpio";
 434                                 };
 435
 436                                 pmx_gpio_8: pmx-gpio-8 {
 437                                         marvell,pins = "mpp8";
 438                                         marvell,function = "gpio";
 439                                 };
 440
 441                                 pmx_gpio_9: pmx-gpio-9 {
 442                                         marvell,pins = "mpp9";
 443                                         marvell,function = "gpio";
 444                                 };
 445
 446                                 pmx_gpio_10: pmx-gpio-10 {
 447                                         marvell,pins = "mpp10";
 448                                         marvell,function = "gpio";
 449                                 };
 450
 451                                 pmx_gpio_11: pmx-gpio-11 {
 452                                         marvell,pins = "mpp11";
 453                                         marvell,function = "gpio";
 454                                 };
 455
 456                                 pmx_gpio_12: pmx-gpio-12 {
 457                                         marvell,pins = "mpp12";
 458                                         marvell,function = "gpio";
 459                                 };
 460
 461                                 pmx_gpio_13: pmx-gpio-13 {
 462                                         marvell,pins = "mpp13";
 463                                         marvell,function = "gpio";
 464                                 };
 465
 466                                 pmx_audio1_extclk: pmx-audio1-extclk {
 467                                         marvell,pins = "mpp13";
 468                                         marvell,function = "audio1";
 469                                 };
 470
 471                                 pmx_gpio_14: pmx-gpio-14 {
 472                                         marvell,pins = "mpp14";
 473                                         marvell,function = "gpio";
 474                                 };
 475
 476                                 pmx_gpio_15: pmx-gpio-15 {
 477                                         marvell,pins = "mpp15";
 478                                         marvell,function = "gpio";
 479                                 };
 480
 481                                 pmx_gpio_16: pmx-gpio-16 {
 482                                         marvell,pins = "mpp16";
 483                                         marvell,function = "gpio";
 484                                 };
 485
 486                                 pmx_gpio_17: pmx-gpio-17 {
 487                                         marvell,pins = "mpp17";
 488                                         marvell,function = "gpio";
 489                                 };
 490
 491                                 pmx_gpio_18: pmx-gpio-18 {
 492                                         marvell,pins = "mpp18";
 493                                         marvell,function = "gpio";
 494                                 };
 495
 496                                 pmx_gpio_19: pmx-gpio-19 {
 497                                         marvell,pins = "mpp19";
 498                                         marvell,function = "gpio";
 499                                 };
 500
 501                                 pmx_gpio_20: pmx-gpio-20 {
 502                                         marvell,pins = "mpp20";
 503                                         marvell,function = "gpio";
 504                                 };
 505
 506                                 pmx_gpio_21: pmx-gpio-21 {
 507                                         marvell,pins = "mpp21";
 508                                         marvell,function = "gpio";
 509                                 };
 510
 511                                 pmx_camera: pmx-camera {
 512                                         marvell,pins = "mpp_camera";
 513                                         marvell,function = "camera";
 514                                 };
 515
 516                                 pmx_camera_gpio: pmx-camera-gpio {
 517                                         marvell,pins = "mpp_camera";
 518                                         marvell,function = "gpio";
 519                                 };
 520
 521                                 pmx_sdio0: pmx-sdio0 {
 522                                         marvell,pins = "mpp_sdio0";
 523                                         marvell,function = "sdio0";
 524                                 };
 525
 526                                 pmx_sdio0_gpio: pmx-sdio0-gpio {
 527                                         marvell,pins = "mpp_sdio0";
 528                                         marvell,function = "gpio";
 529                                 };
 530
 531                                 pmx_sdio1: pmx-sdio1 {
 532                                         marvell,pins = "mpp_sdio1";
 533                                         marvell,function = "sdio1";
 534                                 };
 535
 536                                 pmx_sdio1_gpio: pmx-sdio1-gpio {
 537                                         marvell,pins = "mpp_sdio1";
 538                                         marvell,function = "gpio";
 539                                 };
 540
 541                                 pmx_audio1_gpio: pmx-audio1-gpio {
 542                                         marvell,pins = "mpp_audio1";
 543                                         marvell,function = "gpio";
 544                                 };
 545
 546                                 pmx_audio1_i2s1_spdifo: pmx-audio1-i2s1-spdifo {
 547                                         marvell,pins = "mpp_audio1";
 548                                         marvell,function = "i2s1/spdifo";
 549                                 };
 550
 551                                 pmx_spi0: pmx-spi0 {
 552                                         marvell,pins = "mpp_spi0";
 553                                         marvell,function = "spi0";
 554                                 };
 555
 556                                 pmx_spi0_gpio: pmx-spi0-gpio {
 557                                         marvell,pins = "mpp_spi0";
 558                                         marvell,function = "gpio";
 559                                 };
 560
 561                                 pmx_uart1: pmx-uart1 {
 562                                         marvell,pins = "mpp_uart1";
 563                                         marvell,function = "uart1";
 564                                 };
 565
 566                                 pmx_uart1_gpio: pmx-uart1-gpio {
 567                                         marvell,pins = "mpp_uart1";
 568                                         marvell,function = "gpio";
 569                                 };
 570
 571                                 pmx_nand: pmx-nand {
 572                                         marvell,pins = "mpp_nand";
 573                                         marvell,function = "nand";
 574                                 };
 575
 576                                 pmx_nand_gpo: pmx-nand-gpo {
 577                                         marvell,pins = "mpp_nand";
 578                                         marvell,function = "gpo";
 579                                 };
 580                         };
 581
 582                         core_clk: core-clocks@d0214 {
 583                                 compatible = "marvell,dove-core-clock";
 584                                 reg = <0xd0214 0x4>;
 585                                 #clock-cells = <1>;
 586                         };
 587
 588                         gpio0: gpio-ctrl@d0400 {
 589                                 compatible = "marvell,orion-gpio";
 590                                 #gpio-cells = <2>;
 591                                 gpio-controller;
 592                                 reg = <0xd0400 0x20>;
 593                                 ngpios = <32>;
 594                                 interrupt-controller;
 595                                 #interrupt-cells = <2>;
 596                                 interrupts = <12>, <13>, <14>, <60>;
 597                         };
 598
 599                         gpio1: gpio-ctrl@d0420 {
 600                                 compatible = "marvell,orion-gpio";
 601                                 #gpio-cells = <2>;
 602                                 gpio-controller;
 603                                 reg = <0xd0420 0x20>;
 604                                 ngpios = <32>;
 605                                 interrupt-controller;
 606                                 #interrupt-cells = <2>;
 607                                 interrupts = <61>;
 608                         };
 609
 610                         rtc: real-time-clock@d8500 {
 611                                 compatible = "marvell,orion-rtc";
 612                                 reg = <0xd8500 0x20>;
 613                                 interrupt-parent = <&pmu_intc>;
 614                                 interrupts = <5>;
 615                         };
 616
 617                         gpio2: gpio-ctrl@e8400 {
 618                                 compatible = "marvell,orion-gpio";
 619                                 #gpio-cells = <2>;
 620                                 gpio-controller;
 621                                 reg = <0xe8400 0x0c>;
 622                                 ngpios = <8>;
 623                         };
 624                 };
 625         };
 626 };