arch/arm/boot/dts/exynos5.dtsi

   1 /*
   2  * Samsung's Exynos5 SoC series common device tree source
   3  *
   4  * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
   8  * SoCs from Exynos5 series can include this file and provide values for SoCs
   9  * specfic bindings.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include "skeleton.dtsi"
  17 #include "exynos-syscon-restart.dtsi"
  18
  19 / {
  20         interrupt-parent = <&gic>;
  21
  22         aliases {
  23                 i2c0 = &i2c_0;
  24                 i2c1 = &i2c_1;
  25                 i2c2 = &i2c_2;
  26                 i2c3 = &i2c_3;
  27                 serial0 = &serial_0;
  28                 serial1 = &serial_1;
  29                 serial2 = &serial_2;
  30                 serial3 = &serial_3;
  31         };
  32
  33         soc: soc {
  34                 compatible = "simple-bus";
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37                 ranges;
  38
  39                 chipid@10000000 {
  40                         compatible = "samsung,exynos4210-chipid";
  41                         reg = <0x10000000 0x100>;
  42                 };
  43
  44                 sromc: memory-controller@12250000 {
  45                         compatible = "samsung,exynos4210-srom";
  46                         reg = <0x12250000 0x14>;
  47                 };
  48
  49                 combiner: interrupt-controller@10440000 {
  50                         compatible = "samsung,exynos4210-combiner";
  51                         #interrupt-cells = <2>;
  52                         interrupt-controller;
  53                         samsung,combiner-nr = <32>;
  54                         reg = <0x10440000 0x1000>;
  55                         interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  56                                         <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  57                                         <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  58                                         <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  59                                         <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  60                                         <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  61                                         <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  62                                         <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  63                 };
  64
  65                 gic: interrupt-controller@10481000 {
  66                         compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  67                         #interrupt-cells = <3>;
  68                         interrupt-controller;
  69                         reg =   <0x10481000 0x1000>,
  70                                 <0x10482000 0x1000>,
  71                                 <0x10484000 0x2000>,
  72                                 <0x10486000 0x2000>;
  73                         interrupts = <1 9 0xf04>;
  74                 };
  75
  76                 sysreg_system_controller: syscon@10050000 {
  77                         compatible = "samsung,exynos5-sysreg", "syscon";
  78                         reg = <0x10050000 0x5000>;
  79                 };
  80
  81                 serial_0: serial@12C00000 {
  82                         compatible = "samsung,exynos4210-uart";
  83                         reg = <0x12C00000 0x100>;
  84                         interrupts = <0 51 0>;
  85                 };
  86
  87                 serial_1: serial@12C10000 {
  88                         compatible = "samsung,exynos4210-uart";
  89                         reg = <0x12C10000 0x100>;
  90                         interrupts = <0 52 0>;
  91                 };
  92
  93                 serial_2: serial@12C20000 {
  94                         compatible = "samsung,exynos4210-uart";
  95                         reg = <0x12C20000 0x100>;
  96                         interrupts = <0 53 0>;
  97                 };
  98
  99                 serial_3: serial@12C30000 {
 100                         compatible = "samsung,exynos4210-uart";
 101                         reg = <0x12C30000 0x100>;
 102                         interrupts = <0 54 0>;
 103                 };
 104
 105                 i2c_0: i2c@12C60000 {
 106                         compatible = "samsung,s3c2440-i2c";
 107                         reg = <0x12C60000 0x100>;
 108                         interrupts = <0 56 0>;
 109                         #address-cells = <1>;
 110                         #size-cells = <0>;
 111                         samsung,sysreg-phandle = <&sysreg_system_controller>;
 112                         status = "disabled";
 113                 };
 114
 115                 i2c_1: i2c@12C70000 {
 116                         compatible = "samsung,s3c2440-i2c";
 117                         reg = <0x12C70000 0x100>;
 118                         interrupts = <0 57 0>;
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121                         samsung,sysreg-phandle = <&sysreg_system_controller>;
 122                         status = "disabled";
 123                 };
 124
 125                 i2c_2: i2c@12C80000 {
 126                         compatible = "samsung,s3c2440-i2c";
 127                         reg = <0x12C80000 0x100>;
 128                         interrupts = <0 58 0>;
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         samsung,sysreg-phandle = <&sysreg_system_controller>;
 132                         status = "disabled";
 133                 };
 134
 135                 i2c_3: i2c@12C90000 {
 136                         compatible = "samsung,s3c2440-i2c";
 137                         reg = <0x12C90000 0x100>;
 138                         interrupts = <0 59 0>;
 139                         #address-cells = <1>;
 140                         #size-cells = <0>;
 141                         samsung,sysreg-phandle = <&sysreg_system_controller>;
 142                         status = "disabled";
 143                 };
 144
 145                 pwm: pwm@12DD0000 {
 146                         compatible = "samsung,exynos4210-pwm";
 147                         reg = <0x12DD0000 0x100>;
 148                         samsung,pwm-outputs = <0>, <1>, <2>, <3>;
 149                         #pwm-cells = <3>;
 150                 };
 151
 152                 rtc: rtc@101E0000 {
 153                         compatible = "samsung,s3c6410-rtc";
 154                         reg = <0x101E0000 0x100>;
 155                         interrupts = <0 43 0>, <0 44 0>;
 156                         status = "disabled";
 157                 };
 158
 159                 fimd: fimd@14400000 {
 160                         compatible = "samsung,exynos5250-fimd";
 161                         interrupt-parent = <&combiner>;
 162                         reg = <0x14400000 0x40000>;
 163                         interrupt-names = "fifo", "vsync", "lcd_sys";
 164                         interrupts = <18 4>, <18 5>, <18 6>;
 165                         samsung,sysreg = <&sysreg_system_controller>;
 166                         status = "disabled";
 167                 };
 168
 169                 dp: dp-controller@145B0000 {
 170                         compatible = "samsung,exynos5-dp";
 171                         reg = <0x145B0000 0x1000>;
 172                         interrupts = <10 3>;
 173                         interrupt-parent = <&combiner>;
 174                         #address-cells = <1>;
 175                         #size-cells = <0>;
 176                         status = "disabled";
 177                 };
 178         };
 179 };