arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 /include/ "skeleton.dtsi"
  21 /include/ "exynos5250-pinctrl.dtsi"
  22
  23 / {
  24         compatible = "samsung,exynos5250";
  25         interrupt-parent = <&gic>;
  26
  27         aliases {
  28                 spi0 = &spi_0;
  29                 spi1 = &spi_1;
  30                 spi2 = &spi_2;
  31                 gsc0 = &gsc_0;
  32                 gsc1 = &gsc_1;
  33                 gsc2 = &gsc_2;
  34                 gsc3 = &gsc_3;
  35                 mshc0 = &dwmmc_0;
  36                 mshc1 = &dwmmc_1;
  37                 mshc2 = &dwmmc_2;
  38                 mshc3 = &dwmmc_3;
  39                 i2c0 = &i2c_0;
  40                 i2c1 = &i2c_1;
  41                 i2c2 = &i2c_2;
  42                 i2c3 = &i2c_3;
  43                 i2c4 = &i2c_4;
  44                 i2c5 = &i2c_5;
  45                 i2c6 = &i2c_6;
  46                 i2c7 = &i2c_7;
  47                 i2c8 = &i2c_8;
  48                 pinctrl0 = &pinctrl_0;
  49                 pinctrl1 = &pinctrl_1;
  50                 pinctrl2 = &pinctrl_2;
  51                 pinctrl3 = &pinctrl_3;
  52         };
  53
  54         pd_gsc: gsc-power-domain@0x10044000 {
  55                 compatible = "samsung,exynos4210-pd";
  56                 reg = <0x10044000 0x20>;
  57         };
  58
  59         pd_mfc: mfc-power-domain@0x10044040 {
  60                 compatible = "samsung,exynos4210-pd";
  61                 reg = <0x10044040 0x20>;
  62         };
  63
  64         clock: clock-controller@0x10010000 {
  65                 compatible = "samsung,exynos5250-clock";
  66                 reg = <0x10010000 0x30000>;
  67                 #clock-cells = <1>;
  68         };
  69
  70         gic:interrupt-controller@10481000 {
  71                 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  72                 #interrupt-cells = <3>;
  73                 interrupt-controller;
  74                 reg = <0x10481000 0x1000>,
  75                       <0x10482000 0x1000>,
  76                       <0x10484000 0x2000>,
  77                       <0x10486000 0x2000>;
  78                 interrupts = <1 9 0xf04>;
  79         };
  80
  81         timer {
  82                 compatible = "arm,armv7-timer";
  83                 interrupts = <1 13 0xf08>,
  84                              <1 14 0xf08>,
  85                              <1 11 0xf08>,
  86                              <1 10 0xf08>;
  87         };
  88
  89         combiner:interrupt-controller@10440000 {
  90                 compatible = "samsung,exynos4210-combiner";
  91                 #interrupt-cells = <2>;
  92                 interrupt-controller;
  93                 samsung,combiner-nr = <32>;
  94                 reg = <0x10440000 0x1000>;
  95                 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  96                              <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  97                              <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  98                              <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  99                              <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
 100                              <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
 101                              <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
 102                              <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
 103         };
 104
 105         mct@101C0000 {
 106                 compatible = "samsung,exynos4210-mct";
 107                 reg = <0x101C0000 0x800>;
 108                 interrupt-controller;
 109                 #interrups-cells = <2>;
 110                 interrupt-parent = <&mct_map>;
 111                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 112                              <4 0>, <5 0>;
 113                 clocks = <&clock 1>, <&clock 335>;
 114                 clock-names = "fin_pll", "mct";
 115
 116                 mct_map: mct-map {
 117                         #interrupt-cells = <2>;
 118                         #address-cells = <0>;
 119                         #size-cells = <0>;
 120                         interrupt-map = <0x0 0 &combiner 23 3>,
 121                                         <0x1 0 &combiner 23 4>,
 122                                         <0x2 0 &combiner 25 2>,
 123                                         <0x3 0 &combiner 25 3>,
 124                                         <0x4 0 &gic 0 120 0>,
 125                                         <0x5 0 &gic 0 121 0>;
 126                 };
 127         };
 128
 129         pinctrl_0: pinctrl@11400000 {
 130                 compatible = "samsung,exynos5250-pinctrl";
 131                 reg = <0x11400000 0x1000>;
 132                 interrupts = <0 46 0>;
 133
 134                 wakup_eint: wakeup-interrupt-controller {
 135                         compatible = "samsung,exynos4210-wakeup-eint";
 136                         interrupt-parent = <&gic>;
 137                         interrupts = <0 32 0>;
 138                 };
 139         };
 140
 141         pinctrl_1: pinctrl@13400000 {
 142                 compatible = "samsung,exynos5250-pinctrl";
 143                 reg = <0x13400000 0x1000>;
 144                 interrupts = <0 45 0>;
 145         };
 146
 147         pinctrl_2: pinctrl@10d10000 {
 148                 compatible = "samsung,exynos5250-pinctrl";
 149                 reg = <0x10d10000 0x1000>;
 150                 interrupts = <0 50 0>;
 151         };
 152
 153         pinctrl_3: pinctrl@03680000 {
 154                 compatible = "samsung,exynos5250-pinctrl";
 155                 reg = <0x0368000 0x1000>;
 156                 interrupts = <0 47 0>;
 157         };
 158
 159         watchdog {
 160                 compatible = "samsung,s3c2410-wdt";
 161                 reg = <0x101D0000 0x100>;
 162                 interrupts = <0 42 0>;
 163                 clocks = <&clock 336>;
 164                 clock-names = "watchdog";
 165         };
 166
 167         codec@11000000 {
 168                 compatible = "samsung,mfc-v6";
 169                 reg = <0x11000000 0x10000>;
 170                 interrupts = <0 96 0>;
 171                 samsung,power-domain = <&pd_mfc>;
 172         };
 173
 174         rtc {
 175                 compatible = "samsung,s3c6410-rtc";
 176                 reg = <0x101E0000 0x100>;
 177                 interrupts = <0 43 0>, <0 44 0>;
 178                 clocks = <&clock 337>;
 179                 clock-names = "rtc";
 180         };
 181
 182         tmu@10060000 {
 183                 compatible = "samsung,exynos5250-tmu";
 184                 reg = <0x10060000 0x100>;
 185                 interrupts = <0 65 0>;
 186                 clocks = <&clock 338>;
 187                 clock-names = "tmu_apbif";
 188         };
 189
 190         serial@12C00000 {
 191                 compatible = "samsung,exynos4210-uart";
 192                 reg = <0x12C00000 0x100>;
 193                 interrupts = <0 51 0>;
 194                 clocks = <&clock 289>, <&clock 146>;
 195                 clock-names = "uart", "clk_uart_baud0";
 196         };
 197
 198         serial@12C10000 {
 199                 compatible = "samsung,exynos4210-uart";
 200                 reg = <0x12C10000 0x100>;
 201                 interrupts = <0 52 0>;
 202                 clocks = <&clock 290>, <&clock 147>;
 203                 clock-names = "uart", "clk_uart_baud0";
 204         };
 205
 206         serial@12C20000 {
 207                 compatible = "samsung,exynos4210-uart";
 208                 reg = <0x12C20000 0x100>;
 209                 interrupts = <0 53 0>;
 210                 clocks = <&clock 291>, <&clock 148>;
 211                 clock-names = "uart", "clk_uart_baud0";
 212         };
 213
 214         serial@12C30000 {
 215                 compatible = "samsung,exynos4210-uart";
 216                 reg = <0x12C30000 0x100>;
 217                 interrupts = <0 54 0>;
 218                 clocks = <&clock 292>, <&clock 149>;
 219                 clock-names = "uart", "clk_uart_baud0";
 220         };
 221
 222         sata@122F0000 {
 223                 compatible = "samsung,exynos5-sata-ahci";
 224                 reg = <0x122F0000 0x1ff>;
 225                 interrupts = <0 115 0>;
 226                 clocks = <&clock 277>, <&clock 143>;
 227                 clock-names = "sata", "sclk_sata";
 228         };
 229
 230         sata-phy@12170000 {
 231                 compatible = "samsung,exynos5-sata-phy";
 232                 reg = <0x12170000 0x1ff>;
 233         };
 234
 235         i2c_0: i2c@12C60000 {
 236                 compatible = "samsung,s3c2440-i2c";
 237                 reg = <0x12C60000 0x100>;
 238                 interrupts = <0 56 0>;
 239                 #address-cells = <1>;
 240                 #size-cells = <0>;
 241                 clocks = <&clock 294>;
 242                 clock-names = "i2c";
 243                 pinctrl-names = "default";
 244                 pinctrl-0 = <&i2c0_bus>;
 245         };
 246
 247         i2c_1: i2c@12C70000 {
 248                 compatible = "samsung,s3c2440-i2c";
 249                 reg = <0x12C70000 0x100>;
 250                 interrupts = <0 57 0>;
 251                 #address-cells = <1>;
 252                 #size-cells = <0>;
 253                 clocks = <&clock 295>;
 254                 clock-names = "i2c";
 255                 pinctrl-names = "default";
 256                 pinctrl-0 = <&i2c1_bus>;
 257         };
 258
 259         i2c_2: i2c@12C80000 {
 260                 compatible = "samsung,s3c2440-i2c";
 261                 reg = <0x12C80000 0x100>;
 262                 interrupts = <0 58 0>;
 263                 #address-cells = <1>;
 264                 #size-cells = <0>;
 265                 clocks = <&clock 296>;
 266                 clock-names = "i2c";
 267                 pinctrl-names = "default";
 268                 pinctrl-0 = <&i2c2_bus>;
 269         };
 270
 271         i2c_3: i2c@12C90000 {
 272                 compatible = "samsung,s3c2440-i2c";
 273                 reg = <0x12C90000 0x100>;
 274                 interrupts = <0 59 0>;
 275                 #address-cells = <1>;
 276                 #size-cells = <0>;
 277                 clocks = <&clock 297>;
 278                 clock-names = "i2c";
 279                 pinctrl-names = "default";
 280                 pinctrl-0 = <&i2c3_bus>;
 281         };
 282
 283         i2c_4: i2c@12CA0000 {
 284                 compatible = "samsung,s3c2440-i2c";
 285                 reg = <0x12CA0000 0x100>;
 286                 interrupts = <0 60 0>;
 287                 #address-cells = <1>;
 288                 #size-cells = <0>;
 289                 clocks = <&clock 298>;
 290                 clock-names = "i2c";
 291                 pinctrl-names = "default";
 292                 pinctrl-0 = <&i2c4_bus>;
 293         };
 294
 295         i2c_5: i2c@12CB0000 {
 296                 compatible = "samsung,s3c2440-i2c";
 297                 reg = <0x12CB0000 0x100>;
 298                 interrupts = <0 61 0>;
 299                 #address-cells = <1>;
 300                 #size-cells = <0>;
 301                 clocks = <&clock 299>;
 302                 clock-names = "i2c";
 303                 pinctrl-names = "default";
 304                 pinctrl-0 = <&i2c5_bus>;
 305         };
 306
 307         i2c_6: i2c@12CC0000 {
 308                 compatible = "samsung,s3c2440-i2c";
 309                 reg = <0x12CC0000 0x100>;
 310                 interrupts = <0 62 0>;
 311                 #address-cells = <1>;
 312                 #size-cells = <0>;
 313                 clocks = <&clock 300>;
 314                 clock-names = "i2c";
 315                 pinctrl-names = "default";
 316                 pinctrl-0 = <&i2c6_bus>;
 317         };
 318
 319         i2c_7: i2c@12CD0000 {
 320                 compatible = "samsung,s3c2440-i2c";
 321                 reg = <0x12CD0000 0x100>;
 322                 interrupts = <0 63 0>;
 323                 #address-cells = <1>;
 324                 #size-cells = <0>;
 325                 clocks = <&clock 301>;
 326                 clock-names = "i2c";
 327                 pinctrl-names = "default";
 328                 pinctrl-0 = <&i2c7_bus>;
 329         };
 330
 331         i2c_8: i2c@12CE0000 {
 332                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 333                 reg = <0x12CE0000 0x1000>;
 334                 interrupts = <0 64 0>;
 335                 #address-cells = <1>;
 336                 #size-cells = <0>;
 337                 clocks = <&clock 302>;
 338                 clock-names = "i2c";
 339         };
 340
 341         i2c@121D0000 {
 342                 compatible = "samsung,exynos5-sata-phy-i2c";
 343                 reg = <0x121D0000 0x100>;
 344                 #address-cells = <1>;
 345                 #size-cells = <0>;
 346                 clocks = <&clock 288>;
 347                 clock-names = "i2c";
 348         };
 349
 350         spi_0: spi@12d20000 {
 351                 compatible = "samsung,exynos4210-spi";
 352                 reg = <0x12d20000 0x100>;
 353                 interrupts = <0 66 0>;
 354                 dmas = <&pdma0 5
 355                         &pdma0 4>;
 356                 dma-names = "tx", "rx";
 357                 #address-cells = <1>;
 358                 #size-cells = <0>;
 359                 clocks = <&clock 304>, <&clock 154>;
 360                 clock-names = "spi", "spi_busclk0";
 361                 pinctrl-names = "default";
 362                 pinctrl-0 = <&spi0_bus>;
 363         };
 364
 365         spi_1: spi@12d30000 {
 366                 compatible = "samsung,exynos4210-spi";
 367                 reg = <0x12d30000 0x100>;
 368                 interrupts = <0 67 0>;
 369                 dmas = <&pdma1 5
 370                         &pdma1 4>;
 371                 dma-names = "tx", "rx";
 372                 #address-cells = <1>;
 373                 #size-cells = <0>;
 374                 clocks = <&clock 305>, <&clock 155>;
 375                 clock-names = "spi", "spi_busclk0";
 376                 pinctrl-names = "default";
 377                 pinctrl-0 = <&spi1_bus>;
 378         };
 379
 380         spi_2: spi@12d40000 {
 381                 compatible = "samsung,exynos4210-spi";
 382                 reg = <0x12d40000 0x100>;
 383                 interrupts = <0 68 0>;
 384                 dmas = <&pdma0 7
 385                         &pdma0 6>;
 386                 dma-names = "tx", "rx";
 387                 #address-cells = <1>;
 388                 #size-cells = <0>;
 389                 clocks = <&clock 306>, <&clock 156>;
 390                 clock-names = "spi", "spi_busclk0";
 391                 pinctrl-names = "default";
 392                 pinctrl-0 = <&spi2_bus>;
 393         };
 394
 395         dwmmc_0: dwmmc0@12200000 {
 396                 compatible = "samsung,exynos5250-dw-mshc";
 397                 reg = <0x12200000 0x1000>;
 398                 interrupts = <0 75 0>;
 399                 #address-cells = <1>;
 400                 #size-cells = <0>;
 401                 clocks = <&clock 280>, <&clock 139>;
 402                 clock-names = "biu", "ciu";
 403         };
 404
 405         dwmmc_1: dwmmc1@12210000 {
 406                 compatible = "samsung,exynos5250-dw-mshc";
 407                 reg = <0x12210000 0x1000>;
 408                 interrupts = <0 76 0>;
 409                 #address-cells = <1>;
 410                 #size-cells = <0>;
 411                 clocks = <&clock 281>, <&clock 140>;
 412                 clock-names = "biu", "ciu";
 413         };
 414
 415         dwmmc_2: dwmmc2@12220000 {
 416                 compatible = "samsung,exynos5250-dw-mshc";
 417                 reg = <0x12220000 0x1000>;
 418                 interrupts = <0 77 0>;
 419                 #address-cells = <1>;
 420                 #size-cells = <0>;
 421                 clocks = <&clock 282>, <&clock 141>;
 422                 clock-names = "biu", "ciu";
 423         };
 424
 425         dwmmc_3: dwmmc3@12230000 {
 426                 compatible = "samsung,exynos5250-dw-mshc";
 427                 reg = <0x12230000 0x1000>;
 428                 interrupts = <0 78 0>;
 429                 #address-cells = <1>;
 430                 #size-cells = <0>;
 431                 clocks = <&clock 283>, <&clock 142>;
 432                 clock-names = "biu", "ciu";
 433         };
 434
 435         i2s0: i2s@03830000 {
 436                 compatible = "samsung,i2s-v5";
 437                 reg = <0x03830000 0x100>;
 438                 dmas = <&pdma0 10
 439                         &pdma0 9
 440                         &pdma0 8>;
 441                 dma-names = "tx", "rx", "tx-sec";
 442                 samsung,supports-6ch;
 443                 samsung,supports-rstclr;
 444                 samsung,supports-secdai;
 445                 samsung,idma-addr = <0x03000000>;
 446                 pinctrl-names = "default";
 447                 pinctrl-0 = <&i2s0_bus>;
 448         };
 449
 450         i2s1: i2s@12D60000 {
 451                 compatible = "samsung,i2s-v5";
 452                 reg = <0x12D60000 0x100>;
 453                 dmas = <&pdma1 12
 454                         &pdma1 11>;
 455                 dma-names = "tx", "rx";
 456                 pinctrl-names = "default";
 457                 pinctrl-0 = <&i2s1_bus>;
 458         };
 459
 460         i2s2: i2s@12D70000 {
 461                 compatible = "samsung,i2s-v5";
 462                 reg = <0x12D70000 0x100>;
 463                 dmas = <&pdma0 12
 464                         &pdma0 11>;
 465                 dma-names = "tx", "rx";
 466                 pinctrl-names = "default";
 467                 pinctrl-0 = <&i2s2_bus>;
 468         };
 469
 470         usb@12110000 {
 471                 compatible = "samsung,exynos4210-ehci";
 472                 reg = <0x12110000 0x100>;
 473                 interrupts = <0 71 0>;
 474
 475                 clocks = <&clock 285>;
 476                 clock-names = "usbhost";
 477         };
 478
 479         usb@12120000 {
 480                 compatible = "samsung,exynos4210-ohci";
 481                 reg = <0x12120000 0x100>;
 482                 interrupts = <0 71 0>;
 483
 484                 clocks = <&clock 285>;
 485                 clock-names = "usbhost";
 486         };
 487
 488         amba {
 489                 #address-cells = <1>;
 490                 #size-cells = <1>;
 491                 compatible = "arm,amba-bus";
 492                 interrupt-parent = <&gic>;
 493                 ranges;
 494
 495                 pdma0: pdma@121A0000 {
 496                         compatible = "arm,pl330", "arm,primecell";
 497                         reg = <0x121A0000 0x1000>;
 498                         interrupts = <0 34 0>;
 499                         clocks = <&clock 275>;
 500                         clock-names = "apb_pclk";
 501                         #dma-cells = <1>;
 502                         #dma-channels = <8>;
 503                         #dma-requests = <32>;
 504                 };
 505
 506                 pdma1: pdma@121B0000 {
 507                         compatible = "arm,pl330", "arm,primecell";
 508                         reg = <0x121B0000 0x1000>;
 509                         interrupts = <0 35 0>;
 510                         clocks = <&clock 276>;
 511                         clock-names = "apb_pclk";
 512                         #dma-cells = <1>;
 513                         #dma-channels = <8>;
 514                         #dma-requests = <32>;
 515                 };
 516
 517                 mdma0: mdma@10800000 {
 518                         compatible = "arm,pl330", "arm,primecell";
 519                         reg = <0x10800000 0x1000>;
 520                         interrupts = <0 33 0>;
 521                         clocks = <&clock 271>;
 522                         clock-names = "apb_pclk";
 523                         #dma-cells = <1>;
 524                         #dma-channels = <8>;
 525                         #dma-requests = <1>;
 526                 };
 527
 528                 mdma1: mdma@11C10000 {
 529                         compatible = "arm,pl330", "arm,primecell";
 530                         reg = <0x11C10000 0x1000>;
 531                         interrupts = <0 124 0>;
 532                         clocks = <&clock 271>;
 533                         clock-names = "apb_pclk";
 534                         #dma-cells = <1>;
 535                         #dma-channels = <8>;
 536                         #dma-requests = <1>;
 537                 };
 538         };
 539
 540         gsc_0:  gsc@0x13e00000 {
 541                 compatible = "samsung,exynos5-gsc";
 542                 reg = <0x13e00000 0x1000>;
 543                 interrupts = <0 85 0>;
 544                 samsung,power-domain = <&pd_gsc>;
 545                 clocks = <&clock 256>;
 546                 clock-names = "gscl";
 547         };
 548
 549         gsc_1:  gsc@0x13e10000 {
 550                 compatible = "samsung,exynos5-gsc";
 551                 reg = <0x13e10000 0x1000>;
 552                 interrupts = <0 86 0>;
 553                 samsung,power-domain = <&pd_gsc>;
 554                 clocks = <&clock 257>;
 555                 clock-names = "gscl";
 556         };
 557
 558         gsc_2:  gsc@0x13e20000 {
 559                 compatible = "samsung,exynos5-gsc";
 560                 reg = <0x13e20000 0x1000>;
 561                 interrupts = <0 87 0>;
 562                 samsung,power-domain = <&pd_gsc>;
 563                 clocks = <&clock 258>;
 564                 clock-names = "gscl";
 565         };
 566
 567         gsc_3:  gsc@0x13e30000 {
 568                 compatible = "samsung,exynos5-gsc";
 569                 reg = <0x13e30000 0x1000>;
 570                 interrupts = <0 88 0>;
 571                 samsung,power-domain = <&pd_gsc>;
 572                 clocks = <&clock 259>;
 573                 clock-names = "gscl";
 574         };
 575
 576         hdmi {
 577                 compatible = "samsung,exynos5-hdmi";
 578                 reg = <0x14530000 0x70000>;
 579                 interrupts = <0 95 0>;
 580                 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
 581                                 <&clock 333>, <&clock 333>;
 582                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 583                                 "sclk_hdmiphy", "hdmiphy";
 584         };
 585
 586         mixer {
 587                 compatible = "samsung,exynos5-mixer";
 588                 reg = <0x14450000 0x10000>;
 589                 interrupts = <0 94 0>;
 590         };
 591
 592         dp-controller {
 593                 compatible = "samsung,exynos5-dp";
 594                 reg = <0x145b0000 0x1000>;
 595                 interrupts = <10 3>;
 596                 interrupt-parent = <&combiner>;
 597                 #address-cells = <1>;
 598                 #size-cells = <0>;
 599
 600                 dptx-phy {
 601                         reg = <0x10040720>;
 602                         samsung,enable-mask = <1>;
 603                 };
 604         };
 605 };