arch/arm/boot/dts/exynos5420-peach-pit.dts

   1 /*
   2  * Google Peach Pit Rev 6+ board device tree source
   3  *
   4  * Copyright (c) 2014 Google, Inc
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 /dts-v1/;
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include "exynos5420.dtsi"
  15
  16 / {
  17         model = "Google Peach Pit Rev 6+";
  18
  19         compatible = "google,pit-rev16",
  20                 "google,pit-rev15", "google,pit-rev14",
  21                 "google,pit-rev13", "google,pit-rev12",
  22                 "google,pit-rev11", "google,pit-rev10",
  23                 "google,pit-rev9", "google,pit-rev8",
  24                 "google,pit-rev7", "google,pit-rev6",
  25                 "google,pit", "google,peach","samsung,exynos5420",
  26                 "samsung,exynos5";
  27
  28         backlight {
  29                 compatible = "pwm-backlight";
  30                 pwms = <&pwm 0 1000000 0>;
  31                 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
  32                 default-brightness-level = <7>;
  33                 pinctrl-0 = <&pwm0_out>;
  34                 pinctrl-names = "default";
  35         };
  36
  37         fixed-rate-clocks {
  38                 oscclk {
  39                         compatible = "samsung,exynos5420-oscclk";
  40                         clock-frequency = <24000000>;
  41                 };
  42         };
  43
  44         gpio-keys {
  45                 compatible = "gpio-keys";
  46
  47                 pinctrl-names = "default";
  48                 pinctrl-0 = <&power_key_irq>;
  49
  50                 power {
  51                         label = "Power";
  52                         gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
  53                         linux,code = <KEY_POWER>;
  54                         gpio-key,wakeup;
  55                 };
  56         };
  57
  58         memory {
  59                 reg = <0x20000000 0x80000000>;
  60         };
  61
  62         sound {
  63                 compatible = "google,snow-audio-max98090";
  64
  65                 samsung,model = "Peach-Pit-I2S-MAX98090";
  66                 samsung,i2s-controller = <&i2s0>;
  67                 samsung,audio-codec = <&max98090>;
  68         };
  69
  70         usb300_vbus_reg: regulator-usb300 {
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "P5.0V_USB3CON0";
  73                 regulator-min-microvolt = <5000000>;
  74                 regulator-max-microvolt = <5000000>;
  75                 gpio = <&gph0 0 0>;
  76                 pinctrl-names = "default";
  77                 pinctrl-0 = <&usb300_vbus_en>;
  78                 enable-active-high;
  79         };
  80
  81         usb301_vbus_reg: regulator-usb301 {
  82                 compatible = "regulator-fixed";
  83                 regulator-name = "P5.0V_USB3CON1";
  84                 regulator-min-microvolt = <5000000>;
  85                 regulator-max-microvolt = <5000000>;
  86                 gpio = <&gph0 1 0>;
  87                 pinctrl-names = "default";
  88                 pinctrl-0 = <&usb301_vbus_en>;
  89                 enable-active-high;
  90         };
  91 };
  92
  93 &dp {
  94         status = "okay";
  95         pinctrl-names = "default";
  96         pinctrl-0 = <&dp_hpd_gpio>;
  97         samsung,color-space = <0>;
  98         samsung,dynamic-range = <0>;
  99         samsung,ycbcr-coeff = <0>;
 100         samsung,color-depth = <1>;
 101         samsung,link-rate = <0x06>;
 102         samsung,lane-count = <2>;
 103         samsung,hpd-gpio = <&gpx2 6 0>;
 104
 105         display-timings {
 106                 native-mode = <&timing1>;
 107
 108                 timing1: timing@1 {
 109                         clock-frequency = <70589280>;
 110                         hactive = <1366>;
 111                         vactive = <768>;
 112                         hfront-porch = <40>;
 113                         hback-porch = <40>;
 114                         hsync-len = <32>;
 115                         vback-porch = <10>;
 116                         vfront-porch = <12>;
 117                         vsync-len = <6>;
 118                 };
 119         };
 120 };
 121
 122 &fimd {
 123         status = "okay";
 124         samsung,invert-vclk;
 125 };
 126
 127 &hdmi {
 128         status = "okay";
 129         hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&hdmi_hpd_irq>;
 132         ddc = <&i2c_2>;
 133 };
 134
 135 &hsi2c_7 {
 136         status = "okay";
 137
 138         max98090: codec@10 {
 139                 compatible = "maxim,max98090";
 140                 reg = <0x10>;
 141                 interrupts = <2 0>;
 142                 interrupt-parent = <&gpx0>;
 143                 pinctrl-names = "default";
 144                 pinctrl-0 = <&max98090_irq>;
 145         };
 146 };
 147
 148 &hsi2c_9 {
 149         status = "okay";
 150         clock-frequency = <400000>;
 151
 152         tpm@20 {
 153                 compatible = "infineon,slb9645tt";
 154                 reg = <0x20>;
 155
 156                 /* Unused irq; but still need to configure the pins */
 157                 pinctrl-names = "default";
 158                 pinctrl-0 = <&tpm_irq>;
 159         };
 160 };
 161
 162 &i2c_2 {
 163         status = "okay";
 164         samsung,i2c-sda-delay = <100>;
 165         samsung,i2c-max-bus-freq = <66000>;
 166         samsung,i2c-slave-addr = <0x50>;
 167 };
 168
 169 &i2s0 {
 170         status = "okay";
 171 };
 172
 173 &mmc_0 {
 174         status = "okay";
 175         num-slots = <1>;
 176         broken-cd;
 177         caps2-mmc-hs200-1_8v;
 178         supports-highspeed;
 179         non-removable;
 180         card-detect-delay = <200>;
 181         clock-frequency = <400000000>;
 182         samsung,dw-mshc-ciu-div = <3>;
 183         samsung,dw-mshc-sdr-timing = <0 4>;
 184         samsung,dw-mshc-ddr-timing = <0 2>;
 185         pinctrl-names = "default";
 186         pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
 187
 188         slot@0 {
 189                 reg = <0>;
 190                 bus-width = <8>;
 191         };
 192 };
 193
 194 &mmc_2 {
 195         status = "okay";
 196         num-slots = <1>;
 197         supports-highspeed;
 198         card-detect-delay = <200>;
 199         clock-frequency = <400000000>;
 200         samsung,dw-mshc-ciu-div = <3>;
 201         samsung,dw-mshc-sdr-timing = <2 3>;
 202         samsung,dw-mshc-ddr-timing = <1 2>;
 203         pinctrl-names = "default";
 204         pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
 205
 206         slot@0 {
 207                 reg = <0>;
 208                 bus-width = <4>;
 209         };
 210 };
 211
 212
 213 &pinctrl_0 {
 214         pinctrl-names = "default";
 215         pinctrl-0 = <&mask_tpm_reset>;
 216
 217         max98090_irq: max98090-irq {
 218                 samsung,pins = "gpx0-2";
 219                 samsung,pin-function = <0>;
 220                 samsung,pin-pud = <0>;
 221                 samsung,pin-drv = <0>;
 222         };
 223
 224         /* We need GPX0_6 to be low at sleep time; just keep it low always */
 225         mask_tpm_reset: mask-tpm-reset {
 226                 samsung,pins = "gpx0-6";
 227                 samsung,pin-function = <1>;
 228                 samsung,pin-pud = <0>;
 229                 samsung,pin-drv = <0>;
 230                 samsung,pin-val = <0>;
 231         };
 232
 233         tpm_irq: tpm-irq {
 234                 samsung,pins = "gpx1-0";
 235                 samsung,pin-function = <0>;
 236                 samsung,pin-pud = <0>;
 237                 samsung,pin-drv = <0>;
 238         };
 239
 240         power_key_irq: power-key-irq {
 241                 samsung,pins = "gpx1-2";
 242                 samsung,pin-function = <0>;
 243                 samsung,pin-pud = <0>;
 244                 samsung,pin-drv = <0>;
 245         };
 246
 247         dp_hpd_gpio: dp_hpd_gpio {
 248                 samsung,pins = "gpx2-6";
 249                 samsung,pin-function = <0>;
 250                 samsung,pin-pud = <3>;
 251                 samsung,pin-drv = <0>;
 252         };
 253
 254         hdmi_hpd_irq: hdmi-hpd-irq {
 255                 samsung,pins = "gpx3-7";
 256                 samsung,pin-function = <0>;
 257                 samsung,pin-pud = <1>;
 258                 samsung,pin-drv = <0>;
 259         };
 260 };
 261
 262 &pinctrl_3 {
 263         usb300_vbus_en: usb300-vbus-en {
 264                 samsung,pins = "gph0-0";
 265                 samsung,pin-function = <1>;
 266                 samsung,pin-pud = <0>;
 267                 samsung,pin-drv = <0>;
 268         };
 269
 270         usb301_vbus_en: usb301-vbus-en {
 271                 samsung,pins = "gph0-1";
 272                 samsung,pin-function = <1>;
 273                 samsung,pin-pud = <0>;
 274                 samsung,pin-drv = <0>;
 275         };
 276 };
 277
 278 &rtc {
 279         status = "okay";
 280 };
 281
 282 &uart_3 {
 283         status = "okay";
 284 };
 285
 286 &usbdrd_phy0 {
 287         vbus-supply = <&usb300_vbus_reg>;
 288 };
 289
 290 &usbdrd_phy1 {
 291         vbus-supply = <&usb301_vbus_reg>;
 292 };
 293
 294 /*
 295  * Use longest HW watchdog in SoC (32 seconds) since the hardware
 296  * watchdog provides no debugging information (compared to soft/hard
 297  * lockup detectors) and so should be last resort.
 298  */
 299 &watchdog {
 300         timeout-sec = <32>;
 301 };
 302