Merge tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux...
[cascardo/linux.git] / arch / arm / boot / dts / imx6qdl-gw51xx.dtsi
1 /*
2  * Copyright 2013 Gateworks Corporation
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 / {
13         /* these are used by bootloader for disabling nodes */
14         aliases {
15                 can0 = &can1;
16                 ethernet0 = &fec;
17                 led0 = &led0;
18                 led1 = &led1;
19                 nand = &gpmi;
20                 usb0 = &usbh1;
21                 usb1 = &usbotg;
22         };
23
24         chosen {
25                 bootargs = "console=ttymxc1,115200";
26         };
27
28         leds {
29                 compatible = "gpio-leds";
30
31                 led0: user1 {
32                         label = "user1";
33                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
34                         default-state = "on";
35                         linux,default-trigger = "heartbeat";
36                 };
37
38                 led1: user2 {
39                         label = "user2";
40                         gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
41                         default-state = "off";
42                 };
43         };
44
45         memory {
46                 reg = <0x10000000 0x20000000>;
47         };
48
49         pps {
50                 compatible = "pps-gpio";
51                 gpios = <&gpio1 26 0>;
52                 status = "okay";
53         };
54
55         regulators {
56                 compatible = "simple-bus";
57                 #address-cells = <1>;
58                 #size-cells = <0>;
59
60                 reg_3p3v: regulator@0 {
61                         compatible = "regulator-fixed";
62                         reg = <0>;
63                         regulator-name = "3P3V";
64                         regulator-min-microvolt = <3300000>;
65                         regulator-max-microvolt = <3300000>;
66                         regulator-always-on;
67                 };
68
69                 reg_5p0v: regulator@1 {
70                         compatible = "regulator-fixed";
71                         reg = <1>;
72                         regulator-name = "5P0V";
73                         regulator-min-microvolt = <5000000>;
74                         regulator-max-microvolt = <5000000>;
75                         regulator-always-on;
76                 };
77
78                 reg_usb_otg_vbus: regulator@2 {
79                         compatible = "regulator-fixed";
80                         reg = <2>;
81                         regulator-name = "usb_otg_vbus";
82                         regulator-min-microvolt = <5000000>;
83                         regulator-max-microvolt = <5000000>;
84                         gpio = <&gpio3 22 0>;
85                         enable-active-high;
86                 };
87         };
88 };
89
90 &fec {
91         pinctrl-names = "default";
92         pinctrl-0 = <&pinctrl_enet>;
93         phy-mode = "rgmii";
94         phy-reset-gpios = <&gpio1 30 0>;
95         status = "okay";
96 };
97
98 &gpmi {
99         pinctrl-names = "default";
100         pinctrl-0 = <&pinctrl_gpmi_nand>;
101         status = "okay";
102 };
103
104 &hdmi {
105         ddc-i2c-bus = <&i2c3>;
106         status = "okay";
107 };
108
109 &i2c1 {
110         clock-frequency = <100000>;
111         pinctrl-names = "default";
112         pinctrl-0 = <&pinctrl_i2c1>;
113         status = "okay";
114
115         eeprom1: eeprom@50 {
116                 compatible = "atmel,24c02";
117                 reg = <0x50>;
118                 pagesize = <16>;
119         };
120
121         eeprom2: eeprom@51 {
122                 compatible = "atmel,24c02";
123                 reg = <0x51>;
124                 pagesize = <16>;
125         };
126
127         eeprom3: eeprom@52 {
128                 compatible = "atmel,24c02";
129                 reg = <0x52>;
130                 pagesize = <16>;
131         };
132
133         eeprom4: eeprom@53 {
134                 compatible = "atmel,24c02";
135                 reg = <0x53>;
136                 pagesize = <16>;
137         };
138
139         gpio: pca9555@23 {
140                 compatible = "nxp,pca9555";
141                 reg = <0x23>;
142                 gpio-controller;
143                 #gpio-cells = <2>;
144         };
145
146         hwmon: gsc@29 {
147                 compatible = "gw,gsp";
148                 reg = <0x29>;
149         };
150
151         rtc: ds1672@68 {
152                 compatible = "dallas,ds1672";
153                 reg = <0x68>;
154         };
155 };
156
157 &i2c2 {
158         clock-frequency = <100000>;
159         pinctrl-names = "default";
160         pinctrl-0 = <&pinctrl_i2c2>;
161         status = "okay";
162
163         pmic: ltc3676@3c {
164                 compatible = "lltc,ltc3676";
165                 reg = <0x3c>;
166
167                 regulators {
168                         sw1_reg: ltc3676__sw1 {
169                                 regulator-min-microvolt = <1175000>;
170                                 regulator-max-microvolt = <1175000>;
171                                 regulator-boot-on;
172                                 regulator-always-on;
173                         };
174
175                         sw2_reg: ltc3676__sw2 {
176                                 regulator-min-microvolt = <1800000>;
177                                 regulator-max-microvolt = <1800000>;
178                                 regulator-boot-on;
179                                 regulator-always-on;
180                         };
181
182                         sw3_reg: ltc3676__sw3 {
183                                 regulator-min-microvolt = <1175000>;
184                                 regulator-max-microvolt = <1175000>;
185                                 regulator-boot-on;
186                                 regulator-always-on;
187                         };
188
189                         sw4_reg: ltc3676__sw4 {
190                                 regulator-min-microvolt = <1500000>;
191                                 regulator-max-microvolt = <1500000>;
192                                 regulator-boot-on;
193                                 regulator-always-on;
194                         };
195
196                         ldo2_reg: ltc3676__ldo2 {
197                                 regulator-min-microvolt = <2500000>;
198                                 regulator-max-microvolt = <2500000>;
199                                 regulator-boot-on;
200                                 regulator-always-on;
201                         };
202
203                         ldo4_reg: ltc3676__ldo4 {
204                                 regulator-min-microvolt = <3000000>;
205                                 regulator-max-microvolt = <3000000>;
206                         };
207                 };
208         };
209 };
210
211 &i2c3 {
212         clock-frequency = <100000>;
213         pinctrl-names = "default";
214         pinctrl-0 = <&pinctrl_i2c3>;
215         status = "okay";
216
217         videoin: adv7180@20 {
218                 compatible = "adi,adv7180";
219                 reg = <0x20>;
220         };
221 };
222
223 &iomuxc {
224         pinctrl-names = "default";
225         pinctrl-0 = <&pinctrl_hog>;
226
227         imx6qdl-gw51xx {
228                 pinctrl_hog: hoggrp {
229                         fsl,pins = <
230                                 MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
231                                 MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
232                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
233                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
234                                 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
235                                 MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x80000000 /* PCIE_RST# */
236                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
237                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
238                          >;
239                 };
240
241                 pinctrl_enet: enetgrp {
242                         fsl,pins = <
243                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
244                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
245                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
246                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
247                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
248                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
249                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
250                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
251                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
252                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
253                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
254                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
255                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
256                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
257                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
258                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
259                         >;
260                 };
261
262                 pinctrl_gpmi_nand: gpminandgrp {
263                         fsl,pins = <
264                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
265                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
266                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
267                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
268                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
269                                 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
270                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
271                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
272                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
273                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
274                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
275                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
276                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
277                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
278                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
279                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
280                         >;
281                 };
282
283                 pinctrl_i2c1: i2c1grp {
284                         fsl,pins = <
285                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
286                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
287                         >;
288                 };
289
290                 pinctrl_i2c2: i2c2grp {
291                         fsl,pins = <
292                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
293                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
294                         >;
295                 };
296
297                 pinctrl_i2c3: i2c3grp {
298                         fsl,pins = <
299                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
300                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
301                         >;
302                 };
303
304                 pinctrl_uart1: uart1grp {
305                         fsl,pins = <
306                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
307                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
308                         >;
309                 };
310
311                 pinctrl_uart2: uart2grp {
312                         fsl,pins = <
313                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
314                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
315                         >;
316                 };
317
318                 pinctrl_uart3: uart3grp {
319                         fsl,pins = <
320                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
321                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
322                         >;
323                 };
324
325                 pinctrl_uart5: uart5grp {
326                         fsl,pins = <
327                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
328                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
329                         >;
330                 };
331
332                 pinctrl_usbotg: usbotggrp {
333                         fsl,pins = <
334                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
335                         >;
336                 };
337         };
338 };
339
340 &pcie {
341         reset-gpio = <&gpio1 0 0>;
342         status = "okay";
343 };
344
345 &uart1 {
346         pinctrl-names = "default";
347         pinctrl-0 = <&pinctrl_uart1>;
348         status = "okay";
349 };
350
351 &uart2 {
352         pinctrl-names = "default";
353         pinctrl-0 = <&pinctrl_uart2>;
354         status = "okay";
355 };
356
357 &uart3 {
358         pinctrl-names = "default";
359         pinctrl-0 = <&pinctrl_uart3>;
360         status = "okay";
361 };
362
363 &uart5 {
364         pinctrl-names = "default";
365         pinctrl-0 = <&pinctrl_uart5>;
366         status = "okay";
367 };
368
369 &usbotg {
370         vbus-supply = <&reg_usb_otg_vbus>;
371         pinctrl-names = "default";
372         pinctrl-0 = <&pinctrl_usbotg>;
373         disable-over-current;
374         status = "okay";
375 };
376
377 &usbh1 {
378         status = "okay";
379 };