arch/arm/boot/dts/imx6qdl-gw52xx.dtsi

   1 /*
   2  * Copyright 2013 Gateworks Corporation
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 / {
  13         /* these are used by bootloader for disabling nodes */
  14         aliases {
  15                 ethernet0 = &fec;
  16                 led0 = &led0;
  17                 led1 = &led1;
  18                 led2 = &led2;
  19                 nand = &gpmi;
  20                 ssi0 = &ssi1;
  21                 usb0 = &usbh1;
  22                 usb1 = &usbotg;
  23                 usdhc2 = &usdhc3;
  24         };
  25
  26         chosen {
  27                 bootargs = "console=ttymxc1,115200";
  28         };
  29
  30         backlight {
  31                 compatible = "pwm-backlight";
  32                 pwms = <&pwm4 0 5000000>;
  33                 brightness-levels = <0 4 8 16 32 64 128 255>;
  34                 default-brightness-level = <7>;
  35         };
  36
  37         leds {
  38                 compatible = "gpio-leds";
  39
  40                 led0: user1 {
  41                         label = "user1";
  42                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
  43                         default-state = "on";
  44                         linux,default-trigger = "heartbeat";
  45                 };
  46
  47                 led1: user2 {
  48                         label = "user2";
  49                         gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
  50                         default-state = "off";
  51                 };
  52
  53                 led2: user3 {
  54                         label = "user3";
  55                         gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
  56                         default-state = "off";
  57                 };
  58         };
  59
  60         memory {
  61                 reg = <0x10000000 0x20000000>;
  62         };
  63
  64         pps {
  65                 compatible = "pps-gpio";
  66                 gpios = <&gpio1 26 0>;
  67                 status = "okay";
  68         };
  69
  70         regulators {
  71                 compatible = "simple-bus";
  72                 #address-cells = <1>;
  73                 #size-cells = <0>;
  74
  75                 reg_1p0v: regulator@0 {
  76                         compatible = "regulator-fixed";
  77                         reg = <0>;
  78                         regulator-name = "1P0V";
  79                         regulator-min-microvolt = <1000000>;
  80                         regulator-max-microvolt = <1000000>;
  81                         regulator-always-on;
  82                 };
  83
  84                 /* remove this fixed regulator once ltc3676__sw2 driver available */
  85                 reg_1p8v: regulator@1 {
  86                         compatible = "regulator-fixed";
  87                         reg = <1>;
  88                         regulator-name = "1P8V";
  89                         regulator-min-microvolt = <1800000>;
  90                         regulator-max-microvolt = <1800000>;
  91                         regulator-always-on;
  92                 };
  93
  94                 reg_3p3v: regulator@2 {
  95                         compatible = "regulator-fixed";
  96                         reg = <2>;
  97                         regulator-name = "3P3V";
  98                         regulator-min-microvolt = <3300000>;
  99                         regulator-max-microvolt = <3300000>;
 100                         regulator-always-on;
 101                 };
 102
 103                 reg_5p0v: regulator@3 {
 104                         compatible = "regulator-fixed";
 105                         reg = <3>;
 106                         regulator-name = "5P0V";
 107                         regulator-min-microvolt = <5000000>;
 108                         regulator-max-microvolt = <5000000>;
 109                         regulator-always-on;
 110                 };
 111
 112                 reg_usb_otg_vbus: regulator@4 {
 113                         compatible = "regulator-fixed";
 114                         reg = <4>;
 115                         regulator-name = "usb_otg_vbus";
 116                         regulator-min-microvolt = <5000000>;
 117                         regulator-max-microvolt = <5000000>;
 118                         gpio = <&gpio3 22 0>;
 119                         enable-active-high;
 120                 };
 121         };
 122
 123         sound {
 124                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 125                              "fsl,imx-audio-sgtl5000";
 126                 model = "imx6q-sabrelite-sgtl5000";
 127                 ssi-controller = <&ssi1>;
 128                 audio-codec = <&codec>;
 129                 audio-routing =
 130                         "MIC_IN", "Mic Jack",
 131                         "Mic Jack", "Mic Bias",
 132                         "Headphone Jack", "HP_OUT";
 133                 mux-int-port = <1>;
 134                 mux-ext-port = <4>;
 135         };
 136 };
 137
 138 &audmux {
 139         pinctrl-names = "default";
 140         pinctrl-0 = <&pinctrl_audmux>;
 141         status = "okay";
 142 };
 143
 144 &fec {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&pinctrl_enet>;
 147         phy-mode = "rgmii";
 148         phy-reset-gpios = <&gpio1 30 0>;
 149         status = "okay";
 150 };
 151
 152 &gpmi {
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_gpmi_nand>;
 155         status = "okay";
 156 };
 157
 158 &hdmi {
 159         ddc-i2c-bus = <&i2c3>;
 160         status = "okay";
 161 };
 162
 163 &i2c1 {
 164         clock-frequency = <100000>;
 165         pinctrl-names = "default";
 166         pinctrl-0 = <&pinctrl_i2c1>;
 167         status = "okay";
 168
 169         eeprom1: eeprom@50 {
 170                 compatible = "atmel,24c02";
 171                 reg = <0x50>;
 172                 pagesize = <16>;
 173         };
 174
 175         eeprom2: eeprom@51 {
 176                 compatible = "atmel,24c02";
 177                 reg = <0x51>;
 178                 pagesize = <16>;
 179         };
 180
 181         eeprom3: eeprom@52 {
 182                 compatible = "atmel,24c02";
 183                 reg = <0x52>;
 184                 pagesize = <16>;
 185         };
 186
 187         eeprom4: eeprom@53 {
 188                 compatible = "atmel,24c02";
 189                 reg = <0x53>;
 190                 pagesize = <16>;
 191         };
 192
 193         gpio: pca9555@23 {
 194                 compatible = "nxp,pca9555";
 195                 reg = <0x23>;
 196                 gpio-controller;
 197                 #gpio-cells = <2>;
 198         };
 199
 200         hwmon: gsc@29 {
 201                 compatible = "gw,gsp";
 202                 reg = <0x29>;
 203         };
 204
 205         rtc: ds1672@68 {
 206                 compatible = "dallas,ds1672";
 207                 reg = <0x68>;
 208         };
 209 };
 210
 211 &i2c2 {
 212         clock-frequency = <100000>;
 213         pinctrl-names = "default";
 214         pinctrl-0 = <&pinctrl_i2c2>;
 215         status = "okay";
 216
 217         pciswitch: pex8609@3f {
 218                 compatible = "plx,pex8609";
 219                 reg = <0x3f>;
 220         };
 221
 222         pmic: ltc3676@3c {
 223                 compatible = "ltc,ltc3676";
 224                 reg = <0x3c>;
 225
 226                 regulators {
 227                         sw1_reg: ltc3676__sw1 {
 228                                 regulator-min-microvolt = <1175000>;
 229                                 regulator-max-microvolt = <1175000>;
 230                                 regulator-boot-on;
 231                                 regulator-always-on;
 232                         };
 233
 234                         sw2_reg: ltc3676__sw2 {
 235                                 regulator-min-microvolt = <1800000>;
 236                                 regulator-max-microvolt = <1800000>;
 237                                 regulator-boot-on;
 238                                 regulator-always-on;
 239                         };
 240
 241                         sw3_reg: ltc3676__sw3 {
 242                                 regulator-min-microvolt = <1175000>;
 243                                 regulator-max-microvolt = <1175000>;
 244                                 regulator-boot-on;
 245                                 regulator-always-on;
 246                         };
 247
 248                         sw4_reg: ltc3676__sw4 {
 249                                 regulator-min-microvolt = <1500000>;
 250                                 regulator-max-microvolt = <1500000>;
 251                                 regulator-boot-on;
 252                                 regulator-always-on;
 253                         };
 254
 255                         ldo2_reg: ltc3676__ldo2 {
 256                                 regulator-min-microvolt = <2500000>;
 257                                 regulator-max-microvolt = <2500000>;
 258                                 regulator-boot-on;
 259                                 regulator-always-on;
 260                         };
 261
 262                         ldo3_reg: ltc3676__ldo3 {
 263                                 regulator-min-microvolt = <1800000>;
 264                                 regulator-max-microvolt = <1800000>;
 265                                 regulator-boot-on;
 266                                 regulator-always-on;
 267                         };
 268
 269                         ldo4_reg: ltc3676__ldo4 {
 270                                 regulator-min-microvolt = <3000000>;
 271                                 regulator-max-microvolt = <3000000>;
 272                         };
 273                 };
 274         };
 275 };
 276
 277 &i2c3 {
 278         clock-frequency = <100000>;
 279         pinctrl-names = "default";
 280         pinctrl-0 = <&pinctrl_i2c3>;
 281         status = "okay";
 282
 283         accelerometer: fxos8700@1e {
 284                 compatible = "fsl,fxos8700";
 285                 reg = <0x13>;
 286         };
 287
 288         codec: sgtl5000@0a {
 289                 compatible = "fsl,sgtl5000";
 290                 reg = <0x0a>;
 291                 clocks = <&clks 169>;
 292                 VDDA-supply = <&reg_1p8v>;
 293                 VDDIO-supply = <&reg_3p3v>;
 294         };
 295
 296         touchscreen: egalax_ts@04 {
 297                 compatible = "eeti,egalax_ts";
 298                 reg = <0x04>;
 299                 interrupt-parent = <&gpio7>;
 300                 interrupts = <12 2>; /* gpio7_12 active low */
 301                 wakeup-gpios = <&gpio7 12 0>;
 302         };
 303
 304         videoin: adv7180@20 {
 305                 compatible = "adi,adv7180";
 306                 reg = <0x20>;
 307         };
 308 };
 309
 310 &iomuxc {
 311         pinctrl-names = "default";
 312         pinctrl-0 = <&pinctrl_hog>;
 313
 314         imx6qdl-gw52xx {
 315                 pinctrl_hog: hoggrp {
 316                         fsl,pins = <
 317                                 MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
 318                                 MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
 319                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
 320                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31   0x80000000 /* VIDDEC_PDN# */
 321                                 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
 322                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
 323                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
 324                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
 325                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1     0x000130b0 /* AUD4_MCK */
 326                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02    0x80000000 /* USB_SEL_PCI */
 327                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12   0x80000000 /* TOUCH_IRQ# */
 328                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
 329                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
 330                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15  0x80000000 /* user3 led */
 331                                 MX6QDL_PAD_SD2_CMD__GPIO1_IO11   0x80000000 /* LVDS_TCH# */
 332                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00  0x80000000 /* SD3_CD# */
 333                                 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11  0x80000000 /* UART2_EN# */
 334                          >;
 335                 };
 336
 337                 pinctrl_audmux: audmuxgrp {
 338                         fsl,pins = <
 339                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 340                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 341                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 342                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 343                         >;
 344                 };
 345
 346                 pinctrl_enet: enetgrp {
 347                         fsl,pins = <
 348                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 349                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 350                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 351                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 352                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 353                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 354                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 355                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 356                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 357                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 358                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 359                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 360                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 361                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 362                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 363                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 364                         >;
 365                 };
 366
 367                 pinctrl_gpmi_nand: gpminandgrp {
 368                         fsl,pins = <
 369                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 370                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 371                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 372                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 373                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 374                                 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
 375                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 376                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 377                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 378                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 379                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 380                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 381                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 382                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 383                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 384                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 385                         >;
 386                 };
 387
 388                 pinctrl_i2c1: i2c1grp {
 389                         fsl,pins = <
 390                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 391                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 392                         >;
 393                 };
 394
 395                 pinctrl_i2c2: i2c2grp {
 396                         fsl,pins = <
 397                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 398                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 399                         >;
 400                 };
 401
 402                 pinctrl_i2c3: i2c3grp {
 403                         fsl,pins = <
 404                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 405                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 406                         >;
 407                 };
 408
 409                 pinctrl_pwm4: pwm4grp {
 410                         fsl,pins = <
 411                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 412                         >;
 413                 };
 414
 415                 pinctrl_uart1: uart1grp {
 416                         fsl,pins = <
 417                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 418                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 419                         >;
 420                 };
 421
 422                 pinctrl_uart2: uart2grp {
 423                         fsl,pins = <
 424                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 425                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 426                         >;
 427                 };
 428
 429                 pinctrl_uart5: uart5grp {
 430                         fsl,pins = <
 431                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 432                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 433                         >;
 434                 };
 435
 436                 pinctrl_usbotg: usbotggrp {
 437                         fsl,pins = <
 438                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 439                         >;
 440                 };
 441
 442                 pinctrl_usdhc3: usdhc3grp {
 443                         fsl,pins = <
 444                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 445                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 446                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 447                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 448                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 449                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 450                         >;
 451                 };
 452         };
 453 };
 454
 455 &ldb {
 456         status = "okay";
 457
 458         lvds-channel@0 {
 459                 fsl,data-mapping = "spwg";
 460                 fsl,data-width = <18>;
 461                 status = "okay";
 462
 463                 display-timings {
 464                         native-mode = <&timing0>;
 465                         timing0: hsd100pxn1 {
 466                                 clock-frequency = <65000000>;
 467                                 hactive = <1024>;
 468                                 vactive = <768>;
 469                                 hback-porch = <220>;
 470                                 hfront-porch = <40>;
 471                                 vback-porch = <21>;
 472                                 vfront-porch = <7>;
 473                                 hsync-len = <60>;
 474                                 vsync-len = <10>;
 475                         };
 476                 };
 477         };
 478 };
 479
 480 &pcie {
 481         reset-gpio = <&gpio1 29 0>;
 482         status = "okay";
 483 };
 484
 485 &pwm4 {
 486         pinctrl-names = "default";
 487         pinctrl-0 = <&pinctrl_pwm4>;
 488         status = "okay";
 489 };
 490
 491 &ssi1 {
 492         fsl,mode = "i2s-slave";
 493         status = "okay";
 494 };
 495
 496 &uart1 {
 497         pinctrl-names = "default";
 498         pinctrl-0 = <&pinctrl_uart1>;
 499         status = "okay";
 500 };
 501
 502 &uart2 {
 503         pinctrl-names = "default";
 504         pinctrl-0 = <&pinctrl_uart2>;
 505         status = "okay";
 506 };
 507
 508 &uart5 {
 509         pinctrl-names = "default";
 510         pinctrl-0 = <&pinctrl_uart5>;
 511         status = "okay";
 512 };
 513
 514 &usbotg {
 515         vbus-supply = <&reg_usb_otg_vbus>;
 516         pinctrl-names = "default";
 517         pinctrl-0 = <&pinctrl_usbotg>;
 518         disable-over-current;
 519         status = "okay";
 520 };
 521
 522 &usbh1 {
 523         status = "okay";
 524 };
 525
 526 &usdhc3 {
 527         pinctrl-names = "default";
 528         pinctrl-0 = <&pinctrl_usdhc3>;
 529         cd-gpios = <&gpio7 0 0>;
 530         vmmc-supply = <&reg_3p3v>;
 531         status = "okay";
 532 };