arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         chosen {
  18                 stdout-path = &uart1;
  19         };
  20
  21         memory {
  22                 reg = <0x10000000 0x40000000>;
  23         };
  24
  25         regulators {
  26                 compatible = "simple-bus";
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 reg_usb_otg_vbus: regulator@0 {
  31                         compatible = "regulator-fixed";
  32                         reg = <0>;
  33                         regulator-name = "usb_otg_vbus";
  34                         regulator-min-microvolt = <5000000>;
  35                         regulator-max-microvolt = <5000000>;
  36                         gpio = <&gpio3 22 0>;
  37                         enable-active-high;
  38                 };
  39
  40                 reg_usb_h1_vbus: regulator@1 {
  41                         compatible = "regulator-fixed";
  42                         reg = <1>;
  43                         regulator-name = "usb_h1_vbus";
  44                         regulator-min-microvolt = <5000000>;
  45                         regulator-max-microvolt = <5000000>;
  46                         gpio = <&gpio1 29 0>;
  47                         enable-active-high;
  48                 };
  49
  50                 reg_audio: regulator@2 {
  51                         compatible = "regulator-fixed";
  52                         reg = <2>;
  53                         regulator-name = "wm8962-supply";
  54                         gpio = <&gpio4 10 0>;
  55                         enable-active-high;
  56                 };
  57
  58                 reg_pcie: regulator@3 {
  59                         compatible = "regulator-fixed";
  60                         reg = <3>;
  61                         pinctrl-names = "default";
  62                         pinctrl-0 = <&pinctrl_pcie_reg>;
  63                         regulator-name = "MPCIE_3V3";
  64                         regulator-min-microvolt = <3300000>;
  65                         regulator-max-microvolt = <3300000>;
  66                         gpio = <&gpio3 19 0>;
  67                         regulator-always-on;
  68                         enable-active-high;
  69                 };
  70         };
  71
  72         gpio-keys {
  73                 compatible = "gpio-keys";
  74                 pinctrl-names = "default";
  75                 pinctrl-0 = <&pinctrl_gpio_keys>;
  76
  77                 power {
  78                         label = "Power Button";
  79                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  80                         gpio-key,wakeup;
  81                         linux,code = <KEY_POWER>;
  82                 };
  83
  84                 volume-up {
  85                         label = "Volume Up";
  86                         gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  87                         gpio-key,wakeup;
  88                         linux,code = <KEY_VOLUMEUP>;
  89                 };
  90
  91                 volume-down {
  92                         label = "Volume Down";
  93                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  94                         gpio-key,wakeup;
  95                         linux,code = <KEY_VOLUMEDOWN>;
  96                 };
  97         };
  98
  99         sound {
 100                 compatible = "fsl,imx6q-sabresd-wm8962",
 101                            "fsl,imx-audio-wm8962";
 102                 model = "wm8962-audio";
 103                 ssi-controller = <&ssi2>;
 104                 audio-codec = <&codec>;
 105                 audio-routing =
 106                         "Headphone Jack", "HPOUTL",
 107                         "Headphone Jack", "HPOUTR",
 108                         "Ext Spk", "SPKOUTL",
 109                         "Ext Spk", "SPKOUTR",
 110                         "AMIC", "MICBIAS",
 111                         "IN3R", "AMIC";
 112                 mux-int-port = <2>;
 113                 mux-ext-port = <3>;
 114         };
 115
 116         backlight {
 117                 compatible = "pwm-backlight";
 118                 pwms = <&pwm1 0 5000000>;
 119                 brightness-levels = <0 4 8 16 32 64 128 255>;
 120                 default-brightness-level = <7>;
 121                 status = "okay";
 122         };
 123
 124         leds {
 125                 compatible = "gpio-leds";
 126                 pinctrl-names = "default";
 127                 pinctrl-0 = <&pinctrl_gpio_leds>;
 128
 129                 red {
 130                         gpios = <&gpio1 2 0>;
 131                         default-state = "on";
 132                 };
 133         };
 134 };
 135
 136 &audmux {
 137         pinctrl-names = "default";
 138         pinctrl-0 = <&pinctrl_audmux>;
 139         status = "okay";
 140 };
 141
 142 &ecspi1 {
 143         fsl,spi-num-chipselects = <1>;
 144         cs-gpios = <&gpio4 9 0>;
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&pinctrl_ecspi1>;
 147         status = "okay";
 148
 149         flash: m25p80@0 {
 150                 #address-cells = <1>;
 151                 #size-cells = <1>;
 152                 compatible = "st,m25p32";
 153                 spi-max-frequency = <20000000>;
 154                 reg = <0>;
 155         };
 156 };
 157
 158 &fec {
 159         pinctrl-names = "default";
 160         pinctrl-0 = <&pinctrl_enet>;
 161         phy-mode = "rgmii";
 162         phy-reset-gpios = <&gpio1 25 0>;
 163         fsl,magic-packet;
 164         status = "okay";
 165 };
 166
 167 &hdmi {
 168         ddc-i2c-bus = <&i2c2>;
 169         status = "okay";
 170 };
 171
 172 &i2c1 {
 173         clock-frequency = <100000>;
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_i2c1>;
 176         status = "okay";
 177
 178         codec: wm8962@1a {
 179                 compatible = "wlf,wm8962";
 180                 reg = <0x1a>;
 181                 clocks = <&clks IMX6QDL_CLK_CKO>;
 182                 DCVDD-supply = <&reg_audio>;
 183                 DBVDD-supply = <&reg_audio>;
 184                 AVDD-supply = <&reg_audio>;
 185                 CPVDD-supply = <&reg_audio>;
 186                 MICVDD-supply = <&reg_audio>;
 187                 PLLVDD-supply = <&reg_audio>;
 188                 SPKVDD1-supply = <&reg_audio>;
 189                 SPKVDD2-supply = <&reg_audio>;
 190                 gpio-cfg = <
 191                         0x0000 /* 0:Default */
 192                         0x0000 /* 1:Default */
 193                         0x0013 /* 2:FN_DMICCLK */
 194                         0x0000 /* 3:Default */
 195                         0x8014 /* 4:FN_DMICCDAT */
 196                         0x0000 /* 5:Default */
 197                 >;
 198        };
 199 };
 200
 201 &i2c2 {
 202         clock-frequency = <100000>;
 203         pinctrl-names = "default";
 204         pinctrl-0 = <&pinctrl_i2c2>;
 205         status = "okay";
 206
 207         pmic: pfuze100@08 {
 208                 compatible = "fsl,pfuze100";
 209                 reg = <0x08>;
 210
 211                 regulators {
 212                         sw1a_reg: sw1ab {
 213                                 regulator-min-microvolt = <300000>;
 214                                 regulator-max-microvolt = <1875000>;
 215                                 regulator-boot-on;
 216                                 regulator-always-on;
 217                                 regulator-ramp-delay = <6250>;
 218                         };
 219
 220                         sw1c_reg: sw1c {
 221                                 regulator-min-microvolt = <300000>;
 222                                 regulator-max-microvolt = <1875000>;
 223                                 regulator-boot-on;
 224                                 regulator-always-on;
 225                                 regulator-ramp-delay = <6250>;
 226                         };
 227
 228                         sw2_reg: sw2 {
 229                                 regulator-min-microvolt = <800000>;
 230                                 regulator-max-microvolt = <3300000>;
 231                                 regulator-boot-on;
 232                                 regulator-always-on;
 233                         };
 234
 235                         sw3a_reg: sw3a {
 236                                 regulator-min-microvolt = <400000>;
 237                                 regulator-max-microvolt = <1975000>;
 238                                 regulator-boot-on;
 239                                 regulator-always-on;
 240                         };
 241
 242                         sw3b_reg: sw3b {
 243                                 regulator-min-microvolt = <400000>;
 244                                 regulator-max-microvolt = <1975000>;
 245                                 regulator-boot-on;
 246                                 regulator-always-on;
 247                         };
 248
 249                         sw4_reg: sw4 {
 250                                 regulator-min-microvolt = <800000>;
 251                                 regulator-max-microvolt = <3300000>;
 252                         };
 253
 254                         swbst_reg: swbst {
 255                                 regulator-min-microvolt = <5000000>;
 256                                 regulator-max-microvolt = <5150000>;
 257                         };
 258
 259                         snvs_reg: vsnvs {
 260                                 regulator-min-microvolt = <1000000>;
 261                                 regulator-max-microvolt = <3000000>;
 262                                 regulator-boot-on;
 263                                 regulator-always-on;
 264                         };
 265
 266                         vref_reg: vrefddr {
 267                                 regulator-boot-on;
 268                                 regulator-always-on;
 269                         };
 270
 271                         vgen1_reg: vgen1 {
 272                                 regulator-min-microvolt = <800000>;
 273                                 regulator-max-microvolt = <1550000>;
 274                         };
 275
 276                         vgen2_reg: vgen2 {
 277                                 regulator-min-microvolt = <800000>;
 278                                 regulator-max-microvolt = <1550000>;
 279                         };
 280
 281                         vgen3_reg: vgen3 {
 282                                 regulator-min-microvolt = <1800000>;
 283                                 regulator-max-microvolt = <3300000>;
 284                         };
 285
 286                         vgen4_reg: vgen4 {
 287                                 regulator-min-microvolt = <1800000>;
 288                                 regulator-max-microvolt = <3300000>;
 289                                 regulator-always-on;
 290                         };
 291
 292                         vgen5_reg: vgen5 {
 293                                 regulator-min-microvolt = <1800000>;
 294                                 regulator-max-microvolt = <3300000>;
 295                                 regulator-always-on;
 296                         };
 297
 298                         vgen6_reg: vgen6 {
 299                                 regulator-min-microvolt = <1800000>;
 300                                 regulator-max-microvolt = <3300000>;
 301                                 regulator-always-on;
 302                         };
 303                 };
 304         };
 305 };
 306
 307 &i2c3 {
 308         clock-frequency = <100000>;
 309         pinctrl-names = "default";
 310         pinctrl-0 = <&pinctrl_i2c3>;
 311         status = "okay";
 312
 313         egalax_ts@04 {
 314                 compatible = "eeti,egalax_ts";
 315                 reg = <0x04>;
 316                 interrupt-parent = <&gpio6>;
 317                 interrupts = <7 2>;
 318                 wakeup-gpios = <&gpio6 7 0>;
 319         };
 320 };
 321
 322 &iomuxc {
 323         pinctrl-names = "default";
 324         pinctrl-0 = <&pinctrl_hog>;
 325
 326         imx6qdl-sabresd {
 327                 pinctrl_hog: hoggrp {
 328                         fsl,pins = <
 329                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
 330                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
 331                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
 332                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
 333                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 334                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
 335                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
 336                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x1b0b0
 337                                 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
 338                         >;
 339                 };
 340
 341                 pinctrl_audmux: audmuxgrp {
 342                         fsl,pins = <
 343                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 344                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 345                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 346                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 347                         >;
 348                 };
 349
 350                 pinctrl_ecspi1: ecspi1grp {
 351                         fsl,pins = <
 352                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
 353                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
 354                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
 355                                 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09         0x1b0b0
 356                         >;
 357                 };
 358
 359                 pinctrl_enet: enetgrp {
 360                         fsl,pins = <
 361                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 362                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 363                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 364                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 365                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 366                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 367                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 368                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 369                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 370                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 371                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 372                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 373                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 374                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 375                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 376                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 377                         >;
 378                 };
 379
 380                 pinctrl_gpio_keys: gpio_keysgrp {
 381                         fsl,pins = <
 382                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
 383                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x1b0b0
 384                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x1b0b0
 385                         >;
 386                 };
 387
 388                 pinctrl_i2c1: i2c1grp {
 389                         fsl,pins = <
 390                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
 391                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
 392                         >;
 393                 };
 394
 395                 pinctrl_i2c2: i2c2grp {
 396                         fsl,pins = <
 397                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 398                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 399                         >;
 400                 };
 401
 402                 pinctrl_i2c3: i2c3grp {
 403                         fsl,pins = <
 404                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 405                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 406                         >;
 407                 };
 408
 409                 pinctrl_pcie: pciegrp {
 410                         fsl,pins = <
 411                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x1b0b0
 412                         >;
 413                 };
 414
 415                 pinctrl_pcie_reg: pciereggrp {
 416                         fsl,pins = <
 417                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x1b0b0
 418                         >;
 419                 };
 420
 421                 pinctrl_pwm1: pwm1grp {
 422                         fsl,pins = <
 423                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 424                         >;
 425                 };
 426
 427                 pinctrl_uart1: uart1grp {
 428                         fsl,pins = <
 429                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 430                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 431                         >;
 432                 };
 433
 434                 pinctrl_usbotg: usbotggrp {
 435                         fsl,pins = <
 436                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 437                         >;
 438                 };
 439
 440                 pinctrl_usdhc2: usdhc2grp {
 441                         fsl,pins = <
 442                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 443                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 444                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 445                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 446                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 447                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 448                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
 449                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
 450                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
 451                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
 452                         >;
 453                 };
 454
 455                 pinctrl_usdhc3: usdhc3grp {
 456                         fsl,pins = <
 457                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 458                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 459                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 460                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 461                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 462                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 463                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 464                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 465                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 466                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 467                         >;
 468                 };
 469
 470                 pinctrl_usdhc4: usdhc4grp {
 471                         fsl,pins = <
 472                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 473                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 474                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 475                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 476                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 477                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 478                                 MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 479                                 MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 480                                 MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 481                                 MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 482                         >;
 483                 };
 484         };
 485
 486         gpio_leds {
 487                 pinctrl_gpio_leds: gpioledsgrp {
 488                         fsl,pins = <
 489                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
 490                         >;
 491                 };
 492         };
 493 };
 494
 495 &ldb {
 496         status = "okay";
 497
 498         lvds-channel@1 {
 499                 fsl,data-mapping = "spwg";
 500                 fsl,data-width = <18>;
 501                 status = "okay";
 502
 503                 display-timings {
 504                         native-mode = <&timing0>;
 505                         timing0: hsd100pxn1 {
 506                                 clock-frequency = <65000000>;
 507                                 hactive = <1024>;
 508                                 vactive = <768>;
 509                                 hback-porch = <220>;
 510                                 hfront-porch = <40>;
 511                                 vback-porch = <21>;
 512                                 vfront-porch = <7>;
 513                                 hsync-len = <60>;
 514                                 vsync-len = <10>;
 515                         };
 516                 };
 517         };
 518 };
 519
 520 &pcie {
 521         pinctrl-names = "default";
 522         pinctrl-0 = <&pinctrl_pcie>;
 523         reset-gpio = <&gpio7 12 0>;
 524         status = "okay";
 525 };
 526
 527 &pwm1 {
 528         pinctrl-names = "default";
 529         pinctrl-0 = <&pinctrl_pwm1>;
 530         status = "okay";
 531 };
 532
 533 &snvs_poweroff {
 534         status = "okay";
 535 };
 536
 537 &ssi2 {
 538         status = "okay";
 539 };
 540
 541 &uart1 {
 542         pinctrl-names = "default";
 543         pinctrl-0 = <&pinctrl_uart1>;
 544         status = "okay";
 545 };
 546
 547 &usbh1 {
 548         vbus-supply = <&reg_usb_h1_vbus>;
 549         status = "okay";
 550 };
 551
 552 &usbotg {
 553         vbus-supply = <&reg_usb_otg_vbus>;
 554         pinctrl-names = "default";
 555         pinctrl-0 = <&pinctrl_usbotg>;
 556         disable-over-current;
 557         status = "okay";
 558 };
 559
 560 &usdhc2 {
 561         pinctrl-names = "default";
 562         pinctrl-0 = <&pinctrl_usdhc2>;
 563         bus-width = <8>;
 564         cd-gpios = <&gpio2 2 0>;
 565         wp-gpios = <&gpio2 3 0>;
 566         status = "okay";
 567 };
 568
 569 &usdhc3 {
 570         pinctrl-names = "default";
 571         pinctrl-0 = <&pinctrl_usdhc3>;
 572         bus-width = <8>;
 573         cd-gpios = <&gpio2 0 0>;
 574         wp-gpios = <&gpio2 1 0>;
 575         status = "okay";
 576 };
 577
 578 &usdhc4 {
 579         pinctrl-names = "default";
 580         pinctrl-0 = <&pinctrl_usdhc4>;
 581         bus-width = <8>;
 582         non-removable;
 583         no-1-8-v;
 584         status = "okay";
 585 };