arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         chosen {
  18                 stdout-path = &uart1;
  19         };
  20
  21         memory {
  22                 reg = <0x10000000 0x40000000>;
  23         };
  24
  25         regulators {
  26                 compatible = "simple-bus";
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 reg_usb_otg_vbus: regulator@0 {
  31                         compatible = "regulator-fixed";
  32                         reg = <0>;
  33                         regulator-name = "usb_otg_vbus";
  34                         regulator-min-microvolt = <5000000>;
  35                         regulator-max-microvolt = <5000000>;
  36                         gpio = <&gpio3 22 0>;
  37                         enable-active-high;
  38                 };
  39
  40                 reg_usb_h1_vbus: regulator@1 {
  41                         compatible = "regulator-fixed";
  42                         reg = <1>;
  43                         regulator-name = "usb_h1_vbus";
  44                         regulator-min-microvolt = <5000000>;
  45                         regulator-max-microvolt = <5000000>;
  46                         gpio = <&gpio1 29 0>;
  47                         enable-active-high;
  48                 };
  49
  50                 reg_audio: regulator@2 {
  51                         compatible = "regulator-fixed";
  52                         reg = <2>;
  53                         regulator-name = "wm8962-supply";
  54                         gpio = <&gpio4 10 0>;
  55                         enable-active-high;
  56                 };
  57         };
  58
  59         gpio-keys {
  60                 compatible = "gpio-keys";
  61                 pinctrl-names = "default";
  62                 pinctrl-0 = <&pinctrl_gpio_keys>;
  63
  64                 power {
  65                         label = "Power Button";
  66                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  67                         gpio-key,wakeup;
  68                         linux,code = <KEY_POWER>;
  69                 };
  70
  71                 volume-up {
  72                         label = "Volume Up";
  73                         gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  74                         gpio-key,wakeup;
  75                         linux,code = <KEY_VOLUMEUP>;
  76                 };
  77
  78                 volume-down {
  79                         label = "Volume Down";
  80                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  81                         gpio-key,wakeup;
  82                         linux,code = <KEY_VOLUMEDOWN>;
  83                 };
  84         };
  85
  86         sound {
  87                 compatible = "fsl,imx6q-sabresd-wm8962",
  88                            "fsl,imx-audio-wm8962";
  89                 model = "wm8962-audio";
  90                 ssi-controller = <&ssi2>;
  91                 audio-codec = <&codec>;
  92                 audio-routing =
  93                         "Headphone Jack", "HPOUTL",
  94                         "Headphone Jack", "HPOUTR",
  95                         "Ext Spk", "SPKOUTL",
  96                         "Ext Spk", "SPKOUTR",
  97                         "MICBIAS", "AMIC",
  98                         "IN3R", "MICBIAS",
  99                         "DMIC", "MICBIAS",
 100                         "DMICDAT", "DMIC";
 101                 mux-int-port = <2>;
 102                 mux-ext-port = <3>;
 103         };
 104
 105         backlight {
 106                 compatible = "pwm-backlight";
 107                 pwms = <&pwm1 0 5000000>;
 108                 brightness-levels = <0 4 8 16 32 64 128 255>;
 109                 default-brightness-level = <7>;
 110                 status = "okay";
 111         };
 112
 113         leds {
 114                 compatible = "gpio-leds";
 115                 pinctrl-names = "default";
 116                 pinctrl-0 = <&pinctrl_gpio_leds>;
 117
 118                 red {
 119                         gpios = <&gpio1 2 0>;
 120                         default-state = "on";
 121                 };
 122         };
 123 };
 124
 125 &audmux {
 126         pinctrl-names = "default";
 127         pinctrl-0 = <&pinctrl_audmux>;
 128         status = "okay";
 129 };
 130
 131 &ecspi1 {
 132         fsl,spi-num-chipselects = <1>;
 133         cs-gpios = <&gpio4 9 0>;
 134         pinctrl-names = "default";
 135         pinctrl-0 = <&pinctrl_ecspi1>;
 136         status = "okay";
 137
 138         flash: m25p80@0 {
 139                 #address-cells = <1>;
 140                 #size-cells = <1>;
 141                 compatible = "st,m25p32";
 142                 spi-max-frequency = <20000000>;
 143                 reg = <0>;
 144         };
 145 };
 146
 147 &fec {
 148         pinctrl-names = "default";
 149         pinctrl-0 = <&pinctrl_enet>;
 150         phy-mode = "rgmii";
 151         phy-reset-gpios = <&gpio1 25 0>;
 152         status = "okay";
 153 };
 154
 155 &hdmi {
 156         ddc-i2c-bus = <&i2c2>;
 157         status = "okay";
 158 };
 159
 160 &i2c1 {
 161         clock-frequency = <100000>;
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&pinctrl_i2c1>;
 164         status = "okay";
 165
 166         codec: wm8962@1a {
 167                 compatible = "wlf,wm8962";
 168                 reg = <0x1a>;
 169                 clocks = <&clks 201>;
 170                 DCVDD-supply = <&reg_audio>;
 171                 DBVDD-supply = <&reg_audio>;
 172                 AVDD-supply = <&reg_audio>;
 173                 CPVDD-supply = <&reg_audio>;
 174                 MICVDD-supply = <&reg_audio>;
 175                 PLLVDD-supply = <&reg_audio>;
 176                 SPKVDD1-supply = <&reg_audio>;
 177                 SPKVDD2-supply = <&reg_audio>;
 178                 gpio-cfg = <
 179                         0x0000 /* 0:Default */
 180                         0x0000 /* 1:Default */
 181                         0x0013 /* 2:FN_DMICCLK */
 182                         0x0000 /* 3:Default */
 183                         0x8014 /* 4:FN_DMICCDAT */
 184                         0x0000 /* 5:Default */
 185                 >;
 186        };
 187 };
 188
 189 &i2c2 {
 190         clock-frequency = <100000>;
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&pinctrl_i2c2>;
 193         status = "okay";
 194
 195         pmic: pfuze100@08 {
 196                 compatible = "fsl,pfuze100";
 197                 reg = <0x08>;
 198
 199                 regulators {
 200                         sw1a_reg: sw1ab {
 201                                 regulator-min-microvolt = <300000>;
 202                                 regulator-max-microvolt = <1875000>;
 203                                 regulator-boot-on;
 204                                 regulator-always-on;
 205                                 regulator-ramp-delay = <6250>;
 206                         };
 207
 208                         sw1c_reg: sw1c {
 209                                 regulator-min-microvolt = <300000>;
 210                                 regulator-max-microvolt = <1875000>;
 211                                 regulator-boot-on;
 212                                 regulator-always-on;
 213                                 regulator-ramp-delay = <6250>;
 214                         };
 215
 216                         sw2_reg: sw2 {
 217                                 regulator-min-microvolt = <800000>;
 218                                 regulator-max-microvolt = <3300000>;
 219                                 regulator-boot-on;
 220                                 regulator-always-on;
 221                         };
 222
 223                         sw3a_reg: sw3a {
 224                                 regulator-min-microvolt = <400000>;
 225                                 regulator-max-microvolt = <1975000>;
 226                                 regulator-boot-on;
 227                                 regulator-always-on;
 228                         };
 229
 230                         sw3b_reg: sw3b {
 231                                 regulator-min-microvolt = <400000>;
 232                                 regulator-max-microvolt = <1975000>;
 233                                 regulator-boot-on;
 234                                 regulator-always-on;
 235                         };
 236
 237                         sw4_reg: sw4 {
 238                                 regulator-min-microvolt = <800000>;
 239                                 regulator-max-microvolt = <3300000>;
 240                         };
 241
 242                         swbst_reg: swbst {
 243                                 regulator-min-microvolt = <5000000>;
 244                                 regulator-max-microvolt = <5150000>;
 245                         };
 246
 247                         snvs_reg: vsnvs {
 248                                 regulator-min-microvolt = <1000000>;
 249                                 regulator-max-microvolt = <3000000>;
 250                                 regulator-boot-on;
 251                                 regulator-always-on;
 252                         };
 253
 254                         vref_reg: vrefddr {
 255                                 regulator-boot-on;
 256                                 regulator-always-on;
 257                         };
 258
 259                         vgen1_reg: vgen1 {
 260                                 regulator-min-microvolt = <800000>;
 261                                 regulator-max-microvolt = <1550000>;
 262                         };
 263
 264                         vgen2_reg: vgen2 {
 265                                 regulator-min-microvolt = <800000>;
 266                                 regulator-max-microvolt = <1550000>;
 267                         };
 268
 269                         vgen3_reg: vgen3 {
 270                                 regulator-min-microvolt = <1800000>;
 271                                 regulator-max-microvolt = <3300000>;
 272                         };
 273
 274                         vgen4_reg: vgen4 {
 275                                 regulator-min-microvolt = <1800000>;
 276                                 regulator-max-microvolt = <3300000>;
 277                                 regulator-always-on;
 278                         };
 279
 280                         vgen5_reg: vgen5 {
 281                                 regulator-min-microvolt = <1800000>;
 282                                 regulator-max-microvolt = <3300000>;
 283                                 regulator-always-on;
 284                         };
 285
 286                         vgen6_reg: vgen6 {
 287                                 regulator-min-microvolt = <1800000>;
 288                                 regulator-max-microvolt = <3300000>;
 289                                 regulator-always-on;
 290                         };
 291                 };
 292         };
 293 };
 294
 295 &i2c3 {
 296         clock-frequency = <100000>;
 297         pinctrl-names = "default";
 298         pinctrl-0 = <&pinctrl_i2c3>;
 299         status = "okay";
 300
 301         egalax_ts@04 {
 302                 compatible = "eeti,egalax_ts";
 303                 reg = <0x04>;
 304                 interrupt-parent = <&gpio6>;
 305                 interrupts = <7 2>;
 306                 wakeup-gpios = <&gpio6 7 0>;
 307         };
 308 };
 309
 310 &iomuxc {
 311         pinctrl-names = "default";
 312         pinctrl-0 = <&pinctrl_hog>;
 313
 314         imx6qdl-sabresd {
 315                 pinctrl_hog: hoggrp {
 316                         fsl,pins = <
 317                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
 318                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 319                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 320                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
 321                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 322                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
 323                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 324                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 325                                 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
 326                         >;
 327                 };
 328
 329                 pinctrl_audmux: audmuxgrp {
 330                         fsl,pins = <
 331                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 332                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 333                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 334                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 335                         >;
 336                 };
 337
 338                 pinctrl_ecspi1: ecspi1grp {
 339                         fsl,pins = <
 340                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
 341                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
 342                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
 343                                 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09         0x1b0b0
 344                         >;
 345                 };
 346
 347                 pinctrl_enet: enetgrp {
 348                         fsl,pins = <
 349                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 350                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 351                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 352                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 353                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 354                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 355                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 356                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 357                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 358                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 359                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 360                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 361                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 362                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 363                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 364                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 365                         >;
 366                 };
 367
 368                 pinctrl_gpio_keys: gpio_keysgrp {
 369                         fsl,pins = <
 370                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
 371                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x80000000
 372                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x80000000
 373                         >;
 374                 };
 375
 376                 pinctrl_i2c1: i2c1grp {
 377                         fsl,pins = <
 378                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
 379                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
 380                         >;
 381                 };
 382
 383                 pinctrl_i2c2: i2c2grp {
 384                         fsl,pins = <
 385                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 386                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 387                         >;
 388                 };
 389
 390                 pinctrl_i2c3: i2c3grp {
 391                         fsl,pins = <
 392                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 393                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 394                         >;
 395                 };
 396
 397                 pinctrl_pcie: pciegrp {
 398                         fsl,pins = <
 399                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x80000000
 400                         >;
 401                 };
 402
 403                 pinctrl_pwm1: pwm1grp {
 404                         fsl,pins = <
 405                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 406                         >;
 407                 };
 408
 409                 pinctrl_uart1: uart1grp {
 410                         fsl,pins = <
 411                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 412                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 413                         >;
 414                 };
 415
 416                 pinctrl_usbotg: usbotggrp {
 417                         fsl,pins = <
 418                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 419                         >;
 420                 };
 421
 422                 pinctrl_usdhc2: usdhc2grp {
 423                         fsl,pins = <
 424                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 425                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 426                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 427                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 428                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 429                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 430                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
 431                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
 432                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
 433                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
 434                         >;
 435                 };
 436
 437                 pinctrl_usdhc3: usdhc3grp {
 438                         fsl,pins = <
 439                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 440                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 441                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 442                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 443                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 444                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 445                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 446                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 447                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 448                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 449                         >;
 450                 };
 451
 452                 pinctrl_usdhc4: usdhc4grp {
 453                         fsl,pins = <
 454                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 455                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 456                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 457                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 458                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 459                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 460                                 MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 461                                 MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 462                                 MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 463                                 MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 464                         >;
 465                 };
 466         };
 467
 468         gpio_leds {
 469                 pinctrl_gpio_leds: gpioledsgrp {
 470                         fsl,pins = <
 471                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
 472                         >;
 473                 };
 474         };
 475 };
 476
 477 &ldb {
 478         status = "okay";
 479
 480         lvds-channel@1 {
 481                 fsl,data-mapping = "spwg";
 482                 fsl,data-width = <18>;
 483                 status = "okay";
 484
 485                 display-timings {
 486                         native-mode = <&timing0>;
 487                         timing0: hsd100pxn1 {
 488                                 clock-frequency = <65000000>;
 489                                 hactive = <1024>;
 490                                 vactive = <768>;
 491                                 hback-porch = <220>;
 492                                 hfront-porch = <40>;
 493                                 vback-porch = <21>;
 494                                 vfront-porch = <7>;
 495                                 hsync-len = <60>;
 496                                 vsync-len = <10>;
 497                         };
 498                 };
 499         };
 500 };
 501
 502 &pcie {
 503         pinctrl-names = "default";
 504         pinctrl-0 = <&pinctrl_pcie>;
 505         reset-gpio = <&gpio7 12 0>;
 506         status = "okay";
 507 };
 508
 509 &pwm1 {
 510         pinctrl-names = "default";
 511         pinctrl-0 = <&pinctrl_pwm1>;
 512         status = "okay";
 513 };
 514
 515 &ssi2 {
 516         status = "okay";
 517 };
 518
 519 &uart1 {
 520         pinctrl-names = "default";
 521         pinctrl-0 = <&pinctrl_uart1>;
 522         status = "okay";
 523 };
 524
 525 &usbh1 {
 526         vbus-supply = <&reg_usb_h1_vbus>;
 527         status = "okay";
 528 };
 529
 530 &usbotg {
 531         vbus-supply = <&reg_usb_otg_vbus>;
 532         pinctrl-names = "default";
 533         pinctrl-0 = <&pinctrl_usbotg>;
 534         disable-over-current;
 535         status = "okay";
 536 };
 537
 538 &usdhc2 {
 539         pinctrl-names = "default";
 540         pinctrl-0 = <&pinctrl_usdhc2>;
 541         bus-width = <8>;
 542         cd-gpios = <&gpio2 2 0>;
 543         wp-gpios = <&gpio2 3 0>;
 544         status = "okay";
 545 };
 546
 547 &usdhc3 {
 548         pinctrl-names = "default";
 549         pinctrl-0 = <&pinctrl_usdhc3>;
 550         bus-width = <8>;
 551         cd-gpios = <&gpio2 0 0>;
 552         wp-gpios = <&gpio2 1 0>;
 553         status = "okay";
 554 };
 555
 556 &usdhc4 {
 557         pinctrl-names = "default";
 558         pinctrl-0 = <&pinctrl_usdhc4>;
 559         bus-width = <8>;
 560         non-removable;
 561         no-1-8-v;
 562         status = "okay";
 563 };