Merge branch 'cec-defines' into for-linus
[cascardo/linux.git] / arch / arm / boot / dts / imx6qdl-udoo.dtsi
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  */
11
12 / {
13         chosen {
14                 stdout-path = &uart2;
15         };
16
17         memory {
18                 reg = <0x10000000 0x40000000>;
19         };
20
21         regulators {
22                 compatible = "simple-bus";
23                 #address-cells = <1>;
24                 #size-cells = <0>;
25
26                 reg_usb_h1_vbus: regulator@0 {
27                         compatible = "regulator-fixed";
28                         reg = <0>;
29                         regulator-name = "usb_h1_vbus";
30                         regulator-min-microvolt = <5000000>;
31                         regulator-max-microvolt = <5000000>;
32                         enable-active-high;
33                         startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
34                         gpio = <&gpio7 12 0>;
35                 };
36         };
37
38         sound {
39                 compatible = "fsl,imx6q-udoo-ac97",
40                              "fsl,imx-audio-ac97";
41                 model = "fsl,imx6q-udoo-ac97";
42                 audio-cpu = <&ssi1>;
43                 audio-routing =
44                         "RX", "Mic Jack",
45                         "Headphone Jack", "TX";
46                 mux-int-port = <1>;
47                 mux-ext-port = <6>;
48         };
49 };
50
51 &fec {
52         pinctrl-names = "default";
53         pinctrl-0 = <&pinctrl_enet>;
54         phy-mode = "rgmii";
55         status = "okay";
56 };
57
58 &hdmi {
59         ddc-i2c-bus = <&i2c2>;
60         status = "okay";
61 };
62
63 &i2c2 {
64         clock-frequency = <100000>;
65         pinctrl-names = "default";
66         pinctrl-0 = <&pinctrl_i2c2>;
67         status = "okay";
68 };
69
70 &iomuxc {
71         imx6q-udoo {
72                 pinctrl_enet: enetgrp {
73                         fsl,pins = <
74                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
75                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
76                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
77                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
78                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
79                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
80                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
81                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
82                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
83                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
84                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
85                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
86                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
87                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
88                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
89                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
90                         >;
91                 };
92
93                 pinctrl_i2c2: i2c2grp {
94                         fsl,pins = <
95                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
96                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
97                         >;
98                 };
99
100                 pinctrl_uart2: uart2grp {
101                         fsl,pins = <
102                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
103                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
104                         >;
105                 };
106
107                 pinctrl_usbh: usbhgrp {
108                         fsl,pins = <
109                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
110                                 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
111                         >;
112                 };
113
114                 pinctrl_usdhc3: usdhc3grp {
115                         fsl,pins = <
116                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
117                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
118                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
119                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
120                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
121                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
122                         >;
123                 };
124
125                 pinctrl_ac97_running: ac97running {
126                         fsl,pins = <
127                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
128                                 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x1b0b0
129                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x1b0b0
130                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x1b0b0
131                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
132                         >;
133                 };
134
135                 pinctrl_ac97_warm_reset: ac97warmreset {
136                         fsl,pins = <
137                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
138                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
139                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x1b0b0
140                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x1b0b0
141                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
142                         >;
143                 };
144
145                 pinctrl_ac97_reset: ac97reset {
146                         fsl,pins = <
147                                 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x1b0b0
148                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
149                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x1b0b0
150                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x1b0b0
151                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
152                         >;
153                 };
154         };
155 };
156
157 &uart2 {
158         pinctrl-names = "default";
159         pinctrl-0 = <&pinctrl_uart2>;
160         status = "okay";
161 };
162
163 &usbh1 {
164         pinctrl-names = "default";
165         pinctrl-0 = <&pinctrl_usbh>;
166         vbus-supply = <&reg_usb_h1_vbus>;
167         clocks = <&clks 201>;
168         status = "okay";
169 };
170
171 &usdhc3 {
172         pinctrl-names = "default";
173         pinctrl-0 = <&pinctrl_usdhc3>;
174         non-removable;
175         status = "okay";
176 };
177
178 &audmux {
179         status = "okay";
180 };
181
182 &ssi1 {
183         cell-index = <0>;
184         fsl,mode = "ac97-slave";
185         pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
186         pinctrl-0 = <&pinctrl_ac97_running>;
187         pinctrl-1 = <&pinctrl_ac97_reset>;
188         pinctrl-2 = <&pinctrl_ac97_warm_reset>;
189         ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
190         status = "okay";
191 };