arch/arm/boot/dts/imx7s.dtsi

   1 /*
   2  * Copyright 2015 Freescale Semiconductor, Inc.
   3  * Copyright 2016 Toradex AG
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This file is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License as
  12  *     published by the Free Software Foundation; either version 2 of the
  13  *     License, or (at your option) any later version.
  14  *
  15  *     This file is distributed in the hope that it will be useful,
  16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  *     GNU General Public License for more details.
  19  *
  20  * Or, alternatively,
  21  *
  22  *  b) Permission is hereby granted, free of charge, to any person
  23  *     obtaining a copy of this software and associated documentation
  24  *     files (the "Software"), to deal in the Software without
  25  *     restriction, including without limitation the rights to use,
  26  *     copy, modify, merge, publish, distribute, sublicense, and/or
  27  *     sell copies of the Software, and to permit persons to whom the
  28  *     Software is furnished to do so, subject to the following
  29  *     conditions:
  30  *
  31  *     The above copyright notice and this permission notice shall be
  32  *     included in all copies or substantial portions of the Software.
  33  *
  34  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  35  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  36  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  37  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  38  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  39  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  40  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  41  *     OTHER DEALINGS IN THE SOFTWARE.
  42  */
  43
  44 #include <dt-bindings/clock/imx7d-clock.h>
  45 #include <dt-bindings/gpio/gpio.h>
  46 #include <dt-bindings/input/input.h>
  47 #include <dt-bindings/interrupt-controller/arm-gic.h>
  48 #include "imx7d-pinfunc.h"
  49 #include "skeleton.dtsi"
  50
  51 / {
  52         aliases {
  53                 gpio0 = &gpio1;
  54                 gpio1 = &gpio2;
  55                 gpio2 = &gpio3;
  56                 gpio3 = &gpio4;
  57                 gpio4 = &gpio5;
  58                 gpio5 = &gpio6;
  59                 gpio6 = &gpio7;
  60                 i2c0 = &i2c1;
  61                 i2c1 = &i2c2;
  62                 i2c2 = &i2c3;
  63                 i2c3 = &i2c4;
  64                 mmc0 = &usdhc1;
  65                 mmc1 = &usdhc2;
  66                 mmc2 = &usdhc3;
  67                 serial0 = &uart1;
  68                 serial1 = &uart2;
  69                 serial2 = &uart3;
  70                 serial3 = &uart4;
  71                 serial4 = &uart5;
  72                 serial5 = &uart6;
  73                 serial6 = &uart7;
  74                 spi0 = &ecspi1;
  75                 spi1 = &ecspi2;
  76                 spi2 = &ecspi3;
  77                 spi3 = &ecspi4;
  78         };
  79
  80         cpus {
  81                 #address-cells = <1>;
  82                 #size-cells = <0>;
  83
  84                 cpu0: cpu@0 {
  85                         compatible = "arm,cortex-a7";
  86                         device_type = "cpu";
  87                         reg = <0>;
  88                         operating-points = <
  89                                 /* KHz  uV */
  90                                 996000  1075000
  91                                 792000  975000
  92                         >;
  93                         clock-latency = <61036>; /* two CLK32 periods */
  94                         clocks = <&clks IMX7D_CLK_ARM>;
  95                 };
  96         };
  97
  98         intc: interrupt-controller@31001000 {
  99                 compatible = "arm,cortex-a7-gic";
 100                 #interrupt-cells = <3>;
 101                 interrupt-controller;
 102                 reg = <0x31001000 0x1000>,
 103                       <0x31002000 0x1000>,
 104                       <0x31004000 0x2000>,
 105                       <0x31006000 0x2000>;
 106         };
 107
 108         ckil: clock-cki {
 109                 compatible = "fixed-clock";
 110                 #clock-cells = <0>;
 111                 clock-frequency = <32768>;
 112                 clock-output-names = "ckil";
 113         };
 114
 115         osc: clock-osc {
 116                 compatible = "fixed-clock";
 117                 #clock-cells = <0>;
 118                 clock-frequency = <24000000>;
 119                 clock-output-names = "osc";
 120         };
 121
 122         timer {
 123                 compatible = "arm,armv7-timer";
 124                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 125                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 126                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 127                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 128                 interrupt-parent = <&intc>;
 129         };
 130
 131         etr@30086000 {
 132                 compatible = "arm,coresight-tmc", "arm,primecell";
 133                 reg = <0x30086000 0x1000>;
 134                 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 135                 clock-names = "apb_pclk";
 136
 137                 port {
 138                         etr_in_port: endpoint {
 139                                 slave-mode;
 140                                 remote-endpoint = <&replicator_out_port1>;
 141                         };
 142                 };
 143         };
 144
 145         tpiu@30087000 {
 146                 compatible = "arm,coresight-tpiu", "arm,primecell";
 147                 reg = <0x30087000 0x1000>;
 148                 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 149                 clock-names = "apb_pclk";
 150
 151                 port {
 152                         tpiu_in_port: endpoint {
 153                                 slave-mode;
 154                                 remote-endpoint = <&replicator_out_port1>;
 155                         };
 156                 };
 157         };
 158
 159         replicator {
 160                 /*
 161                  * non-configurable replicators don't show up on the
 162                  * AMBA bus.  As such no need to add "arm,primecell"
 163                  */
 164                 compatible = "arm,coresight-replicator";
 165
 166                 ports {
 167                         #address-cells = <1>;
 168                         #size-cells = <0>;
 169
 170                         /* replicator output ports */
 171                         port@0 {
 172                                 reg = <0>;
 173                                 replicator_out_port0: endpoint {
 174                                         remote-endpoint = <&tpiu_in_port>;
 175                                 };
 176                         };
 177
 178                         port@1 {
 179                                 reg = <1>;
 180                                 replicator_out_port1: endpoint {
 181                                         remote-endpoint = <&etr_in_port>;
 182                                 };
 183                         };
 184
 185                         /* replicator input port */
 186                         port@2 {
 187                                 reg = <0>;
 188                                 replicator_in_port0: endpoint {
 189                                         slave-mode;
 190                                         remote-endpoint = <&etf_out_port>;
 191                                 };
 192                         };
 193                 };
 194         };
 195
 196         etf@30084000 {
 197                 compatible = "arm,coresight-tmc", "arm,primecell";
 198                 reg = <0x30084000 0x1000>;
 199                 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 200                 clock-names = "apb_pclk";
 201
 202                 ports {
 203                         #address-cells = <1>;
 204                         #size-cells = <0>;
 205
 206                         port@0 {
 207                                 reg = <0>;
 208                                 etf_in_port: endpoint {
 209                                         slave-mode;
 210                                         remote-endpoint = <&hugo_funnel_out_port0>;
 211                                 };
 212                         };
 213
 214                         port@1 {
 215                                 reg = <0>;
 216                                 etf_out_port: endpoint {
 217                                         remote-endpoint = <&replicator_in_port0>;
 218                                 };
 219                         };
 220                 };
 221         };
 222
 223         funnel@30083000 {
 224                 compatible = "arm,coresight-funnel", "arm,primecell";
 225                 reg = <0x30083000 0x1000>;
 226                 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 227                 clock-names = "apb_pclk";
 228
 229                 ports {
 230                         #address-cells = <1>;
 231                         #size-cells = <0>;
 232
 233                         /* funnel input ports */
 234                         port@0 {
 235                                 reg = <0>;
 236                                 hugo_funnel_in_port0: endpoint {
 237                                         slave-mode;
 238                                         remote-endpoint = <&ca_funnel_out_port0>;
 239                                 };
 240                         };
 241
 242                         port@1 {
 243                                 reg = <1>;
 244                                 hugo_funnel_in_port1: endpoint {
 245                                         slave-mode; /* M4 input */
 246                                 };
 247                         };
 248
 249                         port@2 {
 250                                 reg = <0>;
 251                                 hugo_funnel_out_port0: endpoint {
 252                                         remote-endpoint = <&etf_in_port>;
 253                                 };
 254                         };
 255
 256                         /* the other input ports are not connect to anything */
 257                 };
 258         };
 259
 260         funnel@30041000 {
 261                 compatible = "arm,coresight-funnel", "arm,primecell";
 262                 reg = <0x30041000 0x1000>;
 263                 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 264                 clock-names = "apb_pclk";
 265
 266                 ca_funnel_ports: ports {
 267                         #address-cells = <1>;
 268                         #size-cells = <0>;
 269
 270                         /* funnel input ports */
 271                         port@0 {
 272                                 reg = <0>;
 273                                 ca_funnel_in_port0: endpoint {
 274                                         slave-mode;
 275                                         remote-endpoint = <&etm0_out_port>;
 276                                 };
 277                         };
 278
 279                         /* funnel output port */
 280                         port@2 {
 281                                 reg = <0>;
 282                                 ca_funnel_out_port0: endpoint {
 283                                         remote-endpoint = <&hugo_funnel_in_port0>;
 284                                 };
 285                         };
 286
 287                         /* the other input ports are not connect to anything */
 288                 };
 289         };
 290
 291         etm@3007c000 {
 292                 compatible = "arm,coresight-etm3x", "arm,primecell";
 293                 reg = <0x3007c000 0x1000>;
 294                 cpu = <&cpu0>;
 295                 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
 296                 clock-names = "apb_pclk";
 297
 298                 port {
 299                         etm0_out_port: endpoint {
 300                                 remote-endpoint = <&ca_funnel_in_port0>;
 301                         };
 302                 };
 303         };
 304
 305         soc {
 306                 #address-cells = <1>;
 307                 #size-cells = <1>;
 308                 compatible = "simple-bus";
 309                 interrupt-parent = <&intc>;
 310                 ranges;
 311
 312                 aips1: aips-bus@30000000 {
 313                         compatible = "fsl,aips-bus", "simple-bus";
 314                         #address-cells = <1>;
 315                         #size-cells = <1>;
 316                         reg = <0x30000000 0x400000>;
 317                         ranges;
 318
 319                         gpio1: gpio@30200000 {
 320                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 321                                 reg = <0x30200000 0x10000>;
 322                                 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */
 323                                              <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; /* GPIO1_INT31_16 */
 324                                 gpio-controller;
 325                                 #gpio-cells = <2>;
 326                                 interrupt-controller;
 327                                 #interrupt-cells = <2>;
 328                         };
 329
 330                         gpio2: gpio@30210000 {
 331                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 332                                 reg = <0x30210000 0x10000>;
 333                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 334                                              <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 335                                 gpio-controller;
 336                                 #gpio-cells = <2>;
 337                                 interrupt-controller;
 338                                 #interrupt-cells = <2>;
 339                         };
 340
 341                         gpio3: gpio@30220000 {
 342                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 343                                 reg = <0x30220000 0x10000>;
 344                                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 345                                              <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 346                                 gpio-controller;
 347                                 #gpio-cells = <2>;
 348                                 interrupt-controller;
 349                                 #interrupt-cells = <2>;
 350                         };
 351
 352                         gpio4: gpio@30230000 {
 353                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 354                                 reg = <0x30230000 0x10000>;
 355                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 356                                              <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 357                                 gpio-controller;
 358                                 #gpio-cells = <2>;
 359                                 interrupt-controller;
 360                                 #interrupt-cells = <2>;
 361                         };
 362
 363                         gpio5: gpio@30240000 {
 364                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 365                                 reg = <0x30240000 0x10000>;
 366                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 367                                              <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 368                                 gpio-controller;
 369                                 #gpio-cells = <2>;
 370                                 interrupt-controller;
 371                                 #interrupt-cells = <2>;
 372                         };
 373
 374                         gpio6: gpio@30250000 {
 375                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 376                                 reg = <0x30250000 0x10000>;
 377                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 378                                              <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 379                                 gpio-controller;
 380                                 #gpio-cells = <2>;
 381                                 interrupt-controller;
 382                                 #interrupt-cells = <2>;
 383                         };
 384
 385                         gpio7: gpio@30260000 {
 386                                 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
 387                                 reg = <0x30260000 0x10000>;
 388                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
 389                                              <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 390                                 gpio-controller;
 391                                 #gpio-cells = <2>;
 392                                 interrupt-controller;
 393                                 #interrupt-cells = <2>;
 394                         };
 395
 396                         wdog1: wdog@30280000 {
 397                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 398                                 reg = <0x30280000 0x10000>;
 399                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 400                                 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
 401                         };
 402
 403                         wdog2: wdog@30290000 {
 404                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 405                                 reg = <0x30290000 0x10000>;
 406                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 407                                 clocks = <&clks IMX7D_WDOG2_ROOT_CLK>;
 408                                 status = "disabled";
 409                         };
 410
 411                         wdog3: wdog@302a0000 {
 412                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 413                                 reg = <0x302a0000 0x10000>;
 414                                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 415                                 clocks = <&clks IMX7D_WDOG3_ROOT_CLK>;
 416                                 status = "disabled";
 417                         };
 418
 419                         wdog4: wdog@302b0000 {
 420                                 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 421                                 reg = <0x302b0000 0x10000>;
 422                                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 423                                 clocks = <&clks IMX7D_WDOG4_ROOT_CLK>;
 424                                 status = "disabled";
 425                         };
 426
 427                         iomuxc_lpsr: iomuxc-lpsr@302c0000 {
 428                                 compatible = "fsl,imx7d-iomuxc-lpsr";
 429                                 reg = <0x302c0000 0x10000>;
 430                                 fsl,input-sel = <&iomuxc>;
 431                         };
 432
 433                         gpt1: gpt@302d0000 {
 434                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 435                                 reg = <0x302d0000 0x10000>;
 436                                 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 437                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 438                                          <&clks IMX7D_GPT1_ROOT_CLK>;
 439                                 clock-names = "ipg", "per";
 440                         };
 441
 442                         gpt2: gpt@302e0000 {
 443                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 444                                 reg = <0x302e0000 0x10000>;
 445                                 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
 446                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 447                                          <&clks IMX7D_GPT2_ROOT_CLK>;
 448                                 clock-names = "ipg", "per";
 449                                 status = "disabled";
 450                         };
 451
 452                         gpt3: gpt@302f0000 {
 453                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 454                                 reg = <0x302f0000 0x10000>;
 455                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 456                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 457                                          <&clks IMX7D_GPT3_ROOT_CLK>;
 458                                 clock-names = "ipg", "per";
 459                                 status = "disabled";
 460                         };
 461
 462                         gpt4: gpt@30300000 {
 463                                 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
 464                                 reg = <0x30300000 0x10000>;
 465                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 466                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 467                                          <&clks IMX7D_GPT4_ROOT_CLK>;
 468                                 clock-names = "ipg", "per";
 469                                 status = "disabled";
 470                         };
 471
 472                         iomuxc: iomuxc@30330000 {
 473                                 compatible = "fsl,imx7d-iomuxc";
 474                                 reg = <0x30330000 0x10000>;
 475                         };
 476
 477                         gpr: iomuxc-gpr@30340000 {
 478                                 compatible = "fsl,imx7d-iomuxc-gpr", "syscon";
 479                                 reg = <0x30340000 0x10000>;
 480                         };
 481
 482                         ocotp: ocotp-ctrl@30350000 {
 483                                 compatible = "syscon";
 484                                 reg = <0x30350000 0x10000>;
 485                                 clocks = <&clks IMX7D_CLK_DUMMY>;
 486                                 status = "disabled";
 487                         };
 488
 489                         anatop: anatop@30360000 {
 490                                 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
 491                                         "syscon", "simple-bus";
 492                                 reg = <0x30360000 0x10000>;
 493                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 494                                         <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 495
 496                                 reg_1p0d: regulator-vdd1p0d {
 497                                         compatible = "fsl,anatop-regulator";
 498                                         regulator-name = "vdd1p0d";
 499                                         regulator-min-microvolt = <800000>;
 500                                         regulator-max-microvolt = <1200000>;
 501                                         anatop-reg-offset = <0x210>;
 502                                         anatop-vol-bit-shift = <8>;
 503                                         anatop-vol-bit-width = <5>;
 504                                         anatop-min-bit-val = <8>;
 505                                         anatop-min-voltage = <800000>;
 506                                         anatop-max-voltage = <1200000>;
 507                                         anatop-enable-bit = <31>;
 508                                 };
 509                         };
 510
 511                         snvs: snvs@30370000 {
 512                                 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
 513                                 reg = <0x30370000 0x10000>;
 514
 515                                 snvs_rtc: snvs-rtc-lp {
 516                                         compatible = "fsl,sec-v4.0-mon-rtc-lp";
 517                                         regmap = <&snvs>;
 518                                         offset = <0x34>;
 519                                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 520                                                      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 521                                 };
 522
 523                                 snvs_poweroff: snvs-poweroff {
 524                                         compatible = "syscon-poweroff";
 525                                         regmap = <&snvs>;
 526                                         offset = <0x38>;
 527                                         mask = <0x60>;
 528                                 };
 529
 530                                 snvs_pwrkey: snvs-powerkey {
 531                                         compatible = "fsl,sec-v4.0-pwrkey";
 532                                         regmap = <&snvs>;
 533                                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 534                                         linux,keycode = <KEY_POWER>;
 535                                         wakeup-source;
 536                                 };
 537                         };
 538
 539                         clks: ccm@30380000 {
 540                                 compatible = "fsl,imx7d-ccm";
 541                                 reg = <0x30380000 0x10000>;
 542                                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 543                                              <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 544                                 #clock-cells = <1>;
 545                                 clocks = <&ckil>, <&osc>;
 546                                 clock-names = "ckil", "osc";
 547                         };
 548
 549                         src: src@30390000 {
 550                                 compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon";
 551                                 reg = <0x30390000 0x10000>;
 552                                 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
 553                                 #reset-cells = <1>;
 554                         };
 555                 };
 556
 557                 aips2: aips-bus@30400000 {
 558                         compatible = "fsl,aips-bus", "simple-bus";
 559                         #address-cells = <1>;
 560                         #size-cells = <1>;
 561                         reg = <0x30400000 0x400000>;
 562                         ranges;
 563
 564                         adc1: adc@30610000 {
 565                                 compatible = "fsl,imx7d-adc";
 566                                 reg = <0x30610000 0x10000>;
 567                                 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 568                                 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
 569                                 clock-names = "adc";
 570                                 status = "disabled";
 571                         };
 572
 573                         adc2: adc@30620000 {
 574                                 compatible = "fsl,imx7d-adc";
 575                                 reg = <0x30620000 0x10000>;
 576                                 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 577                                 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
 578                                 clock-names = "adc";
 579                                 status = "disabled";
 580                         };
 581
 582                         ecspi4: ecspi@30630000 {
 583                                 #address-cells = <1>;
 584                                 #size-cells = <0>;
 585                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 586                                 reg = <0x30630000 0x10000>;
 587                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 588                                 clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
 589                                         <&clks IMX7D_ECSPI4_ROOT_CLK>;
 590                                 clock-names = "ipg", "per";
 591                                 status = "disabled";
 592                         };
 593
 594                         pwm1: pwm@30660000 {
 595                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 596                                 reg = <0x30660000 0x10000>;
 597                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 598                                 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
 599                                          <&clks IMX7D_PWM1_ROOT_CLK>;
 600                                 clock-names = "ipg", "per";
 601                                 #pwm-cells = <2>;
 602                                 status = "disabled";
 603                         };
 604
 605                         pwm2: pwm@30670000 {
 606                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 607                                 reg = <0x30670000 0x10000>;
 608                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 609                                 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
 610                                          <&clks IMX7D_PWM2_ROOT_CLK>;
 611                                 clock-names = "ipg", "per";
 612                                 #pwm-cells = <2>;
 613                                 status = "disabled";
 614                         };
 615
 616                         pwm3: pwm@30680000 {
 617                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 618                                 reg = <0x30680000 0x10000>;
 619                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 620                                 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
 621                                          <&clks IMX7D_PWM3_ROOT_CLK>;
 622                                 clock-names = "ipg", "per";
 623                                 #pwm-cells = <2>;
 624                                 status = "disabled";
 625                         };
 626
 627                         pwm4: pwm@30690000 {
 628                                 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 629                                 reg = <0x30690000 0x10000>;
 630                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 631                                 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
 632                                          <&clks IMX7D_PWM4_ROOT_CLK>;
 633                                 clock-names = "ipg", "per";
 634                                 #pwm-cells = <2>;
 635                                 status = "disabled";
 636                         };
 637
 638                         lcdif: lcdif@30730000 {
 639                                 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
 640                                 reg = <0x30730000 0x10000>;
 641                                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 642                                 clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
 643                                         <&clks IMX7D_CLK_DUMMY>,
 644                                         <&clks IMX7D_CLK_DUMMY>;
 645                                 clock-names = "pix", "axi", "disp_axi";
 646                                 status = "disabled";
 647                         };
 648                 };
 649
 650                 aips3: aips-bus@30800000 {
 651                         compatible = "fsl,aips-bus", "simple-bus";
 652                         #address-cells = <1>;
 653                         #size-cells = <1>;
 654                         reg = <0x30800000 0x400000>;
 655                         ranges;
 656
 657                         ecspi1: ecspi@30820000 {
 658                                 #address-cells = <1>;
 659                                 #size-cells = <0>;
 660                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 661                                 reg = <0x30820000 0x10000>;
 662                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 663                                 clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
 664                                         <&clks IMX7D_ECSPI1_ROOT_CLK>;
 665                                 clock-names = "ipg", "per";
 666                                 status = "disabled";
 667                         };
 668
 669                         ecspi2: ecspi@30830000 {
 670                                 #address-cells = <1>;
 671                                 #size-cells = <0>;
 672                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 673                                 reg = <0x30830000 0x10000>;
 674                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 675                                 clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
 676                                         <&clks IMX7D_ECSPI2_ROOT_CLK>;
 677                                 clock-names = "ipg", "per";
 678                                 status = "disabled";
 679                         };
 680
 681                         ecspi3: ecspi@30840000 {
 682                                 #address-cells = <1>;
 683                                 #size-cells = <0>;
 684                                 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
 685                                 reg = <0x30840000 0x10000>;
 686                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 687                                 clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
 688                                         <&clks IMX7D_ECSPI3_ROOT_CLK>;
 689                                 clock-names = "ipg", "per";
 690                                 status = "disabled";
 691                         };
 692
 693                         uart1: serial@30860000 {
 694                                 compatible = "fsl,imx7d-uart",
 695                                              "fsl,imx6q-uart";
 696                                 reg = <0x30860000 0x10000>;
 697                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 698                                 clocks = <&clks IMX7D_UART1_ROOT_CLK>,
 699                                         <&clks IMX7D_UART1_ROOT_CLK>;
 700                                 clock-names = "ipg", "per";
 701                                 status = "disabled";
 702                         };
 703
 704                         uart2: serial@30890000 {
 705                                 compatible = "fsl,imx7d-uart",
 706                                              "fsl,imx6q-uart";
 707                                 reg = <0x30890000 0x10000>;
 708                                 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 709                                 clocks = <&clks IMX7D_UART2_ROOT_CLK>,
 710                                         <&clks IMX7D_UART2_ROOT_CLK>;
 711                                 clock-names = "ipg", "per";
 712                                 status = "disabled";
 713                         };
 714
 715                         uart3: serial@30880000 {
 716                                 compatible = "fsl,imx7d-uart",
 717                                              "fsl,imx6q-uart";
 718                                 reg = <0x30880000 0x10000>;
 719                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 720                                 clocks = <&clks IMX7D_UART3_ROOT_CLK>,
 721                                         <&clks IMX7D_UART3_ROOT_CLK>;
 722                                 clock-names = "ipg", "per";
 723                                 status = "disabled";
 724                         };
 725
 726                         flexcan1: can@30a00000 {
 727                                 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
 728                                 reg = <0x30a00000 0x10000>;
 729                                 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 730                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 731                                         <&clks IMX7D_CAN1_ROOT_CLK>;
 732                                 clock-names = "ipg", "per";
 733                                 status = "disabled";
 734                         };
 735
 736                         flexcan2: can@30a10000 {
 737                                 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
 738                                 reg = <0x30a10000 0x10000>;
 739                                 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 740                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 741                                         <&clks IMX7D_CAN2_ROOT_CLK>;
 742                                 clock-names = "ipg", "per";
 743                                 status = "disabled";
 744                         };
 745
 746                         i2c1: i2c@30a20000 {
 747                                 #address-cells = <1>;
 748                                 #size-cells = <0>;
 749                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 750                                 reg = <0x30a20000 0x10000>;
 751                                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 752                                 clocks = <&clks IMX7D_I2C1_ROOT_CLK>;
 753                                 status = "disabled";
 754                         };
 755
 756                         i2c2: i2c@30a30000 {
 757                                 #address-cells = <1>;
 758                                 #size-cells = <0>;
 759                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 760                                 reg = <0x30a30000 0x10000>;
 761                                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 762                                 clocks = <&clks IMX7D_I2C2_ROOT_CLK>;
 763                                 status = "disabled";
 764                         };
 765
 766                         i2c3: i2c@30a40000 {
 767                                 #address-cells = <1>;
 768                                 #size-cells = <0>;
 769                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 770                                 reg = <0x30a40000 0x10000>;
 771                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 772                                 clocks = <&clks IMX7D_I2C3_ROOT_CLK>;
 773                                 status = "disabled";
 774                         };
 775
 776                         i2c4: i2c@30a50000 {
 777                                 #address-cells = <1>;
 778                                 #size-cells = <0>;
 779                                 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
 780                                 reg = <0x30a50000 0x10000>;
 781                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 782                                 clocks = <&clks IMX7D_I2C4_ROOT_CLK>;
 783                                 status = "disabled";
 784                         };
 785
 786                         uart4: serial@30a60000 {
 787                                 compatible = "fsl,imx7d-uart",
 788                                              "fsl,imx6q-uart";
 789                                 reg = <0x30a60000 0x10000>;
 790                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 791                                 clocks = <&clks IMX7D_UART4_ROOT_CLK>,
 792                                         <&clks IMX7D_UART4_ROOT_CLK>;
 793                                 clock-names = "ipg", "per";
 794                                 status = "disabled";
 795                         };
 796
 797                         uart5: serial@30a70000 {
 798                                 compatible = "fsl,imx7d-uart",
 799                                              "fsl,imx6q-uart";
 800                                 reg = <0x30a70000 0x10000>;
 801                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 802                                 clocks = <&clks IMX7D_UART5_ROOT_CLK>,
 803                                         <&clks IMX7D_UART5_ROOT_CLK>;
 804                                 clock-names = "ipg", "per";
 805                                 status = "disabled";
 806                         };
 807
 808                         uart6: serial@30a80000 {
 809                                 compatible = "fsl,imx7d-uart",
 810                                              "fsl,imx6q-uart";
 811                                 reg = <0x30a80000 0x10000>;
 812                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 813                                 clocks = <&clks IMX7D_UART6_ROOT_CLK>,
 814                                         <&clks IMX7D_UART6_ROOT_CLK>;
 815                                 clock-names = "ipg", "per";
 816                                 status = "disabled";
 817                         };
 818
 819                         uart7: serial@30a90000 {
 820                                 compatible = "fsl,imx7d-uart",
 821                                              "fsl,imx6q-uart";
 822                                 reg = <0x30a90000 0x10000>;
 823                                 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 824                                 clocks = <&clks IMX7D_UART7_ROOT_CLK>,
 825                                         <&clks IMX7D_UART7_ROOT_CLK>;
 826                                 clock-names = "ipg", "per";
 827                                 status = "disabled";
 828                         };
 829
 830                         usbotg1: usb@30b10000 {
 831                                 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
 832                                 reg = <0x30b10000 0x200>;
 833                                 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 834                                 clocks = <&clks IMX7D_USB_CTRL_CLK>;
 835                                 fsl,usbphy = <&usbphynop1>;
 836                                 fsl,usbmisc = <&usbmisc1 0>;
 837                                 phy-clkgate-delay-us = <400>;
 838                                 status = "disabled";
 839                         };
 840
 841                         usbh: usb@30b30000 {
 842                                 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
 843                                 reg = <0x30b30000 0x200>;
 844                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 845                                 clocks = <&clks IMX7D_USB_CTRL_CLK>;
 846                                 fsl,usbphy = <&usbphynop3>;
 847                                 fsl,usbmisc = <&usbmisc3 0>;
 848                                 phy_type = "hsic";
 849                                 dr_mode = "host";
 850                                 phy-clkgate-delay-us = <400>;
 851                                 status = "disabled";
 852                         };
 853
 854                         usbmisc1: usbmisc@30b10200 {
 855                                 #index-cells = <1>;
 856                                 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
 857                                 reg = <0x30b10200 0x200>;
 858                         };
 859
 860                         usbmisc3: usbmisc@30b30200 {
 861                                 #index-cells = <1>;
 862                                 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
 863                                 reg = <0x30b30200 0x200>;
 864                         };
 865
 866                         usbphynop1: usbphynop1 {
 867                                 compatible = "usb-nop-xceiv";
 868                                 clocks = <&clks IMX7D_USB_PHY1_CLK>;
 869                                 clock-names = "main_clk";
 870                         };
 871
 872                         usbphynop3: usbphynop3 {
 873                                 compatible = "usb-nop-xceiv";
 874                                 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
 875                                 clock-names = "main_clk";
 876                         };
 877
 878                         usdhc1: usdhc@30b40000 {
 879                                 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
 880                                 reg = <0x30b40000 0x10000>;
 881                                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 882                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 883                                         <&clks IMX7D_CLK_DUMMY>,
 884                                         <&clks IMX7D_USDHC1_ROOT_CLK>;
 885                                 clock-names = "ipg", "ahb", "per";
 886                                 bus-width = <4>;
 887                                 status = "disabled";
 888                         };
 889
 890                         usdhc2: usdhc@30b50000 {
 891                                 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
 892                                 reg = <0x30b50000 0x10000>;
 893                                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 894                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 895                                         <&clks IMX7D_CLK_DUMMY>,
 896                                         <&clks IMX7D_USDHC2_ROOT_CLK>;
 897                                 clock-names = "ipg", "ahb", "per";
 898                                 bus-width = <4>;
 899                                 status = "disabled";
 900                         };
 901
 902                         usdhc3: usdhc@30b60000 {
 903                                 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
 904                                 reg = <0x30b60000 0x10000>;
 905                                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 906                                 clocks = <&clks IMX7D_CLK_DUMMY>,
 907                                         <&clks IMX7D_CLK_DUMMY>,
 908                                         <&clks IMX7D_USDHC3_ROOT_CLK>;
 909                                 clock-names = "ipg", "ahb", "per";
 910                                 bus-width = <4>;
 911                                 status = "disabled";
 912                         };
 913
 914                         fec1: ethernet@30be0000 {
 915                                 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
 916                                 reg = <0x30be0000 0x10000>;
 917                                 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
 918                                         <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
 919                                         <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 920                                 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
 921                                         <&clks IMX7D_ENET_AXI_ROOT_CLK>,
 922                                         <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
 923                                         <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
 924                                         <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
 925                                 clock-names = "ipg", "ahb", "ptp",
 926                                         "enet_clk_ref", "enet_out";
 927                                 fsl,num-tx-queues=<3>;
 928                                 fsl,num-rx-queues=<3>;
 929                                 status = "disabled";
 930                         };
 931                 };
 932         };
 933 };