2 * Device Tree Source for the Blanche board
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 * Copyright (C) 2016 Cogent Embedded, Inc.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
13 #include "r8a7792.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
19 compatible = "renesas,blanche", "renesas,r8a7792";
27 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
28 stdout-path = "serial0:115200n8";
32 device_type = "memory";
33 reg = <0 0x40000000 0 0x40000000>;
36 d3_3v: regulator-3v3 {
37 compatible = "regulator-fixed";
38 regulator-name = "D3.3V";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
46 compatible = "smsc,lan89218", "smsc,lan9115";
47 reg = <0 0x18000000 0 0x100>;
49 interrupt-parent = <&irqc>;
50 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
53 vddvario-supply = <&d3_3v>;
54 vdd33a-supply = <&d3_3v>;
56 pinctrl-0 = <&lan89218_pins>;
57 pinctrl-names = "default";
61 compatible = "gpio-keys";
67 debounce-interval = <20>;
68 gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
74 debounce-interval = <20>;
75 gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
81 debounce-interval = <20>;
82 gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
88 debounce-interval = <20>;
89 gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
95 debounce-interval = <20>;
96 gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
102 debounce-interval = <20>;
103 gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
107 vcc_sdhi0: regulator-vcc-sdhi0 {
108 compatible = "regulator-fixed";
110 regulator-name = "SDHI0 Vcc";
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
114 gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
120 clock-frequency = <20000000>;
124 clock-frequency = <48000000>;
129 groups = "scif0_data";
134 groups = "scif3_data";
138 lan89218_pins: lan89218 {
140 groups = "intc_irq0";
144 groups = "lbsc_ex_cs0";
150 groups = "can0_data", "can_clk";
155 groups = "sdhi0_data4", "sdhi0_ctrl";
161 pinctrl-0 = <&scif0_pins>;
162 pinctrl-names = "default";
168 pinctrl-0 = <&scif3_pins>;
169 pinctrl-names = "default";
175 pinctrl-0 = <&can0_pins>;
176 pinctrl-names = "default";
182 pinctrl-0 = <&sdhi0_pins>;
183 pinctrl-names = "default";
185 vmmc-supply = <&vcc_sdhi0>;
186 cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;