arch/arm/boot/dts/r8a7794-silk.dts

   1 /*
   2  * Device Tree Source for the SILK board
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  * Copyright (C) 2014-2015 Renesas Solutions Corp.
   6  * Copyright (C) 2014-2015 Cogent Embedded, Inc.
   7  *
   8  * This file is licensed under the terms of the GNU General Public License
   9  * version 2.  This program is licensed "as is" without any warranty of any
  10  * kind, whether express or implied.
  11  */
  12
  13 /dts-v1/;
  14 #include "r8a7794.dtsi"
  15 #include <dt-bindings/gpio/gpio.h>
  16
  17 / {
  18         model = "SILK";
  19         compatible = "renesas,silk", "renesas,r8a7794";
  20
  21         aliases {
  22                 serial0 = &scif2;
  23         };
  24
  25         chosen {
  26                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@40000000 {
  31                 device_type = "memory";
  32                 reg = <0 0x40000000 0 0x40000000>;
  33         };
  34
  35         d3_3v: regulator@0 {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "D3.3V";
  38                 regulator-min-microvolt = <3300000>;
  39                 regulator-max-microvolt = <3300000>;
  40                 regulator-boot-on;
  41                 regulator-always-on;
  42         };
  43
  44         vcc_sdhi1: regulator@3 {
  45                 compatible = "regulator-fixed";
  46
  47                 regulator-name = "SDHI1 Vcc";
  48                 regulator-min-microvolt = <3300000>;
  49                 regulator-max-microvolt = <3300000>;
  50
  51                 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
  52                 enable-active-high;
  53         };
  54
  55         vccq_sdhi1: regulator@4 {
  56                 compatible = "regulator-gpio";
  57
  58                 regulator-name = "SDHI1 VccQ";
  59                 regulator-min-microvolt = <1800000>;
  60                 regulator-max-microvolt = <3300000>;
  61
  62                 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  63                 gpios-states = <1>;
  64                 states = <3300000 1
  65                           1800000 0>;
  66         };
  67
  68         vga-encoder {
  69                 compatible = "adi,adv7123";
  70
  71                 ports {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74
  75                         port@0 {
  76                                 reg = <0>;
  77                                 adv7123_in: endpoint {
  78                                         remote-endpoint = <&du_out_rgb1>;
  79                                 };
  80                         };
  81                         port@1 {
  82                                 reg = <1>;
  83                                 adv7123_out: endpoint {
  84                                         remote-endpoint = <&vga_in>;
  85                                 };
  86                         };
  87                 };
  88         };
  89
  90         hdmi-out {
  91                 compatible = "hdmi-connector";
  92                 type = "a";
  93
  94                 port {
  95                         hdmi_con: endpoint {
  96                                 remote-endpoint = <&adv7511_out>;
  97                         };
  98                 };
  99         };
 100
 101         vga {
 102                 compatible = "vga-connector";
 103
 104                 port {
 105                         vga_in: endpoint {
 106                                 remote-endpoint = <&adv7123_out>;
 107                         };
 108                 };
 109         };
 110
 111         x2_clk: x2-clock {
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <148500000>;
 115         };
 116
 117         x3_clk: x3-clock {
 118                 compatible = "fixed-clock";
 119                 #clock-cells = <0>;
 120                 clock-frequency = <74250000>;
 121         };
 122 };
 123
 124 &extal_clk {
 125         clock-frequency = <20000000>;
 126 };
 127
 128 &pfc {
 129         scif2_pins: serial2 {
 130                 renesas,groups = "scif2_data";
 131                 renesas,function = "scif2";
 132         };
 133
 134         ether_pins: ether {
 135                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
 136                 renesas,function = "eth";
 137         };
 138
 139         phy1_pins: phy1 {
 140                 renesas,groups = "intc_irq8";
 141                 renesas,function = "intc";
 142         };
 143
 144         i2c1_pins: i2c1 {
 145                 renesas,groups = "i2c1";
 146                 renesas,function = "i2c1";
 147         };
 148
 149         mmcif0_pins: mmcif0 {
 150                 renesas,groups = "mmc_data8", "mmc_ctrl";
 151                 renesas,function = "mmc";
 152         };
 153
 154         sdhi1_pins: sd1 {
 155                 renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
 156                 renesas,function = "sdhi1";
 157         };
 158
 159         qspi_pins: spi0 {
 160                 renesas,groups = "qspi_ctrl", "qspi_data4";
 161                 renesas,function = "qspi";
 162         };
 163
 164         vin0_pins: vin0 {
 165                 renesas,groups = "vin0_data8", "vin0_clk";
 166                 renesas,function = "vin0";
 167         };
 168
 169         usb0_pins: usb0 {
 170                 renesas,groups = "usb0";
 171                 renesas,function = "usb0";
 172         };
 173
 174         usb1_pins: usb1 {
 175                 renesas,groups = "usb1";
 176                 renesas,function = "usb1";
 177         };
 178 };
 179
 180 &scif2 {
 181         pinctrl-0 = <&scif2_pins>;
 182         pinctrl-names = "default";
 183
 184         status = "okay";
 185 };
 186
 187 &ether {
 188         pinctrl-0 = <&ether_pins &phy1_pins>;
 189         pinctrl-names = "default";
 190
 191         phy-handle = <&phy1>;
 192         renesas,ether-link-active-low;
 193         status = "okay";
 194
 195         phy1: ethernet-phy@1 {
 196                 reg = <1>;
 197                 interrupt-parent = <&irqc0>;
 198                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 199                 micrel,led-mode = <1>;
 200         };
 201 };
 202
 203 &i2c1 {
 204         pinctrl-0 = <&i2c1_pins>;
 205         pinctrl-names = "default";
 206
 207         status = "okay";
 208         clock-frequency = <400000>;
 209
 210         composite-in@20 {
 211                 compatible = "adi,adv7180";
 212                 reg = <0x20>;
 213                 remote = <&vin0>;
 214
 215                 port {
 216                         adv7180: endpoint {
 217                                 bus-width = <8>;
 218                                 remote-endpoint = <&vin0ep>;
 219                         };
 220                 };
 221         };
 222
 223         hdmi@39 {
 224                 compatible = "adi,adv7511w";
 225                 reg = <0x39>;
 226                 interrupt-parent = <&gpio5>;
 227                 interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
 228
 229                 adi,input-depth = <8>;
 230                 adi,input-colorspace = "rgb";
 231                 adi,input-clock = "1x";
 232                 adi,input-style = <1>;
 233                 adi,input-justification = "evenly";
 234
 235                 ports {
 236                         #address-cells = <1>;
 237                         #size-cells = <0>;
 238
 239                         port@0 {
 240                                 reg = <0>;
 241                                 adv7511_in: endpoint {
 242                                         remote-endpoint = <&du_out_rgb0>;
 243                                 };
 244                         };
 245
 246                         port@1 {
 247                                 reg = <1>;
 248                                 adv7511_out: endpoint {
 249                                         remote-endpoint = <&hdmi_con>;
 250                                 };
 251                         };
 252                 };
 253         };
 254 };
 255
 256 &mmcif0 {
 257         pinctrl-0 = <&mmcif0_pins>;
 258         pinctrl-names = "default";
 259
 260         vmmc-supply = <&d3_3v>;
 261         vqmmc-supply = <&d3_3v>;
 262         bus-width = <8>;
 263         non-removable;
 264         status = "okay";
 265 };
 266
 267 &sdhi1 {
 268         pinctrl-0 = <&sdhi1_pins>;
 269         pinctrl-names = "default";
 270
 271         vmmc-supply = <&vcc_sdhi1>;
 272         vqmmc-supply = <&vccq_sdhi1>;
 273         cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
 274         status = "okay";
 275 };
 276
 277 &qspi {
 278         pinctrl-0 = <&qspi_pins>;
 279         pinctrl-names = "default";
 280
 281         status = "okay";
 282
 283         flash@0 {
 284                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 285                 reg = <0>;
 286                 spi-max-frequency = <30000000>;
 287                 spi-tx-bus-width = <4>;
 288                 spi-rx-bus-width = <4>;
 289                 spi-cpol;
 290                 spi-cpha;
 291                 m25p,fast-read;
 292
 293                 partitions {
 294                         compatible = "fixed-partitions";
 295                         #address-cells = <1>;
 296                         #size-cells = <1>;
 297
 298                         partition@0 {
 299                                 label = "loader";
 300                                 reg = <0x00000000 0x00040000>;
 301                                 read-only;
 302                         };
 303                         partition@40000 {
 304                                 label = "user";
 305                                 reg = <0x00040000 0x00400000>;
 306                                 read-only;
 307                         };
 308                         partition@440000 {
 309                                 label = "flash";
 310                                 reg = <0x00440000 0x03bc0000>;
 311                         };
 312                 };
 313         };
 314 };
 315
 316 /* composite video input */
 317 &vin0 {
 318         status = "okay";
 319         pinctrl-0 = <&vin0_pins>;
 320         pinctrl-names = "default";
 321
 322         port {
 323                 #address-cells = <1>;
 324                 #size-cells = <0>;
 325
 326                 vin0ep: endpoint {
 327                         remote-endpoint = <&adv7180>;
 328                         bus-width = <8>;
 329                 };
 330         };
 331 };
 332
 333 &pci0 {
 334         status = "okay";
 335         pinctrl-0 = <&usb0_pins>;
 336         pinctrl-names = "default";
 337 };
 338
 339 &pci1 {
 340         status = "okay";
 341         pinctrl-0 = <&usb1_pins>;
 342         pinctrl-names = "default";
 343 };
 344
 345 &usbphy {
 346         status = "okay";
 347 };
 348
 349 &du {
 350         status = "okay";
 351
 352         clocks = <&mstp7_clks R8A7794_CLK_DU0>,
 353                  <&mstp7_clks R8A7794_CLK_DU0>,
 354                  <&x2_clk>, <&x3_clk>;
 355         clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
 356
 357         ports {
 358                 port@0 {
 359                         endpoint {
 360                                 remote-endpoint = <&adv7511_in>;
 361                         };
 362                 };
 363                 port@1 {
 364                         endpoint {
 365                                 remote-endpoint = <&adv7123_in>;
 366                         };
 367                 };
 368         };
 369 };