2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
5 #include <dt-bindings/gpio/gpio.h>
6 #include "skeleton.dtsi"
13 reg = <0x00000000 0x04000000>,
14 <0x08000000 0x04000000>;
18 compatible = "arm,l210-cache";
19 reg = <0x10210000 0x1000>;
20 interrupt-parent = <&vica>;
24 cache-size = <131072>;
26 cache-line-size = <32>;
27 /* At full speed latency must be >=2 */
28 arm,tag-latency = <8>;
29 arm,data-latency = <8 8>;
30 arm,dirty-latency = <8>;
34 /* Nomadik system timer */
35 compatible = "st,nomadik-mtu";
36 reg = <0x101e2000 0x1000>;
37 interrupt-parent = <&vica>;
39 clocks = <&timclk>, <&pclk>;
40 clock-names = "timclk", "apb_pclk";
45 reg = <0x101e3000 0x1000>;
46 interrupt-parent = <&vica>;
48 clocks = <&timclk>, <&pclk>;
49 clock-names = "timclk", "apb_pclk";
52 gpio0: gpio@101e4000 {
53 compatible = "st,nomadik-gpio";
54 reg = <0x101e4000 0x80>;
55 interrupt-parent = <&vica>;
58 #interrupt-cells = <2>;
62 gpio-ranges = <&pinctrl 0 0 32>;
66 gpio1: gpio@101e5000 {
67 compatible = "st,nomadik-gpio";
68 reg = <0x101e5000 0x80>;
69 interrupt-parent = <&vica>;
72 #interrupt-cells = <2>;
76 gpio-ranges = <&pinctrl 0 32 32>;
80 gpio2: gpio@101e6000 {
81 compatible = "st,nomadik-gpio";
82 reg = <0x101e6000 0x80>;
83 interrupt-parent = <&vica>;
86 #interrupt-cells = <2>;
90 gpio-ranges = <&pinctrl 0 64 32>;
94 gpio3: gpio@101e7000 {
95 compatible = "st,nomadik-gpio";
96 reg = <0x101e7000 0x80>;
98 interrupt-parent = <&vica>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
105 gpio-ranges = <&pinctrl 0 96 28>;
110 compatible = "stericsson,stn8815-pinctrl";
111 nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
112 /* Pin configurations */
114 uart1_default_mux: uart1_mux {
122 mmcsd_default_mux: mmcsd_mux {
125 groups = "mmcsd_a_1", "mmcsd_b_1";
128 mmcsd_default_mode: mmcsd_default {
131 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
132 * MCCMD, MCDAT3-0, MCMSFBCLK
134 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
135 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
136 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
142 i2c0_default_mux: i2c0_mux {
148 i2c0_default_mode: i2c0_default {
150 pins = "GPIO62_D3", "GPIO63_D2";
156 i2c1_default_mux: i2c1_mux {
162 i2c1_default_mode: i2c1_default {
164 pins = "GPIO53_L4", "GPIO54_L3";
171 /* Power Management Unit */
173 compatible = "stericsson,nomadik-pmu", "syscon";
174 reg = <0x101e0000 0x1000>;
178 compatible = "stericsson,nomadik-src";
179 reg = <0x101e0000 0x1000>;
182 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
183 * that is parent of TIMCLK, PLL1 and PLL2
187 compatible = "fixed-clock";
188 clock-frequency = <19200000>;
192 * The 2.4 MHz TIMCLK reference clock is active at
193 * boot time, this is actually the MXTALCLK @19.2 MHz
194 * divided by 8. This clock is used by the timers and
195 * watchdog. See page 105 ff.
197 timclk: timclk@2.4M {
199 compatible = "fixed-factor-clock";
205 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
208 compatible = "st,nomadik-pll-clock";
213 /* HCLK divides the PLL1 with 1,2,3 or 4 */
216 compatible = "st,nomadik-hclk-clock";
219 /* The PCLK domain uses HCLK right off */
222 compatible = "fixed-factor-clock";
228 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
231 compatible = "st,nomadik-pll-clock";
235 clk216: clk216@216M {
237 compatible = "fixed-factor-clock";
242 clk108: clk108@108M {
244 compatible = "fixed-factor-clock";
251 compatible = "fixed-factor-clock";
252 /* The data sheet does not say how this is derived */
259 compatible = "fixed-factor-clock";
260 /* The data sheet does not say how this is derived */
267 compatible = "fixed-factor-clock";
273 /* This apparently exists as well */
274 ulpiclk: ulpiclk@60M {
276 compatible = "fixed-clock";
277 clock-frequency = <60000000>;
281 * IP AMBA bus clocks, driving the bus side of the
282 * peripheral clocking, clock gates.
285 hclkdma0: hclkdma0@48M {
287 compatible = "st,nomadik-src-clock";
291 hclksmc: hclksmc@48M {
293 compatible = "st,nomadik-src-clock";
297 hclksdram: hclksdram@48M {
299 compatible = "st,nomadik-src-clock";
303 hclkdma1: hclkdma1@48M {
305 compatible = "st,nomadik-src-clock";
309 hclkclcd: hclkclcd@48M {
311 compatible = "st,nomadik-src-clock";
315 pclkirda: pclkirda@48M {
317 compatible = "st,nomadik-src-clock";
321 pclkssp: pclkssp@48M {
323 compatible = "st,nomadik-src-clock";
327 pclkuart0: pclkuart0@48M {
329 compatible = "st,nomadik-src-clock";
333 pclksdi: pclksdi@48M {
335 compatible = "st,nomadik-src-clock";
339 pclki2c0: pclki2c0@48M {
341 compatible = "st,nomadik-src-clock";
345 pclki2c1: pclki2c1@48M {
347 compatible = "st,nomadik-src-clock";
351 pclkuart1: pclkuart1@48M {
353 compatible = "st,nomadik-src-clock";
357 pclkmsp0: pclkmsp0@48M {
359 compatible = "st,nomadik-src-clock";
363 hclkusb: hclkusb@48M {
365 compatible = "st,nomadik-src-clock";
369 hclkdif: hclkdif@48M {
371 compatible = "st,nomadik-src-clock";
375 hclksaa: hclksaa@48M {
377 compatible = "st,nomadik-src-clock";
381 hclksva: hclksva@48M {
383 compatible = "st,nomadik-src-clock";
387 pclkhsi: pclkhsi@48M {
389 compatible = "st,nomadik-src-clock";
393 pclkxti: pclkxti@48M {
395 compatible = "st,nomadik-src-clock";
399 pclkuart2: pclkuart2@48M {
401 compatible = "st,nomadik-src-clock";
405 pclkmsp1: pclkmsp1@48M {
407 compatible = "st,nomadik-src-clock";
411 pclkmsp2: pclkmsp2@48M {
413 compatible = "st,nomadik-src-clock";
417 pclkowm: pclkowm@48M {
419 compatible = "st,nomadik-src-clock";
423 hclkhpi: hclkhpi@48M {
425 compatible = "st,nomadik-src-clock";
429 pclkske: pclkske@48M {
431 compatible = "st,nomadik-src-clock";
435 pclkhsem: pclkhsem@48M {
437 compatible = "st,nomadik-src-clock";
443 compatible = "st,nomadik-src-clock";
447 hclkhash: hclkhash@48M {
449 compatible = "st,nomadik-src-clock";
453 hclkcryp: hclkcryp@48M {
455 compatible = "st,nomadik-src-clock";
459 pclkmshc: pclkmshc@48M {
461 compatible = "st,nomadik-src-clock";
465 hclkusbm: hclkusbm@48M {
467 compatible = "st,nomadik-src-clock";
471 hclkrng: hclkrng@48M {
473 compatible = "st,nomadik-src-clock";
478 /* IP kernel clocks */
481 compatible = "st,nomadik-src-clock";
483 clocks = <&clk72 &clk48>;
485 irdaclk: irdaclk@48M {
487 compatible = "st,nomadik-src-clock";
491 sspiclk: sspiclk@48M {
493 compatible = "st,nomadik-src-clock";
497 uart0clk: uart0clk@48M {
499 compatible = "st,nomadik-src-clock";
504 /* Also called MCCLK in some documents */
506 compatible = "st,nomadik-src-clock";
510 i2c0clk: i2c0clk@48M {
512 compatible = "st,nomadik-src-clock";
516 i2c1clk: i2c1clk@48M {
518 compatible = "st,nomadik-src-clock";
522 uart1clk: uart1clk@48M {
524 compatible = "st,nomadik-src-clock";
528 mspclk0: mspclk0@48M {
530 compatible = "st,nomadik-src-clock";
536 compatible = "st,nomadik-src-clock";
538 clocks = <&clk48>; /* 48 MHz not ULPI */
542 compatible = "st,nomadik-src-clock";
546 ipi2cclk: ipi2cclk@48M {
548 compatible = "st,nomadik-src-clock";
550 clocks = <&clk48>; /* Guess */
552 ipbmcclk: ipbmcclk@48M {
554 compatible = "st,nomadik-src-clock";
556 clocks = <&clk48>; /* Guess */
558 hsiclkrx: hsiclkrx@216M {
560 compatible = "st,nomadik-src-clock";
564 hsiclktx: hsiclktx@108M {
566 compatible = "st,nomadik-src-clock";
570 uart2clk: uart2clk@48M {
572 compatible = "st,nomadik-src-clock";
576 mspclk1: mspclk1@48M {
578 compatible = "st,nomadik-src-clock";
582 mspclk2: mspclk2@48M {
584 compatible = "st,nomadik-src-clock";
590 compatible = "st,nomadik-src-clock";
592 clocks = <&clk48>; /* Guess */
596 compatible = "st,nomadik-src-clock";
598 clocks = <&clk48>; /* Guess */
602 compatible = "st,nomadik-src-clock";
604 clocks = <&clk48>; /* Guess */
606 pclkmsp3: pclkmsp3@48M {
608 compatible = "st,nomadik-src-clock";
612 mspclk3: mspclk3@48M {
614 compatible = "st,nomadik-src-clock";
618 mshcclk: mshcclk@48M {
620 compatible = "st,nomadik-src-clock";
622 clocks = <&clk48>; /* Guess */
624 usbmclk: usbmclk@48M {
626 compatible = "st,nomadik-src-clock";
628 /* Stated as "48 MHz not ULPI clock" */
631 rngcclk: rngcclk@48M {
633 compatible = "st,nomadik-src-clock";
635 clocks = <&clk48>; /* Guess */
639 /* A NAND flash of 128 MiB */
640 fsmc: flash@40000000 {
641 compatible = "stericsson,fsmc-nand";
642 #address-cells = <1>;
644 reg = <0x10100000 0x1000>, /* FSMC Register*/
645 <0x40000000 0x2000>, /* NAND Base DATA */
646 <0x41000000 0x2000>, /* NAND Base ADDR */
647 <0x40800000 0x2000>; /* NAND Base CMD */
648 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
651 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
654 label = "X-Loader(NAND)";
658 label = "MemInit(NAND)";
659 reg = <0x40000 0x40000>;
662 label = "BootLoader(NAND)";
663 reg = <0x80000 0x200000>;
666 label = "Kernel zImage(NAND)";
667 reg = <0x280000 0x300000>;
670 label = "Root Filesystem(NAND)";
671 reg = <0x580000 0x1600000>;
674 label = "User Filesystem(NAND)";
675 reg = <0x1b80000 0x6480000>;
679 /* I2C0 connected to the STw4811 power management chip */
681 compatible = "st,nomadik-i2c", "arm,primecell";
682 reg = <0x101f8000 0x1000>;
683 interrupt-parent = <&vica>;
685 clock-frequency = <100000>;
686 #address-cells = <1>;
688 clocks = <&i2c0clk>, <&pclki2c0>;
689 clock-names = "mclk", "apb_pclk";
690 pinctrl-names = "default";
691 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
694 compatible = "st,stw4811";
696 vmmc_regulator: vmmc {
697 compatible = "st,stw481x-vmmc";
698 regulator-name = "VMMC";
699 regulator-min-microvolt = <1800000>;
700 regulator-max-microvolt = <3300000>;
705 /* I2C1 connected to various sensors */
707 compatible = "st,nomadik-i2c", "arm,primecell";
708 reg = <0x101f7000 0x1000>;
709 interrupt-parent = <&vica>;
711 clock-frequency = <100000>;
712 #address-cells = <1>;
714 clocks = <&i2c1clk>, <&pclki2c1>;
715 clock-names = "mclk", "apb_pclk";
716 pinctrl-names = "default";
717 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
720 compatible = "st,camera";
724 compatible = "st,stw5095";
730 compatible = "simple-bus";
731 #address-cells = <1>;
735 vica: intc@10140000 {
736 compatible = "arm,versatile-vic";
737 interrupt-controller;
738 #interrupt-cells = <1>;
739 reg = <0x10140000 0x20>;
742 vicb: intc@10140020 {
743 compatible = "arm,versatile-vic";
744 interrupt-controller;
745 #interrupt-cells = <1>;
746 reg = <0x10140020 0x20>;
749 uart0: uart@101fd000 {
750 compatible = "arm,pl011", "arm,primecell";
751 reg = <0x101fd000 0x1000>;
752 interrupt-parent = <&vica>;
754 clocks = <&uart0clk>, <&pclkuart0>;
755 clock-names = "uartclk", "apb_pclk";
757 dmas = <&dmac0 14 1>,
759 dma-names = "rx", "tx";
762 uart1: uart@101fb000 {
763 compatible = "arm,pl011", "arm,primecell";
764 reg = <0x101fb000 0x1000>;
765 interrupt-parent = <&vica>;
767 clocks = <&uart1clk>, <&pclkuart1>;
768 clock-names = "uartclk", "apb_pclk";
769 pinctrl-names = "default";
770 pinctrl-0 = <&uart1_default_mux>;
771 dmas = <&dmac1 22 1>,
773 dma-names = "rx", "tx";
776 uart2: uart@101f2000 {
777 compatible = "arm,pl011", "arm,primecell";
778 reg = <0x101f2000 0x1000>;
779 interrupt-parent = <&vica>;
781 clocks = <&uart2clk>, <&pclkuart2>;
782 clock-names = "uartclk", "apb_pclk";
784 dmas = <&dmac1 30 1>,
786 dma-names = "rx", "tx";
790 compatible = "arm,primecell";
791 reg = <0x101b0000 0x1000>;
792 clocks = <&rngcclk>, <&hclkrng>;
793 clock-names = "rng", "apb_pclk";
797 compatible = "arm,pl031", "arm,primecell";
798 reg = <0x101e8000 0x1000>;
800 clock-names = "apb_pclk";
801 interrupt-parent = <&vica>;
805 mmcsd: sdi@101f6000 {
806 compatible = "arm,pl18x", "arm,primecell";
807 reg = <0x101f6000 0x1000>;
808 clocks = <&sdiclk>, <&pclksdi>;
809 clock-names = "mclk", "apb_pclk";
810 interrupt-parent = <&vica>;
812 max-frequency = <400000>;
818 * The STw4811 circuit used with the Nomadik strictly
819 * requires that all of these signal direction pins be
820 * routed and used for its 4-bit levelshifter.
827 pinctrl-names = "default";
828 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
829 vmmc-supply = <&vmmc_regulator>;
832 dmac0: dma-controller@10130000 {
833 compatible = "arm,pl080", "arm,primecell";
834 reg = <0x10130000 0x1000>;
835 interrupt-parent = <&vica>;
837 clocks = <&hclkdma0>;
838 clock-names = "apb_pclk";
839 lli-bus-interface-ahb1;
840 lli-bus-interface-ahb2;
841 mem-bus-interface-ahb2;
842 memcpy-burst-size = <256>;
843 memcpy-bus-width = <32>;
846 dmac1: dma-controller@10150000 {
847 compatible = "arm,pl080", "arm,primecell";
848 reg = <0x10150000 0x1000>;
849 interrupt-parent = <&vica>;
851 clocks = <&hclkdma1>;
852 clock-names = "apb_pclk";
853 lli-bus-interface-ahb1;
854 lli-bus-interface-ahb2;
855 mem-bus-interface-ahb2;
856 memcpy-burst-size = <256>;
857 memcpy-bus-width = <32>;