3 * Copyright (C) 2013 STMicroelectronics Limited.
4 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
10 #include "st-pincfg.h"
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
51 compatible = "st,stih416-sbc-pinctrl";
52 st,syscfg = <&syscfg_sbc>;
53 reg = <0xfe61f080 0x4>;
55 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
56 interrupt-names = "irqmux";
57 ranges = <0 0xfe610000 0x6000>;
63 #interrupt-cells = <2>;
65 st,bank-name = "PIO0";
71 #interrupt-cells = <2>;
73 st,bank-name = "PIO1";
79 #interrupt-cells = <2>;
81 st,bank-name = "PIO2";
87 #interrupt-cells = <2>;
89 st,bank-name = "PIO3";
95 #interrupt-cells = <2>;
97 st,bank-name = "PIO4";
99 pio40: gpio@fe615000 {
102 interrupt-controller;
103 #interrupt-cells = <2>;
104 reg = <0x5000 0x100>;
105 st,bank-name = "PIO40";
106 st,retime-pin-mask = <0x7f>;
112 ir = <&pio4 0 ALT2 IN>;
117 pinctrl_sbc_serial1: sbc_serial1 {
119 tx = <&pio2 6 ALT3 OUT>;
120 rx = <&pio2 7 ALT3 IN>;
126 pinctrl_keyscan: keyscan {
128 keyin0 = <&pio0 2 ALT2 IN>;
129 keyin1 = <&pio0 3 ALT2 IN>;
130 keyin2 = <&pio0 4 ALT2 IN>;
131 keyin3 = <&pio2 6 ALT2 IN>;
133 keyout0 = <&pio1 6 ALT2 OUT>;
134 keyout1 = <&pio1 7 ALT2 OUT>;
135 keyout2 = <&pio0 6 ALT2 OUT>;
136 keyout3 = <&pio2 7 ALT2 OUT>;
142 pinctrl_sbc_i2c0_default: sbc_i2c0-default {
144 sda = <&pio4 6 ALT1 BIDIR>;
145 scl = <&pio4 5 ALT1 BIDIR>;
153 oc-detect = <&pio40 0 ALT1 IN>;
154 pwr-enable = <&pio40 1 ALT1 OUT>;
160 pinctrl_sbc_i2c1_default: sbc_i2c1-default {
162 sda = <&pio3 2 ALT2 BIDIR>;
163 scl = <&pio3 1 ALT2 BIDIR>;
171 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
172 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
173 txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
174 txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
175 txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
176 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
177 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
178 col = <&pio0 7 ALT1 IN BYPASS 1000>;
180 mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
181 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
182 crs = <&pio1 2 ALT1 IN BYPASS 1000>;
183 mdint = <&pio1 3 ALT1 IN BYPASS 0>;
184 rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
185 rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
186 rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
187 rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
189 rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
190 rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
191 rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
192 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
195 pinctrl_rgmii1: rgmii1-0 {
197 txd0 = <&pio0 0 ALT1 OUT DE_IO 500 CLK_A>;
198 txd1 = <&pio0 1 ALT1 OUT DE_IO 500 CLK_A>;
199 txd2 = <&pio0 2 ALT1 OUT DE_IO 500 CLK_A>;
200 txd3 = <&pio0 3 ALT1 OUT DE_IO 500 CLK_A>;
201 txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
202 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
204 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
205 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
206 rxd0 = <&pio1 4 ALT1 IN DE_IO 500 CLK_A>;
207 rxd1 = <&pio1 5 ALT1 IN DE_IO 500 CLK_A>;
208 rxd2 = <&pio1 6 ALT1 IN DE_IO 500 CLK_A>;
209 rxd3 = <&pio1 7 ALT1 IN DE_IO 500 CLK_A>;
211 rxdv = <&pio2 0 ALT1 IN DE_IO 500 CLK_A>;
212 rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
213 phyclk = <&pio2 3 ALT4 OUT NICLK 0 CLK_B>;
215 clk125= <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
221 pinctrl_pwm1_chan0_default: pwm1-0-default {
223 pwm-out = <&pio3 0 ALT1 OUT>;
224 pwm-capturein = <&pio3 2 ALT1 IN>;
228 pinctrl_pwm1_chan1_default: pwm1-1-default {
230 pwm-out = <&pio4 4 ALT1 OUT>;
231 pwm-capturein = <&pio4 3 ALT1 IN>;
234 pinctrl_pwm1_chan2_default: pwm1-2-default {
236 pwm-out = <&pio4 6 ALT3 OUT>;
239 pinctrl_pwm1_chan3_default: pwm1-3-default {
241 pwm-out = <&pio4 7 ALT3 OUT>;
247 pin-controller-front {
248 #address-cells = <1>;
250 compatible = "st,stih416-front-pinctrl";
251 st,syscfg = <&syscfg_front>;
252 reg = <0xfee0f080 0x4>;
253 reg-names = "irqmux";
254 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
255 interrupt-names = "irqmux";
256 ranges = <0 0xfee00000 0x10000>;
258 pio5: gpio@fee00000 {
261 interrupt-controller;
262 #interrupt-cells = <2>;
264 st,bank-name = "PIO5";
266 pio6: gpio@fee01000 {
269 interrupt-controller;
270 #interrupt-cells = <2>;
271 reg = <0x1000 0x100>;
272 st,bank-name = "PIO6";
274 pio7: gpio@fee02000 {
277 interrupt-controller;
278 #interrupt-cells = <2>;
279 reg = <0x2000 0x100>;
280 st,bank-name = "PIO7";
282 pio8: gpio@fee03000 {
285 interrupt-controller;
286 #interrupt-cells = <2>;
287 reg = <0x3000 0x100>;
288 st,bank-name = "PIO8";
290 pio9: gpio@fee04000 {
293 interrupt-controller;
294 #interrupt-cells = <2>;
295 reg = <0x4000 0x100>;
296 st,bank-name = "PIO9";
298 pio10: gpio@fee05000 {
301 interrupt-controller;
302 #interrupt-cells = <2>;
303 reg = <0x5000 0x100>;
304 st,bank-name = "PIO10";
306 pio11: gpio@fee06000 {
309 interrupt-controller;
310 #interrupt-cells = <2>;
311 reg = <0x6000 0x100>;
312 st,bank-name = "PIO11";
314 pio12: gpio@fee07000 {
317 interrupt-controller;
318 #interrupt-cells = <2>;
319 reg = <0x7000 0x100>;
320 st,bank-name = "PIO12";
322 pio30: gpio@fee08000 {
325 interrupt-controller;
326 #interrupt-cells = <2>;
327 reg = <0x8000 0x100>;
328 st,bank-name = "PIO30";
330 pio31: gpio@fee09000 {
333 interrupt-controller;
334 #interrupt-cells = <2>;
335 reg = <0x9000 0x100>;
336 st,bank-name = "PIO31";
340 pinctrl_pwm0_chan0_default: pwm0-0-default {
342 pwm-out = <&pio9 7 ALT2 OUT>;
343 pwm-capturein = <&pio9 6 ALT2 IN>;
349 pinctrl_serial2_oe: serial2-1 {
351 output-enable = <&pio11 3 ALT2 OUT>;
357 pinctrl_i2c0_default: i2c0-default {
359 sda = <&pio9 3 ALT1 BIDIR>;
360 scl = <&pio9 2 ALT1 BIDIR>;
368 oc-detect = <&pio9 4 ALT1 IN>;
369 pwr-enable = <&pio9 5 ALT1 OUT>;
376 pinctrl_i2c1_default: i2c1-default {
378 sda = <&pio12 1 ALT1 BIDIR>;
379 scl = <&pio12 0 ALT1 BIDIR>;
387 spi-fsm-clk = <&pio12 2 ALT1 OUT>;
388 spi-fsm-cs = <&pio12 3 ALT1 OUT>;
389 spi-fsm-mosi = <&pio12 4 ALT1 OUT>;
390 spi-fsm-miso = <&pio12 5 ALT1 IN>;
391 spi-fsm-hol = <&pio12 6 ALT1 OUT>;
392 spi-fsm-wp = <&pio12 7 ALT1 OUT>;
398 pin-controller-rear {
399 #address-cells = <1>;
401 compatible = "st,stih416-rear-pinctrl";
402 st,syscfg = <&syscfg_rear>;
403 reg = <0xfe82f080 0x4>;
404 reg-names = "irqmux";
405 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
406 interrupt-names = "irqmux";
407 ranges = <0 0xfe820000 0x6000>;
409 pio13: gpio@fe820000 {
412 interrupt-controller;
413 #interrupt-cells = <2>;
415 st,bank-name = "PIO13";
417 pio14: gpio@fe821000 {
420 interrupt-controller;
421 #interrupt-cells = <2>;
422 reg = <0x1000 0x100>;
423 st,bank-name = "PIO14";
425 pio15: gpio@fe822000 {
428 interrupt-controller;
429 #interrupt-cells = <2>;
430 reg = <0x2000 0x100>;
431 st,bank-name = "PIO15";
433 pio16: gpio@fe823000 {
436 interrupt-controller;
437 #interrupt-cells = <2>;
438 reg = <0x3000 0x100>;
439 st,bank-name = "PIO16";
441 pio17: gpio@fe824000 {
444 interrupt-controller;
445 #interrupt-cells = <2>;
446 reg = <0x4000 0x100>;
447 st,bank-name = "PIO17";
449 pio18: gpio@fe825000 {
452 interrupt-controller;
453 #interrupt-cells = <2>;
454 reg = <0x5000 0x100>;
455 st,bank-name = "PIO18";
456 st,retime-pin-mask = <0xf>;
460 pinctrl_serial2: serial2-0 {
462 tx = <&pio17 4 ALT2 OUT>;
463 rx = <&pio17 5 ALT2 IN>;
471 mdint = <&pio13 6 ALT2 IN BYPASS 0>;
472 txen = <&pio13 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
473 txd0 = <&pio14 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
474 txd1 = <&pio14 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
475 txd2 = <&pio14 2 ALT2 OUT SE_NICLK_IO 0 CLK_B>;
476 txd3 = <&pio14 3 ALT2 OUT SE_NICLK_IO 0 CLK_B>;
478 txclk = <&pio15 0 ALT2 IN NICLK 0 CLK_A>;
479 txer = <&pio15 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
480 crs = <&pio15 2 ALT2 IN BYPASS 1000>;
481 col = <&pio15 3 ALT2 IN BYPASS 1000>;
482 mdio= <&pio15 4 ALT2 OUT BYPASS 1500>;
483 mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;
485 rxd0 = <&pio16 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
486 rxd1 = <&pio16 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
487 rxd2 = <&pio16 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
488 rxd3 = <&pio16 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
489 rxdv = <&pio15 6 ALT2 IN SE_NICLK_IO 0 CLK_A>;
490 rx_er = <&pio15 7 ALT2 IN SE_NICLK_IO 0 CLK_A>;
491 rxclk = <&pio17 0 ALT2 IN NICLK 0 CLK_A>;
492 phyclk = <&pio13 5 ALT2 OUT NICLK 0 CLK_B>;
496 pinctrl_gmii0: gmii0 {
500 pinctrl_rgmii0: rgmii0 {
502 phyclk = <&pio13 5 ALT4 OUT NICLK 0 CLK_B>;
503 txen = <&pio13 7 ALT2 OUT DE_IO 0 CLK_A>;
504 txd0 = <&pio14 0 ALT2 OUT DE_IO 500 CLK_A>;
505 txd1 = <&pio14 1 ALT2 OUT DE_IO 500 CLK_A>;
506 txd2 = <&pio14 2 ALT2 OUT DE_IO 500 CLK_B>;
507 txd3 = <&pio14 3 ALT2 OUT DE_IO 500 CLK_B>;
508 txclk = <&pio15 0 ALT2 IN NICLK 0 CLK_A>;
510 mdio = <&pio15 4 ALT2 OUT BYPASS 0>;
511 mdc = <&pio15 5 ALT2 OUT NICLK 0 CLK_B>;
513 rxdv = <&pio15 6 ALT2 IN DE_IO 500 CLK_A>;
514 rxd0 =<&pio16 0 ALT2 IN DE_IO 500 CLK_A>;
515 rxd1 =<&pio16 1 ALT2 IN DE_IO 500 CLK_A>;
516 rxd2 =<&pio16 2 ALT2 IN DE_IO 500 CLK_A>;
517 rxd3 =<&pio16 3 ALT2 IN DE_IO 500 CLK_A>;
518 rxclk =<&pio17 0 ALT2 IN NICLK 0 CLK_A>;
520 clk125=<&pio17 6 ALT1 IN NICLK 0 CLK_A>;
528 mmcclk = <&pio13 4 ALT4 BIDIR_PU NICLK 0 CLK_B>;
529 data0 = <&pio14 4 ALT4 BIDIR_PU BYPASS 0>;
530 data1 = <&pio14 5 ALT4 BIDIR_PU BYPASS 0>;
531 data2 = <&pio14 6 ALT4 BIDIR_PU BYPASS 0>;
532 data3 = <&pio14 7 ALT4 BIDIR_PU BYPASS 0>;
533 cmd = <&pio15 1 ALT4 BIDIR_PU BYPASS 0>;
534 wp = <&pio15 3 ALT4 IN>;
535 data4 = <&pio16 4 ALT4 BIDIR_PU BYPASS 0>;
536 data5 = <&pio16 5 ALT4 BIDIR_PU BYPASS 0>;
537 data6 = <&pio16 6 ALT4 BIDIR_PU BYPASS 0>;
538 data7 = <&pio16 7 ALT4 BIDIR_PU BYPASS 0>;
539 pwr = <&pio17 1 ALT4 OUT>;
540 cd = <&pio17 2 ALT4 IN>;
541 led = <&pio17 3 ALT4 OUT>;
548 mmcclk = <&pio15 0 ALT3 BIDIR_PU NICLK 0 CLK_B>;
549 data0 = <&pio13 7 ALT3 BIDIR_PU BYPASS 0>;
550 data1 = <&pio14 1 ALT3 BIDIR_PU BYPASS 0>;
551 data2 = <&pio14 2 ALT3 BIDIR_PU BYPASS 0>;
552 data3 = <&pio14 3 ALT3 BIDIR_PU BYPASS 0>;
553 cmd = <&pio15 4 ALT3 BIDIR_PU BYPASS 0>;
554 data4 = <&pio15 6 ALT3 BIDIR_PU BYPASS 0>;
555 data5 = <&pio15 7 ALT3 BIDIR_PU BYPASS 0>;
556 data6 = <&pio16 0 ALT3 BIDIR_PU BYPASS 0>;
557 data7 = <&pio16 1 ALT3 BIDIR_PU BYPASS 0>;
558 pwr = <&pio16 2 ALT3 OUT>;
559 nreset = <&pio13 6 ALT3 OUT>;
567 oc-detect = <&pio18 0 ALT1 IN>;
568 pwr-enable = <&pio18 1 ALT1 OUT>;
573 oc-detect = <&pio18 2 ALT1 IN>;
574 pwr-enable = <&pio18 3 ALT1 OUT>;
580 pinctrl_pwm0_chan1_default: pwm0-1-default {
582 pwm-out = <&pio13 2 ALT2 OUT>;
583 pwm-capturein = <&pio13 1 ALT2 IN>;
586 pinctrl_pwm0_chan2_default: pwm0-2-default {
588 pwm-out = <&pio15 2 ALT4 OUT>;
591 pinctrl_pwm0_chan3_default: pwm0-3-default {
593 pwm-out = <&pio17 4 ALT1 OUT>;
600 pin-controller-fvdp-fe {
601 #address-cells = <1>;
603 compatible = "st,stih416-fvdp-fe-pinctrl";
604 st,syscfg = <&syscfg_fvdp_fe>;
605 reg = <0xfd6bf080 0x4>;
606 reg-names = "irqmux";
607 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
608 interrupt-names = "irqmux";
609 ranges = <0 0xfd6b0000 0x3000>;
611 pio100: gpio@fd6b0000 {
614 interrupt-controller;
615 #interrupt-cells = <2>;
617 st,bank-name = "PIO100";
619 pio101: gpio@fd6b1000 {
622 interrupt-controller;
623 #interrupt-cells = <2>;
624 reg = <0x1000 0x100>;
625 st,bank-name = "PIO101";
627 pio102: gpio@fd6b2000 {
630 interrupt-controller;
631 #interrupt-cells = <2>;
632 reg = <0x2000 0x100>;
633 st,bank-name = "PIO102";
637 pin-controller-fvdp-lite {
638 #address-cells = <1>;
640 compatible = "st,stih416-fvdp-lite-pinctrl";
641 st,syscfg = <&syscfg_fvdp_lite>;
642 reg = <0xfd33f080 0x4>;
643 reg-names = "irqmux";
644 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
645 interrupt-names = "irqmux";
646 ranges = <0 0xfd330000 0x5000>;
648 pio103: gpio@fd330000 {
651 interrupt-controller;
652 #interrupt-cells = <2>;
654 st,bank-name = "PIO103";
656 pio104: gpio@fd331000 {
659 interrupt-controller;
660 #interrupt-cells = <2>;
661 reg = <0x1000 0x100>;
662 st,bank-name = "PIO104";
664 pio105: gpio@fd332000 {
667 interrupt-controller;
668 #interrupt-cells = <2>;
669 reg = <0x2000 0x100>;
670 st,bank-name = "PIO105";
672 pio106: gpio@fd333000 {
675 interrupt-controller;
676 #interrupt-cells = <2>;
677 reg = <0x3000 0x100>;
678 st,bank-name = "PIO106";
681 pio107: gpio@fd334000 {
684 interrupt-controller;
685 #interrupt-cells = <2>;
686 reg = <0x4000 0x100>;
687 st,bank-name = "PIO107";
688 st,retime-pin-mask = <0xf>;