arch/arm/boot/dts/tegra124-jetson-tk1.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra124.dtsi"
   5
   6 #include "tegra124-jetson-tk1-emc.dtsi"
   7
   8 / {
   9         model = "NVIDIA Tegra124 Jetson TK1";
  10         compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
  11
  12         aliases {
  13                 rtc0 = "/i2c@0,7000d000/pmic@40";
  14                 rtc1 = "/rtc@0,7000e000";
  15
  16                 /* This order keeps the mapping DB9 connector <-> ttyS0 */
  17                 serial0 = &uartd;
  18                 serial1 = &uarta;
  19                 serial2 = &uartb;
  20         };
  21
  22         memory {
  23                 reg = <0x0 0x80000000 0x0 0x80000000>;
  24         };
  25
  26         pcie-controller@0,01003000 {
  27                 status = "okay";
  28
  29                 avddio-pex-supply = <&vdd_1v05_run>;
  30                 dvddio-pex-supply = <&vdd_1v05_run>;
  31                 avdd-pex-pll-supply = <&vdd_1v05_run>;
  32                 hvdd-pex-supply = <&vdd_3v3_lp0>;
  33                 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
  34                 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
  35                 avdd-pll-erefe-supply = <&avdd_1v05_run>;
  36
  37                 pci@1,0 {
  38                         status = "okay";
  39                 };
  40
  41                 pci@2,0 {
  42                         status = "okay";
  43                 };
  44         };
  45
  46         host1x@0,50000000 {
  47                 hdmi@0,54280000 {
  48                         status = "okay";
  49
  50                         hdmi-supply = <&vdd_5v0_hdmi>;
  51                         pll-supply = <&vdd_hdmi_pll>;
  52                         vdd-supply = <&vdd_3v3_hdmi>;
  53
  54                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  55                         nvidia,hpd-gpio =
  56                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  57                 };
  58         };
  59
  60         gpu@0,57000000 {
  61                 /*
  62                  * Node left disabled on purpose - the bootloader will enable
  63                  * it after having set the VPR up
  64                  */
  65                 vdd-supply = <&vdd_gpu>;
  66         };
  67
  68         pinmux: pinmux@0,70000868 {
  69                 pinctrl-names = "boot";
  70                 pinctrl-0 = <&state_boot>;
  71
  72                 state_boot: pinmux {
  73                         clk_32k_out_pa0 {
  74                                 nvidia,pins = "clk_32k_out_pa0";
  75                                 nvidia,function = "soc";
  76                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
  77                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  78                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  79                         };
  80                         uart3_cts_n_pa1 {
  81                                 nvidia,pins = "uart3_cts_n_pa1";
  82                                 nvidia,function = "gmi";
  83                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  84                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  85                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  86                         };
  87                         dap2_fs_pa2 {
  88                                 nvidia,pins = "dap2_fs_pa2";
  89                                 nvidia,function = "i2s1";
  90                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  91                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  92                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  93                         };
  94                         dap2_sclk_pa3 {
  95                                 nvidia,pins = "dap2_sclk_pa3";
  96                                 nvidia,function = "i2s1";
  97                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  98                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  99                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 100                         };
 101                         dap2_din_pa4 {
 102                                 nvidia,pins = "dap2_din_pa4";
 103                                 nvidia,function = "i2s1";
 104                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 105                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 106                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 107                         };
 108                         dap2_dout_pa5 {
 109                                 nvidia,pins = "dap2_dout_pa5";
 110                                 nvidia,function = "i2s1";
 111                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 112                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 113                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 114                         };
 115                         sdmmc3_clk_pa6 {
 116                                 nvidia,pins = "sdmmc3_clk_pa6";
 117                                 nvidia,function = "sdmmc3";
 118                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 119                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 120                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 121                         };
 122                         sdmmc3_cmd_pa7 {
 123                                 nvidia,pins = "sdmmc3_cmd_pa7";
 124                                 nvidia,function = "sdmmc3";
 125                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 126                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 127                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 128                         };
 129                         pb0 {
 130                                 nvidia,pins = "pb0";
 131                                 nvidia,function = "uartd";
 132                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 133                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 134                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 135                         };
 136                         pb1 {
 137                                 nvidia,pins = "pb1";
 138                                 nvidia,function = "uartd";
 139                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 140                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 141                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 142                         };
 143                         sdmmc3_dat3_pb4 {
 144                                 nvidia,pins = "sdmmc3_dat3_pb4";
 145                                 nvidia,function = "sdmmc3";
 146                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 147                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 148                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 149                         };
 150                         sdmmc3_dat2_pb5 {
 151                                 nvidia,pins = "sdmmc3_dat2_pb5";
 152                                 nvidia,function = "sdmmc3";
 153                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 154                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 155                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 156                         };
 157                         sdmmc3_dat1_pb6 {
 158                                 nvidia,pins = "sdmmc3_dat1_pb6";
 159                                 nvidia,function = "sdmmc3";
 160                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 161                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 162                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 163                         };
 164                         sdmmc3_dat0_pb7 {
 165                                 nvidia,pins = "sdmmc3_dat0_pb7";
 166                                 nvidia,function = "sdmmc3";
 167                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 168                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 169                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 170                         };
 171                         uart3_rts_n_pc0 {
 172                                 nvidia,pins = "uart3_rts_n_pc0";
 173                                 nvidia,function = "gmi";
 174                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 175                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 176                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 177                         };
 178                         uart2_txd_pc2 {
 179                                 nvidia,pins = "uart2_txd_pc2";
 180                                 nvidia,function = "irda";
 181                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 182                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 183                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 184                         };
 185                         uart2_rxd_pc3 {
 186                                 nvidia,pins = "uart2_rxd_pc3";
 187                                 nvidia,function = "irda";
 188                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 189                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 190                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 191                         };
 192                         gen1_i2c_scl_pc4 {
 193                                 nvidia,pins = "gen1_i2c_scl_pc4";
 194                                 nvidia,function = "i2c1";
 195                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 196                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 197                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 198                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 199                         };
 200                         gen1_i2c_sda_pc5 {
 201                                 nvidia,pins = "gen1_i2c_sda_pc5";
 202                                 nvidia,function = "i2c1";
 203                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 204                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 205                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 206                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 207                         };
 208                         pc7 {
 209                                 nvidia,pins = "pc7";
 210                                 nvidia,function = "rsvd1";
 211                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 212                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 213                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 214                         };
 215                         pg0 {
 216                                 nvidia,pins = "pg0";
 217                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 218                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 219                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 220                         };
 221                         pg1 {
 222                                 nvidia,pins = "pg1";
 223                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 224                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 225                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 226                         };
 227                         pg2 {
 228                                 nvidia,pins = "pg2";
 229                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 230                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 231                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 232                         };
 233                         pg3 {
 234                                 nvidia,pins = "pg3";
 235                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 236                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 237                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 238                         };
 239                         pg4 {
 240                                 nvidia,pins = "pg4";
 241                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 242                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 243                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 244                         };
 245                         pg5 {
 246                                 nvidia,pins = "pg5";
 247                                 nvidia,function = "spi4";
 248                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 249                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 250                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 251                         };
 252                         pg6 {
 253                                 nvidia,pins = "pg6";
 254                                 nvidia,function = "spi4";
 255                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 256                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 257                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 258                         };
 259                         pg7 {
 260                                 nvidia,pins = "pg7";
 261                                 nvidia,function = "spi4";
 262                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 263                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 264                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 265                         };
 266                         ph0 {
 267                                 nvidia,pins = "ph0";
 268                                 nvidia,function = "gmi";
 269                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 270                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 271                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 272                         };
 273                         ph1 {
 274                                 nvidia,pins = "ph1";
 275                                 nvidia,function = "pwm1";
 276                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 277                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 278                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 279                         };
 280                         ph2 {
 281                                 nvidia,pins = "ph2";
 282                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 283                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 284                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 285                         };
 286                         ph3 {
 287                                 nvidia,pins = "ph3";
 288                                 nvidia,function = "gmi";
 289                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 290                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 291                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 292                         };
 293                         ph4 {
 294                                 nvidia,pins = "ph4";
 295                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 296                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 297                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 298                         };
 299                         ph5 {
 300                                 nvidia,pins = "ph5";
 301                                 nvidia,function = "rsvd2";
 302                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 303                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 304                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 305                         };
 306                         ph6 {
 307                                 nvidia,pins = "ph6";
 308                                 nvidia,function = "gmi";
 309                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 310                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 311                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 312                         };
 313                         ph7 {
 314                                 nvidia,pins = "ph7";
 315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 316                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 317                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 318                         };
 319                         pi0 {
 320                                 nvidia,pins = "pi0";
 321                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 322                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 323                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 324                         };
 325                         pi1 {
 326                                 nvidia,pins = "pi1";
 327                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 328                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 329                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 330                         };
 331                         pi2 {
 332                                 nvidia,pins = "pi2";
 333                                 nvidia,function = "rsvd4";
 334                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 335                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 336                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 337                         };
 338                         pi3 {
 339                                 nvidia,pins = "pi3";
 340                                 nvidia,function = "spi4";
 341                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 342                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 343                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 344                         };
 345                         pi4 {
 346                                 nvidia,pins = "pi4";
 347                                 nvidia,function = "gmi";
 348                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 349                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 350                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 351                         };
 352                         pi5 {
 353                                 nvidia,pins = "pi5";
 354                                 nvidia,function = "rsvd2";
 355                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 356                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 357                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 358                         };
 359                         pi6 {
 360                                 nvidia,pins = "pi6";
 361                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 362                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 363                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 364                         };
 365                         pi7 {
 366                                 nvidia,pins = "pi7";
 367                                 nvidia,function = "rsvd1";
 368                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 369                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 370                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 371                         };
 372                         pj0 {
 373                                 nvidia,pins = "pj0";
 374                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 375                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 376                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 377                         };
 378                         pj2 {
 379                                 nvidia,pins = "pj2";
 380                                 nvidia,function = "rsvd1";
 381                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 382                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 383                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 384                         };
 385                         uart2_cts_n_pj5 {
 386                                 nvidia,pins = "uart2_cts_n_pj5";
 387                                 nvidia,function = "uartb";
 388                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 389                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 390                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 391                         };
 392                         uart2_rts_n_pj6 {
 393                                 nvidia,pins = "uart2_rts_n_pj6";
 394                                 nvidia,function = "uartb";
 395                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 396                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 397                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 398                         };
 399                         pj7 {
 400                                 nvidia,pins = "pj7";
 401                                 nvidia,function = "uartd";
 402                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 403                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 404                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 405                         };
 406                         pk0 {
 407                                 nvidia,pins = "pk0";
 408                                 nvidia,function = "rsvd1";
 409                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 410                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 411                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 412                         };
 413                         pk1 {
 414                                 nvidia,pins = "pk1";
 415                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 416                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 417                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 418                         };
 419                         pk2 {
 420                                 nvidia,pins = "pk2";
 421                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 422                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 423                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 424                         };
 425                         pk3 {
 426                                 nvidia,pins = "pk3";
 427                                 nvidia,function = "gmi";
 428                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 429                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 430                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 431                         };
 432                         pk4 {
 433                                 nvidia,pins = "pk4";
 434                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 435                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 436                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 437                         };
 438                         spdif_out_pk5 {
 439                                 nvidia,pins = "spdif_out_pk5";
 440                                 nvidia,function = "rsvd2";
 441                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 442                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 443                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 444                         };
 445                         spdif_in_pk6 {
 446                                 nvidia,pins = "spdif_in_pk6";
 447                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 448                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 449                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 450                         };
 451                         pk7 {
 452                                 nvidia,pins = "pk7";
 453                                 nvidia,function = "uartd";
 454                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 455                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 456                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 457                         };
 458                         dap1_fs_pn0 {
 459                                 nvidia,pins = "dap1_fs_pn0";
 460                                 nvidia,function = "rsvd4";
 461                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 462                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 463                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 464                         };
 465                         dap1_din_pn1 {
 466                                 nvidia,pins = "dap1_din_pn1";
 467                                 nvidia,function = "rsvd4";
 468                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 469                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 471                         };
 472                         dap1_dout_pn2 {
 473                                 nvidia,pins = "dap1_dout_pn2";
 474                                 nvidia,function = "sata";
 475                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 476                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 477                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 478                         };
 479                         dap1_sclk_pn3 {
 480                                 nvidia,pins = "dap1_sclk_pn3";
 481                                 nvidia,function = "rsvd4";
 482                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 483                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 484                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 485                         };
 486                         usb_vbus_en0_pn4 {
 487                                 nvidia,pins = "usb_vbus_en0_pn4";
 488                                 nvidia,function = "usb";
 489                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 490                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 491                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 492                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 493                         };
 494                         usb_vbus_en1_pn5 {
 495                                 nvidia,pins = "usb_vbus_en1_pn5";
 496                                 nvidia,function = "usb";
 497                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 498                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 499                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 500                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 501                         };
 502                         hdmi_int_pn7 {
 503                                 nvidia,pins = "hdmi_int_pn7";
 504                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 505                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 506                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 507                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
 508                         };
 509                         ulpi_data7_po0 {
 510                                 nvidia,pins = "ulpi_data7_po0";
 511                                 nvidia,function = "ulpi";
 512                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 513                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 514                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 515                         };
 516                         ulpi_data0_po1 {
 517                                 nvidia,pins = "ulpi_data0_po1";
 518                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 519                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 520                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 521                         };
 522                         ulpi_data1_po2 {
 523                                 nvidia,pins = "ulpi_data1_po2";
 524                                 nvidia,function = "ulpi";
 525                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 526                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 527                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 528                         };
 529                         ulpi_data2_po3 {
 530                                 nvidia,pins = "ulpi_data2_po3";
 531                                 nvidia,function = "ulpi";
 532                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 533                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 534                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 535                         };
 536                         ulpi_data3_po4 {
 537                                 nvidia,pins = "ulpi_data3_po4";
 538                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 539                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 540                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 541                         };
 542                         ulpi_data4_po5 {
 543                                 nvidia,pins = "ulpi_data4_po5";
 544                                 nvidia,function = "ulpi";
 545                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 546                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 547                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 548                         };
 549                         ulpi_data5_po6 {
 550                                 nvidia,pins = "ulpi_data5_po6";
 551                                 nvidia,function = "ulpi";
 552                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 553                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 554                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 555                         };
 556                         ulpi_data6_po7 {
 557                                 nvidia,pins = "ulpi_data6_po7";
 558                                 nvidia,function = "ulpi";
 559                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 560                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 561                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 562                         };
 563                         dap3_fs_pp0 {
 564                                 nvidia,pins = "dap3_fs_pp0";
 565                                 nvidia,function = "i2s2";
 566                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 567                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 568                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 569                         };
 570                         dap3_din_pp1 {
 571                                 nvidia,pins = "dap3_din_pp1";
 572                                 nvidia,function = "i2s2";
 573                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 574                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 575                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 576                         };
 577                         dap3_dout_pp2 {
 578                                 nvidia,pins = "dap3_dout_pp2";
 579                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 580                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 581                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 582                         };
 583                         dap3_sclk_pp3 {
 584                                 nvidia,pins = "dap3_sclk_pp3";
 585                                 nvidia,function = "rsvd3";
 586                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 587                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 588                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 589                         };
 590                         dap4_fs_pp4 {
 591                                 nvidia,pins = "dap4_fs_pp4";
 592                                 nvidia,function = "rsvd4";
 593                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 594                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 595                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 596                         };
 597                         dap4_din_pp5 {
 598                                 nvidia,pins = "dap4_din_pp5";
 599                                 nvidia,function = "rsvd3";
 600                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 601                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 602                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 603                         };
 604                         dap4_dout_pp6 {
 605                                 nvidia,pins = "dap4_dout_pp6";
 606                                 nvidia,function = "rsvd4";
 607                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 608                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 609                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 610                         };
 611                         dap4_sclk_pp7 {
 612                                 nvidia,pins = "dap4_sclk_pp7";
 613                                 nvidia,function = "rsvd3";
 614                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 615                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 616                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 617                         };
 618                         kb_col0_pq0 {
 619                                 nvidia,pins = "kb_col0_pq0";
 620                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 621                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 622                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 623                         };
 624                         kb_col1_pq1 {
 625                                 nvidia,pins = "kb_col1_pq1";
 626                                 nvidia,function = "rsvd2";
 627                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 628                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 629                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 630                         };
 631                         kb_col2_pq2 {
 632                                 nvidia,pins = "kb_col2_pq2";
 633                                 nvidia,function = "rsvd2";
 634                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 635                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 636                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 637                         };
 638                         kb_col3_pq3 {
 639                                 nvidia,pins = "kb_col3_pq3";
 640                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 641                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 642                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 643                         };
 644                         kb_col4_pq4 {
 645                                 nvidia,pins = "kb_col4_pq4";
 646                                 nvidia,function = "sdmmc3";
 647                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 648                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 649                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 650                         };
 651                         kb_col5_pq5 {
 652                                 nvidia,pins = "kb_col5_pq5";
 653                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 654                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 655                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 656                         };
 657                         kb_col6_pq6 {
 658                                 nvidia,pins = "kb_col6_pq6";
 659                                 nvidia,function = "rsvd2";
 660                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 661                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 662                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 663                         };
 664                         kb_col7_pq7 {
 665                                 nvidia,pins = "kb_col7_pq7";
 666                                 nvidia,function = "rsvd2";
 667                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 668                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 669                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 670                         };
 671                         kb_row0_pr0 {
 672                                 nvidia,pins = "kb_row0_pr0";
 673                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 674                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 675                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 676                         };
 677                         kb_row1_pr1 {
 678                                 nvidia,pins = "kb_row1_pr1";
 679                                 nvidia,function = "rsvd2";
 680                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 681                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 682                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 683                         };
 684                         kb_row2_pr2 {
 685                                 nvidia,pins = "kb_row2_pr2";
 686                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 687                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 688                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 689                         };
 690                         kb_row3_pr3 {
 691                                 nvidia,pins = "kb_row3_pr3";
 692                                 nvidia,function = "kbc";
 693                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 694                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 695                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 696                         };
 697                         kb_row4_pr4 {
 698                                 nvidia,pins = "kb_row4_pr4";
 699                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 700                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 701                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 702                         };
 703                         kb_row5_pr5 {
 704                                 nvidia,pins = "kb_row5_pr5";
 705                                 nvidia,function = "rsvd3";
 706                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 707                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 708                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 709                         };
 710                         kb_row6_pr6 {
 711                                 nvidia,pins = "kb_row6_pr6";
 712                                 nvidia,function = "displaya_alt";
 713                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 714                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 715                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 716                         };
 717                         kb_row7_pr7 {
 718                                 nvidia,pins = "kb_row7_pr7";
 719                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 720                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 721                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 722                         };
 723                         kb_row8_ps0 {
 724                                 nvidia,pins = "kb_row8_ps0";
 725                                 nvidia,function = "rsvd2";
 726                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 727                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 728                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 729                         };
 730                         kb_row9_ps1 {
 731                                 nvidia,pins = "kb_row9_ps1";
 732                                 nvidia,function = "uarta";
 733                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 734                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 735                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 736                         };
 737                         kb_row10_ps2 {
 738                                 nvidia,pins = "kb_row10_ps2";
 739                                 nvidia,function = "uarta";
 740                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 741                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 742                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 743                         };
 744                         kb_row11_ps3 {
 745                                 nvidia,pins = "kb_row11_ps3";
 746                                 nvidia,function = "rsvd2";
 747                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 748                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 749                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 750                         };
 751                         kb_row12_ps4 {
 752                                 nvidia,pins = "kb_row12_ps4";
 753                                 nvidia,function = "rsvd2";
 754                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 755                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 756                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 757                         };
 758                         kb_row13_ps5 {
 759                                 nvidia,pins = "kb_row13_ps5";
 760                                 nvidia,function = "rsvd2";
 761                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 762                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 763                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 764                         };
 765                         kb_row14_ps6 {
 766                                 nvidia,pins = "kb_row14_ps6";
 767                                 nvidia,function = "rsvd2";
 768                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 769                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 770                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 771                         };
 772                         kb_row15_ps7 {
 773                                 nvidia,pins = "kb_row15_ps7";
 774                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 775                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 776                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 777                         };
 778                         kb_row16_pt0 {
 779                                 nvidia,pins = "kb_row16_pt0";
 780                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 781                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 782                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 783                         };
 784                         kb_row17_pt1 {
 785                                 nvidia,pins = "kb_row17_pt1";
 786                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 787                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 788                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 789                         };
 790                         gen2_i2c_scl_pt5 {
 791                                 nvidia,pins = "gen2_i2c_scl_pt5";
 792                                 nvidia,function = "i2c2";
 793                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 794                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 795                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 796                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 797                         };
 798                         gen2_i2c_sda_pt6 {
 799                                 nvidia,pins = "gen2_i2c_sda_pt6";
 800                                 nvidia,function = "i2c2";
 801                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 802                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 803                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 804                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 805                         };
 806                         sdmmc4_cmd_pt7 {
 807                                 nvidia,pins = "sdmmc4_cmd_pt7";
 808                                 nvidia,function = "sdmmc4";
 809                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 810                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 811                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 812                         };
 813                         pu0 {
 814                                 nvidia,pins = "pu0";
 815                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 816                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 817                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 818                         };
 819                         pu1 {
 820                                 nvidia,pins = "pu1";
 821                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 822                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 823                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 824                         };
 825                         pu2 {
 826                                 nvidia,pins = "pu2";
 827                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 828                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 829                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 830                         };
 831                         pu3 {
 832                                 nvidia,pins = "pu3";
 833                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 834                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 835                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 836                         };
 837                         pu4 {
 838                                 nvidia,pins = "pu4";
 839                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 840                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 841                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 842                         };
 843                         pu5 {
 844                                 nvidia,pins = "pu5";
 845                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 846                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 847                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 848                         };
 849                         pu6 {
 850                                 nvidia,pins = "pu6";
 851                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 852                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 853                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 854                         };
 855                         pv0 {
 856                                 nvidia,pins = "pv0";
 857                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 858                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 859                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 860                         };
 861                         pv1 {
 862                                 nvidia,pins = "pv1";
 863                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 864                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 865                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 866                         };
 867                         sdmmc3_cd_n_pv2 {
 868                                 nvidia,pins = "sdmmc3_cd_n_pv2";
 869                                 nvidia,function = "sdmmc3";
 870                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 871                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 872                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 873                         };
 874                         sdmmc1_wp_n_pv3 {
 875                                 nvidia,pins = "sdmmc1_wp_n_pv3";
 876                                 nvidia,function = "sdmmc1";
 877                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 878                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 879                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 880                         };
 881                         ddc_scl_pv4 {
 882                                 nvidia,pins = "ddc_scl_pv4";
 883                                 nvidia,function = "i2c4";
 884                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 885                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 886                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 887                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
 888                         };
 889                         ddc_sda_pv5 {
 890                                 nvidia,pins = "ddc_sda_pv5";
 891                                 nvidia,function = "i2c4";
 892                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 893                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 894                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 895                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
 896                         };
 897                         gpio_w2_aud_pw2 {
 898                                 nvidia,pins = "gpio_w2_aud_pw2";
 899                                 nvidia,function = "rsvd2";
 900                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 901                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 902                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 903                         };
 904                         gpio_w3_aud_pw3 {
 905                                 nvidia,pins = "gpio_w3_aud_pw3";
 906                                 nvidia,function = "spi6";
 907                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 908                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 909                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 910                         };
 911                         dap_mclk1_pw4 {
 912                                 nvidia,pins = "dap_mclk1_pw4";
 913                                 nvidia,function = "extperiph1";
 914                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 915                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 916                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 917                         };
 918                         clk2_out_pw5 {
 919                                 nvidia,pins = "clk2_out_pw5";
 920                                 nvidia,function = "extperiph2";
 921                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 922                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 923                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 924                         };
 925                         uart3_txd_pw6 {
 926                                 nvidia,pins = "uart3_txd_pw6";
 927                                 nvidia,function = "rsvd2";
 928                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 929                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 930                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 931                         };
 932                         uart3_rxd_pw7 {
 933                                 nvidia,pins = "uart3_rxd_pw7";
 934                                 nvidia,function = "rsvd2";
 935                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 936                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 937                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 938                         };
 939                         dvfs_pwm_px0 {
 940                                 nvidia,pins = "dvfs_pwm_px0";
 941                                 nvidia,function = "cldvfs";
 942                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 943                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 944                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 945                         };
 946                         gpio_x1_aud_px1 {
 947                                 nvidia,pins = "gpio_x1_aud_px1";
 948                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 949                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 950                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 951                         };
 952                         dvfs_clk_px2 {
 953                                 nvidia,pins = "dvfs_clk_px2";
 954                                 nvidia,function = "cldvfs";
 955                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 956                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 957                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 958                         };
 959                         gpio_x3_aud_px3 {
 960                                 nvidia,pins = "gpio_x3_aud_px3";
 961                                 nvidia,function = "rsvd4";
 962                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 963                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 964                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 965                         };
 966                         gpio_x4_aud_px4 {
 967                                 nvidia,pins = "gpio_x4_aud_px4";
 968                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 969                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 970                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 971                         };
 972                         gpio_x5_aud_px5 {
 973                                 nvidia,pins = "gpio_x5_aud_px5";
 974                                 nvidia,function = "rsvd4";
 975                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 976                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 977                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 978                         };
 979                         gpio_x6_aud_px6 {
 980                                 nvidia,pins = "gpio_x6_aud_px6";
 981                                 nvidia,function = "gmi";
 982                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 983                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 984                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 985                         };
 986                         gpio_x7_aud_px7 {
 987                                 nvidia,pins = "gpio_x7_aud_px7";
 988                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 989                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 990                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 991                         };
 992                         ulpi_clk_py0 {
 993                                 nvidia,pins = "ulpi_clk_py0";
 994                                 nvidia,function = "spi1";
 995                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 996                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 997                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 998                         };
 999                         ulpi_dir_py1 {
1000                                 nvidia,pins = "ulpi_dir_py1";
1001                                 nvidia,function = "spi1";
1002                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1003                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1004                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1005                         };
1006                         ulpi_nxt_py2 {
1007                                 nvidia,pins = "ulpi_nxt_py2";
1008                                 nvidia,function = "spi1";
1009                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1010                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1011                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1012                         };
1013                         ulpi_stp_py3 {
1014                                 nvidia,pins = "ulpi_stp_py3";
1015                                 nvidia,function = "spi1";
1016                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1017                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1018                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1019                         };
1020                         sdmmc1_dat3_py4 {
1021                                 nvidia,pins = "sdmmc1_dat3_py4";
1022                                 nvidia,function = "sdmmc1";
1023                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1024                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1025                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1026                         };
1027                         sdmmc1_dat2_py5 {
1028                                 nvidia,pins = "sdmmc1_dat2_py5";
1029                                 nvidia,function = "sdmmc1";
1030                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1031                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1032                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1033                         };
1034                         sdmmc1_dat1_py6 {
1035                                 nvidia,pins = "sdmmc1_dat1_py6";
1036                                 nvidia,function = "sdmmc1";
1037                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1038                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1039                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1040                         };
1041                         sdmmc1_dat0_py7 {
1042                                 nvidia,pins = "sdmmc1_dat0_py7";
1043                                 nvidia,function = "rsvd2";
1044                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1045                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1046                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1047                         };
1048                         sdmmc1_clk_pz0 {
1049                                 nvidia,pins = "sdmmc1_clk_pz0";
1050                                 nvidia,function = "rsvd3";
1051                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1052                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1053                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1054                         };
1055                         sdmmc1_cmd_pz1 {
1056                                 nvidia,pins = "sdmmc1_cmd_pz1";
1057                                 nvidia,function = "sdmmc1";
1058                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1059                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1060                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1061                         };
1062                         pwr_i2c_scl_pz6 {
1063                                 nvidia,pins = "pwr_i2c_scl_pz6";
1064                                 nvidia,function = "i2cpwr";
1065                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1066                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1067                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1068                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1069                         };
1070                         pwr_i2c_sda_pz7 {
1071                                 nvidia,pins = "pwr_i2c_sda_pz7";
1072                                 nvidia,function = "i2cpwr";
1073                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1074                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1075                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1076                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1077                         };
1078                         sdmmc4_dat0_paa0 {
1079                                 nvidia,pins = "sdmmc4_dat0_paa0";
1080                                 nvidia,function = "sdmmc4";
1081                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1082                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1083                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1084                         };
1085                         sdmmc4_dat1_paa1 {
1086                                 nvidia,pins = "sdmmc4_dat1_paa1";
1087                                 nvidia,function = "sdmmc4";
1088                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1089                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1090                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1091                         };
1092                         sdmmc4_dat2_paa2 {
1093                                 nvidia,pins = "sdmmc4_dat2_paa2";
1094                                 nvidia,function = "sdmmc4";
1095                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1096                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1097                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1098                         };
1099                         sdmmc4_dat3_paa3 {
1100                                 nvidia,pins = "sdmmc4_dat3_paa3";
1101                                 nvidia,function = "sdmmc4";
1102                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1103                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1104                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1105                         };
1106                         sdmmc4_dat4_paa4 {
1107                                 nvidia,pins = "sdmmc4_dat4_paa4";
1108                                 nvidia,function = "sdmmc4";
1109                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1110                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1111                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1112                         };
1113                         sdmmc4_dat5_paa5 {
1114                                 nvidia,pins = "sdmmc4_dat5_paa5";
1115                                 nvidia,function = "sdmmc4";
1116                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1117                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1118                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1119                         };
1120                         sdmmc4_dat6_paa6 {
1121                                 nvidia,pins = "sdmmc4_dat6_paa6";
1122                                 nvidia,function = "sdmmc4";
1123                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1124                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1125                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1126                         };
1127                         sdmmc4_dat7_paa7 {
1128                                 nvidia,pins = "sdmmc4_dat7_paa7";
1129                                 nvidia,function = "sdmmc4";
1130                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1131                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1132                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1133                         };
1134                         pbb0 {
1135                                 nvidia,pins = "pbb0";
1136                                 nvidia,function = "vimclk2_alt";
1137                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1138                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1139                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1140                         };
1141                         cam_i2c_scl_pbb1 {
1142                                 nvidia,pins = "cam_i2c_scl_pbb1";
1143                                 nvidia,function = "i2c3";
1144                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1145                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1146                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1147                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1148                         };
1149                         cam_i2c_sda_pbb2 {
1150                                 nvidia,pins = "cam_i2c_sda_pbb2";
1151                                 nvidia,function = "i2c3";
1152                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1153                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1154                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1155                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1156                         };
1157                         pbb3 {
1158                                 nvidia,pins = "pbb3";
1159                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1160                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1161                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1162                         };
1163                         pbb4 {
1164                                 nvidia,pins = "pbb4";
1165                                 nvidia,function = "vgp4";
1166                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1167                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1168                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1169                         };
1170                         pbb5 {
1171                                 nvidia,pins = "pbb5";
1172                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1173                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1174                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1175                         };
1176                         pbb6 {
1177                                 nvidia,pins = "pbb6";
1178                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1179                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1180                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1181                         };
1182                         pbb7 {
1183                                 nvidia,pins = "pbb7";
1184                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1185                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1186                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1187                         };
1188                         cam_mclk_pcc0 {
1189                                 nvidia,pins = "cam_mclk_pcc0";
1190                                 nvidia,function = "vi_alt3";
1191                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1192                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1193                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1194                         };
1195                         pcc1 {
1196                                 nvidia,pins = "pcc1";
1197                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1198                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1199                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1200                         };
1201                         pcc2 {
1202                                 nvidia,pins = "pcc2";
1203                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1204                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1205                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1206                         };
1207                         sdmmc4_clk_pcc4 {
1208                                 nvidia,pins = "sdmmc4_clk_pcc4";
1209                                 nvidia,function = "sdmmc4";
1210                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1211                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1212                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1213                         };
1214                         clk2_req_pcc5 {
1215                                 nvidia,pins = "clk2_req_pcc5";
1216                                 nvidia,function = "rsvd2";
1217                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1218                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1219                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1220                         };
1221                         pex_l0_rst_n_pdd1 {
1222                                 nvidia,pins = "pex_l0_rst_n_pdd1";
1223                                 nvidia,function = "pe0";
1224                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1225                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1226                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1227                         };
1228                         pex_l0_clkreq_n_pdd2 {
1229                                 nvidia,pins = "pex_l0_clkreq_n_pdd2";
1230                                 nvidia,function = "pe0";
1231                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1232                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1233                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1234                         };
1235                         pex_wake_n_pdd3 {
1236                                 nvidia,pins = "pex_wake_n_pdd3";
1237                                 nvidia,function = "pe";
1238                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1239                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1240                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1241                         };
1242                         pex_l1_rst_n_pdd5 {
1243                                 nvidia,pins = "pex_l1_rst_n_pdd5";
1244                                 nvidia,function = "pe1";
1245                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1246                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1247                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1248                         };
1249                         pex_l1_clkreq_n_pdd6 {
1250                                 nvidia,pins = "pex_l1_clkreq_n_pdd6";
1251                                 nvidia,function = "pe1";
1252                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1253                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1254                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1255                         };
1256                         clk3_out_pee0 {
1257                                 nvidia,pins = "clk3_out_pee0";
1258                                 nvidia,function = "extperiph3";
1259                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1260                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1261                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1262                         };
1263                         clk3_req_pee1 {
1264                                 nvidia,pins = "clk3_req_pee1";
1265                                 nvidia,function = "rsvd2";
1266                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1267                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1268                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1269                         };
1270                         dap_mclk1_req_pee2 {
1271                                 nvidia,pins = "dap_mclk1_req_pee2";
1272                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1273                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1274                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1275                         };
1276                         hdmi_cec_pee3 {
1277                                 nvidia,pins = "hdmi_cec_pee3";
1278                                 nvidia,function = "cec";
1279                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1280                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1281                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1282                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1283                         };
1284                         sdmmc3_clk_lb_out_pee4 {
1285                                 nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1286                                 nvidia,function = "sdmmc3";
1287                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1288                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1289                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1290                         };
1291                         sdmmc3_clk_lb_in_pee5 {
1292                                 nvidia,pins = "sdmmc3_clk_lb_in_pee5";
1293                                 nvidia,function = "sdmmc3";
1294                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1295                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1296                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1297                         };
1298                         dp_hpd_pff0 {
1299                                 nvidia,pins = "dp_hpd_pff0";
1300                                 nvidia,function = "dp";
1301                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1302                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1303                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1304                         };
1305                         usb_vbus_en2_pff1 {
1306                                 nvidia,pins = "usb_vbus_en2_pff1";
1307                                 nvidia,function = "rsvd2";
1308                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1309                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1310                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1311                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1312                         };
1313                         pff2 {
1314                                 nvidia,pins = "pff2";
1315                                 nvidia,function = "rsvd2";
1316                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1317                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1318                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1319                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1320                         };
1321                         core_pwr_req {
1322                                 nvidia,pins = "core_pwr_req";
1323                                 nvidia,function = "pwron";
1324                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1325                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1326                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1327                         };
1328                         cpu_pwr_req {
1329                                 nvidia,pins = "cpu_pwr_req";
1330                                 nvidia,function = "cpu";
1331                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1332                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1333                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1334                         };
1335                         pwr_int_n {
1336                                 nvidia,pins = "pwr_int_n";
1337                                 nvidia,function = "pmi";
1338                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1339                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1340                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1341                         };
1342                         reset_out_n {
1343                                 nvidia,pins = "reset_out_n";
1344                                 nvidia,function = "reset_out_n";
1345                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1346                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1347                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1348                         };
1349                         owr {
1350                                 nvidia,pins = "owr";
1351                                 nvidia,function = "rsvd2";
1352                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1353                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1354                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1355                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
1356                         };
1357                         clk_32k_in {
1358                                 nvidia,pins = "clk_32k_in";
1359                                 nvidia,function = "clk";
1360                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1361                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1362                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1363                         };
1364                         jtag_rtck {
1365                                 nvidia,pins = "jtag_rtck";
1366                                 nvidia,function = "rtck";
1367                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1368                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1369                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1370                         };
1371                 };
1372         };
1373
1374         /*
1375          * First high speed UART, exposed on the expansion connector J3A2
1376          *   Pin 41: BR_UART1_TXD
1377          *   Pin 44: BR_UART1_RXD
1378          */
1379         serial@70006000 {
1380                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1381                 status = "okay";
1382         };
1383
1384         /*
1385          * Second high speed UART, exposed on the expansion connector J3A2
1386          *   Pin 65: UART2_RXD
1387          *   Pin 68: UART2_TXD
1388          *   Pin 71: UART2_CTS_L
1389          *   Pin 74: UART2_RTS_L
1390          */
1391         serial@70006040 {
1392                 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1393                 status = "okay";
1394         };
1395
1396         /* DB9 serial port */
1397         serial@0,70006300 {
1398                 status = "okay";
1399         };
1400
1401         /* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
1402         i2c@0,7000c000 {
1403                 status = "okay";
1404                 clock-frequency = <100000>;
1405
1406                 rt5639: audio-codec@1c {
1407                         compatible = "realtek,rt5639";
1408                         reg = <0x1c>;
1409                         interrupt-parent = <&gpio>;
1410                         interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
1411                         realtek,ldo1-en-gpios =
1412                                 <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1413                 };
1414
1415                 temperature-sensor@4c {
1416                         compatible = "ti,tmp451";
1417                         reg = <0x4c>;
1418                         interrupt-parent = <&gpio>;
1419                         interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1420                 };
1421
1422                 eeprom@56 {
1423                         compatible = "atmel,24c02";
1424                         reg = <0x56>;
1425                         pagesize = <8>;
1426                 };
1427         };
1428
1429         /* Expansion GEN2_I2C_* */
1430         i2c@0,7000c400 {
1431                 status = "okay";
1432                 clock-frequency = <100000>;
1433         };
1434
1435         /* Expansion CAM_I2C_* */
1436         i2c@0,7000c500 {
1437                 status = "okay";
1438                 clock-frequency = <100000>;
1439         };
1440
1441         /* HDMI DDC */
1442         hdmi_ddc: i2c@0,7000c700 {
1443                 status = "okay";
1444                 clock-frequency = <100000>;
1445         };
1446
1447         /* Expansion PWR_I2C_*, on-board components */
1448         i2c@0,7000d000 {
1449                 status = "okay";
1450                 clock-frequency = <400000>;
1451
1452                 pmic: pmic@40 {
1453                         compatible = "ams,as3722";
1454                         reg = <0x40>;
1455                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1456
1457                         ams,system-power-controller;
1458
1459                         #interrupt-cells = <2>;
1460                         interrupt-controller;
1461
1462                         gpio-controller;
1463                         #gpio-cells = <2>;
1464
1465                         pinctrl-names = "default";
1466                         pinctrl-0 = <&as3722_default>;
1467
1468                         as3722_default: pinmux {
1469                                 gpio0 {
1470                                         pins = "gpio0";
1471                                         function = "gpio";
1472                                         bias-pull-down;
1473                                 };
1474
1475                                 gpio1_2_4_7 {
1476                                         pins = "gpio1", "gpio2", "gpio4", "gpio7";
1477                                         function = "gpio";
1478                                         bias-pull-up;
1479                                 };
1480
1481                                 gpio3_5_6 {
1482                                         pins = "gpio3", "gpio5", "gpio6";
1483                                         bias-high-impedance;
1484                                 };
1485                         };
1486
1487                         regulators {
1488                                 vsup-sd2-supply = <&vdd_5v0_sys>;
1489                                 vsup-sd3-supply = <&vdd_5v0_sys>;
1490                                 vsup-sd4-supply = <&vdd_5v0_sys>;
1491                                 vsup-sd5-supply = <&vdd_5v0_sys>;
1492                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
1493                                 vin-ldo1-6-supply = <&vdd_3v3_run>;
1494                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
1495                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
1496                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
1497                                 vin-ldo11-supply = <&vdd_3v3_run>;
1498
1499                                 vdd_cpu: sd0 {
1500                                         regulator-name = "+VDD_CPU_AP";
1501                                         regulator-min-microvolt = <700000>;
1502                                         regulator-max-microvolt = <1400000>;
1503                                         regulator-min-microamp = <3500000>;
1504                                         regulator-max-microamp = <3500000>;
1505                                         regulator-always-on;
1506                                         regulator-boot-on;
1507                                         ams,ext-control = <2>;
1508                                 };
1509
1510                                 sd1 {
1511                                         regulator-name = "+VDD_CORE";
1512                                         regulator-min-microvolt = <700000>;
1513                                         regulator-max-microvolt = <1350000>;
1514                                         regulator-min-microamp = <2500000>;
1515                                         regulator-max-microamp = <2500000>;
1516                                         regulator-always-on;
1517                                         regulator-boot-on;
1518                                         ams,ext-control = <1>;
1519                                 };
1520
1521                                 vdd_1v35_lp0: sd2 {
1522                                         regulator-name = "+1.35V_LP0(sd2)";
1523                                         regulator-min-microvolt = <1350000>;
1524                                         regulator-max-microvolt = <1350000>;
1525                                         regulator-always-on;
1526                                         regulator-boot-on;
1527                                 };
1528
1529                                 sd3 {
1530                                         regulator-name = "+1.35V_LP0(sd3)";
1531                                         regulator-min-microvolt = <1350000>;
1532                                         regulator-max-microvolt = <1350000>;
1533                                         regulator-always-on;
1534                                         regulator-boot-on;
1535                                 };
1536
1537                                 vdd_1v05_run: sd4 {
1538                                         regulator-name = "+1.05V_RUN";
1539                                         regulator-min-microvolt = <1050000>;
1540                                         regulator-max-microvolt = <1050000>;
1541                                 };
1542
1543                                 vddio_1v8: sd5 {
1544                                         regulator-name = "+1.8V_VDDIO";
1545                                         regulator-min-microvolt = <1800000>;
1546                                         regulator-max-microvolt = <1800000>;
1547                                         regulator-boot-on;
1548                                         regulator-always-on;
1549                                 };
1550
1551                                 vdd_gpu: sd6 {
1552                                         regulator-name = "+VDD_GPU_AP";
1553                                         regulator-min-microvolt = <650000>;
1554                                         regulator-max-microvolt = <1200000>;
1555                                         regulator-min-microamp = <3500000>;
1556                                         regulator-max-microamp = <3500000>;
1557                                         regulator-boot-on;
1558                                         regulator-always-on;
1559                                 };
1560
1561                                 avdd_1v05_run: ldo0 {
1562                                         regulator-name = "+1.05V_RUN_AVDD";
1563                                         regulator-min-microvolt = <1050000>;
1564                                         regulator-max-microvolt = <1050000>;
1565                                         regulator-boot-on;
1566                                         regulator-always-on;
1567                                         ams,ext-control = <1>;
1568                                 };
1569
1570                                 ldo1 {
1571                                         regulator-name = "+1.8V_RUN_CAM";
1572                                         regulator-min-microvolt = <1800000>;
1573                                         regulator-max-microvolt = <1800000>;
1574                                 };
1575
1576                                 ldo2 {
1577                                         regulator-name = "+1.2V_GEN_AVDD";
1578                                         regulator-min-microvolt = <1200000>;
1579                                         regulator-max-microvolt = <1200000>;
1580                                         regulator-boot-on;
1581                                         regulator-always-on;
1582                                 };
1583
1584                                 ldo3 {
1585                                         regulator-name = "+1.05V_LP0_VDD_RTC";
1586                                         regulator-min-microvolt = <1000000>;
1587                                         regulator-max-microvolt = <1000000>;
1588                                         regulator-boot-on;
1589                                         regulator-always-on;
1590                                         ams,enable-tracking;
1591                                 };
1592
1593                                 ldo4 {
1594                                         regulator-name = "+2.8V_RUN_CAM";
1595                                         regulator-min-microvolt = <2800000>;
1596                                         regulator-max-microvolt = <2800000>;
1597                                 };
1598
1599                                 ldo5 {
1600                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
1601                                         regulator-min-microvolt = <1200000>;
1602                                         regulator-max-microvolt = <1200000>;
1603                                 };
1604
1605                                 vddio_sdmmc3: ldo6 {
1606                                         regulator-name = "+VDDIO_SDMMC3";
1607                                         regulator-min-microvolt = <1800000>;
1608                                         regulator-max-microvolt = <3300000>;
1609                                 };
1610
1611                                 ldo7 {
1612                                         regulator-name = "+1.05V_RUN_CAM_REAR";
1613                                         regulator-min-microvolt = <1050000>;
1614                                         regulator-max-microvolt = <1050000>;
1615                                 };
1616
1617                                 ldo9 {
1618                                         regulator-name = "+3.3V_RUN_TOUCH";
1619                                         regulator-min-microvolt = <2800000>;
1620                                         regulator-max-microvolt = <2800000>;
1621                                 };
1622
1623                                 ldo10 {
1624                                         regulator-name = "+2.8V_RUN_CAM_AF";
1625                                         regulator-min-microvolt = <2800000>;
1626                                         regulator-max-microvolt = <2800000>;
1627                                 };
1628
1629                                 ldo11 {
1630                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
1631                                         regulator-min-microvolt = <1800000>;
1632                                         regulator-max-microvolt = <1800000>;
1633                                 };
1634                         };
1635                 };
1636         };
1637
1638         /* Expansion TS_SPI_* */
1639         spi@0,7000d400 {
1640                 status = "okay";
1641         };
1642
1643         /* Internal SPI */
1644         spi@0,7000da00 {
1645                 status = "okay";
1646                 spi-max-frequency = <25000000>;
1647                 spi-flash@0 {
1648                         compatible = "winbond,w25q32dw";
1649                         reg = <0>;
1650                         spi-max-frequency = <20000000>;
1651                 };
1652         };
1653
1654         pmc@0,7000e400 {
1655                 nvidia,invert-interrupt;
1656                 nvidia,suspend-mode = <1>;
1657                 nvidia,cpu-pwr-good-time = <500>;
1658                 nvidia,cpu-pwr-off-time = <300>;
1659                 nvidia,core-pwr-good-time = <641 3845>;
1660                 nvidia,core-pwr-off-time = <61036>;
1661                 nvidia,core-power-req-active-high;
1662                 nvidia,sys-clock-req-active-high;
1663
1664                 i2c-thermtrip {
1665                         nvidia,i2c-controller-id = <4>;
1666                         nvidia,bus-addr = <0x40>;
1667                         nvidia,reg-addr = <0x36>;
1668                         nvidia,reg-data = <0x2>;
1669                 };
1670         };
1671
1672         /* Serial ATA */
1673         sata@0,70020000 {
1674                 status = "okay";
1675
1676                 hvdd-supply = <&vdd_3v3_lp0>;
1677                 vddio-supply = <&vdd_1v05_run>;
1678                 avdd-supply = <&vdd_1v05_run>;
1679
1680                 target-5v-supply = <&vdd_5v0_sata>;
1681                 target-12v-supply = <&vdd_12v0_sata>;
1682         };
1683
1684         hda@0,70030000 {
1685                 status = "okay";
1686         };
1687
1688         padctl@0,7009f000 {
1689                 pinctrl-0 = <&padctl_default>;
1690                 pinctrl-names = "default";
1691
1692                 padctl_default: pinmux {
1693                         usb3 {
1694                                 nvidia,lanes = "pcie-0", "pcie-1";
1695                                 nvidia,function = "usb3";
1696                                 nvidia,iddq = <0>;
1697                         };
1698
1699                         pcie {
1700                                 nvidia,lanes = "pcie-2", "pcie-3",
1701                                                "pcie-4";
1702                                 nvidia,function = "pcie";
1703                                 nvidia,iddq = <0>;
1704                         };
1705
1706                         sata {
1707                                 nvidia,lanes = "sata-0";
1708                                 nvidia,function = "sata";
1709                                 nvidia,iddq = <0>;
1710                         };
1711                 };
1712         };
1713
1714         /* SD card */
1715         sdhci@0,700b0400 {
1716                 status = "okay";
1717                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1718                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1719                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1720                 bus-width = <4>;
1721                 vqmmc-supply = <&vddio_sdmmc3>;
1722         };
1723
1724         /* eMMC */
1725         sdhci@0,700b0600 {
1726                 status = "okay";
1727                 bus-width = <8>;
1728                 non-removable;
1729         };
1730
1731         /* CPU DFLL clock */
1732         clock@0,70110000 {
1733                 status = "okay";
1734                 vdd-cpu-supply = <&vdd_cpu>;
1735                 nvidia,i2c-fs-rate = <400000>;
1736         };
1737
1738         ahub@0,70300000 {
1739                 i2s@0,70301100 {
1740                         status = "okay";
1741                 };
1742         };
1743
1744         /* mini-PCIe USB */
1745         usb@0,7d004000 {
1746                 status = "okay";
1747         };
1748
1749         usb-phy@0,7d004000 {
1750                 status = "okay";
1751         };
1752
1753         /* USB A connector */
1754         usb@0,7d008000 {
1755                 status = "okay";
1756         };
1757
1758         usb-phy@0,7d008000 {
1759                 status = "okay";
1760                 vbus-supply = <&vdd_usb3_vbus>;
1761         };
1762
1763         clocks {
1764                 compatible = "simple-bus";
1765                 #address-cells = <1>;
1766                 #size-cells = <0>;
1767
1768                 clk32k_in: clock@0 {
1769                         compatible = "fixed-clock";
1770                         reg = <0>;
1771                         #clock-cells = <0>;
1772                         clock-frequency = <32768>;
1773                 };
1774         };
1775
1776         cpus {
1777                 cpu@0 {
1778                         vdd-cpu-supply = <&vdd_cpu>;
1779                 };
1780         };
1781
1782         gpio-keys {
1783                 compatible = "gpio-keys";
1784
1785                 power {
1786                         label = "Power";
1787                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1788                         linux,code = <KEY_POWER>;
1789                         debounce-interval = <10>;
1790                         gpio-key,wakeup;
1791                 };
1792         };
1793
1794         regulators {
1795                 compatible = "simple-bus";
1796                 #address-cells = <1>;
1797                 #size-cells = <0>;
1798
1799                 vdd_mux: regulator@0 {
1800                         compatible = "regulator-fixed";
1801                         reg = <0>;
1802                         regulator-name = "+VDD_MUX";
1803                         regulator-min-microvolt = <12000000>;
1804                         regulator-max-microvolt = <12000000>;
1805                         regulator-always-on;
1806                         regulator-boot-on;
1807                 };
1808
1809                 vdd_5v0_sys: regulator@1 {
1810                         compatible = "regulator-fixed";
1811                         reg = <1>;
1812                         regulator-name = "+5V_SYS";
1813                         regulator-min-microvolt = <5000000>;
1814                         regulator-max-microvolt = <5000000>;
1815                         regulator-always-on;
1816                         regulator-boot-on;
1817                         vin-supply = <&vdd_mux>;
1818                 };
1819
1820                 vdd_3v3_sys: regulator@2 {
1821                         compatible = "regulator-fixed";
1822                         reg = <2>;
1823                         regulator-name = "+3.3V_SYS";
1824                         regulator-min-microvolt = <3300000>;
1825                         regulator-max-microvolt = <3300000>;
1826                         regulator-always-on;
1827                         regulator-boot-on;
1828                         vin-supply = <&vdd_mux>;
1829                 };
1830
1831                 vdd_3v3_run: regulator@3 {
1832                         compatible = "regulator-fixed";
1833                         reg = <3>;
1834                         regulator-name = "+3.3V_RUN";
1835                         regulator-min-microvolt = <3300000>;
1836                         regulator-max-microvolt = <3300000>;
1837                         regulator-always-on;
1838                         regulator-boot-on;
1839                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1840                         enable-active-high;
1841                         vin-supply = <&vdd_3v3_sys>;
1842                 };
1843
1844                 vdd_3v3_hdmi: regulator@4 {
1845                         compatible = "regulator-fixed";
1846                         reg = <4>;
1847                         regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1848                         regulator-min-microvolt = <3300000>;
1849                         regulator-max-microvolt = <3300000>;
1850                         vin-supply = <&vdd_3v3_run>;
1851                 };
1852
1853                 vdd_usb1_vbus: regulator@7 {
1854                         compatible = "regulator-fixed";
1855                         reg = <7>;
1856                         regulator-name = "+USB0_VBUS_SW";
1857                         regulator-min-microvolt = <5000000>;
1858                         regulator-max-microvolt = <5000000>;
1859                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1860                         enable-active-high;
1861                         gpio-open-drain;
1862                         vin-supply = <&vdd_5v0_sys>;
1863                 };
1864
1865                 vdd_usb3_vbus: regulator@8 {
1866                         compatible = "regulator-fixed";
1867                         reg = <8>;
1868                         regulator-name = "+5V_USB_HS";
1869                         regulator-min-microvolt = <5000000>;
1870                         regulator-max-microvolt = <5000000>;
1871                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1872                         enable-active-high;
1873                         gpio-open-drain;
1874                         vin-supply = <&vdd_5v0_sys>;
1875                 };
1876
1877                 vdd_3v3_lp0: regulator@10 {
1878                         compatible = "regulator-fixed";
1879                         reg = <10>;
1880                         regulator-name = "+3.3V_LP0";
1881                         regulator-min-microvolt = <3300000>;
1882                         regulator-max-microvolt = <3300000>;
1883                         regulator-always-on;
1884                         regulator-boot-on;
1885                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1886                         enable-active-high;
1887                         vin-supply = <&vdd_3v3_sys>;
1888                 };
1889
1890                 vdd_hdmi_pll: regulator@11 {
1891                         compatible = "regulator-fixed";
1892                         reg = <11>;
1893                         regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1894                         regulator-min-microvolt = <1050000>;
1895                         regulator-max-microvolt = <1050000>;
1896                         gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1897                         vin-supply = <&vdd_1v05_run>;
1898                 };
1899
1900                 vdd_5v0_hdmi: regulator@12 {
1901                         compatible = "regulator-fixed";
1902                         reg = <12>;
1903                         regulator-name = "+5V_HDMI_CON";
1904                         regulator-min-microvolt = <5000000>;
1905                         regulator-max-microvolt = <5000000>;
1906                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1907                         enable-active-high;
1908                         vin-supply = <&vdd_5v0_sys>;
1909                 };
1910
1911                 /* Molex power connector */
1912                 vdd_5v0_sata: regulator@13 {
1913                         compatible = "regulator-fixed";
1914                         reg = <13>;
1915                         regulator-name = "+5V_SATA";
1916                         regulator-min-microvolt = <5000000>;
1917                         regulator-max-microvolt = <5000000>;
1918                         gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
1919                         enable-active-high;
1920                         vin-supply = <&vdd_5v0_sys>;
1921                 };
1922
1923                 vdd_12v0_sata: regulator@14 {
1924                         compatible = "regulator-fixed";
1925                         reg = <14>;
1926                         regulator-name = "+12V_SATA";
1927                         regulator-min-microvolt = <12000000>;
1928                         regulator-max-microvolt = <12000000>;
1929                         gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
1930                         enable-active-high;
1931                         vin-supply = <&vdd_mux>;
1932                 };
1933         };
1934
1935         sound {
1936                 compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
1937                              "nvidia,tegra-audio-rt5640";
1938                 nvidia,model = "NVIDIA Tegra Jetson TK1";
1939
1940                 nvidia,audio-routing =
1941                         "Headphones", "HPOR",
1942                         "Headphones", "HPOL",
1943                         "Mic Jack", "MICBIAS1",
1944                         "IN2P", "Mic Jack";
1945
1946                 nvidia,i2s-controller = <&tegra_i2s1>;
1947                 nvidia,audio-codec = <&rt5639>;
1948
1949                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
1950
1951                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1952                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1953                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1954                 clock-names = "pll_a", "pll_a_out0", "mclk";
1955         };
1956
1957         thermal-zones {
1958                 cpu {
1959                         trips {
1960                                 trip@0 {
1961                                         temperature = <101000>;
1962                                         hysteresis = <0>;
1963                                         type = "critical";
1964                                 };
1965                         };
1966
1967                         cooling-maps {
1968                                 /* There are currently no cooling maps because there are no cooling devices */
1969                         };
1970                 };
1971
1972                 mem {
1973                         trips {
1974                                 trip@0 {
1975                                         temperature = <101000>;
1976                                         hysteresis = <0>;
1977                                         type = "critical";
1978                                 };
1979                         };
1980
1981                         cooling-maps {
1982                                 /* There are currently no cooling maps because there are no cooling devices */
1983                         };
1984                 };
1985
1986                 gpu {
1987                         trips {
1988                                 trip@0 {
1989                                         temperature = <101000>;
1990                                         hysteresis = <0>;
1991                                         type = "critical";
1992                                 };
1993                         };
1994
1995                         cooling-maps {
1996                                 /* There are currently no cooling maps because there are no cooling devices */
1997                         };
1998                 };
1999         };
2000 };