arch/arm/boot/dts/tegra124-venice2.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra124.dtsi"
   5
   6 / {
   7         model = "NVIDIA Tegra124 Venice2";
   8         compatible = "nvidia,venice2", "nvidia,tegra124";
   9
  10         aliases {
  11                 rtc0 = "/i2c@0,7000d000/pmic@40";
  12                 rtc1 = "/rtc@0,7000e000";
  13         };
  14
  15         memory {
  16                 reg = <0x0 0x80000000 0x0 0x80000000>;
  17         };
  18
  19         host1x@0,50000000 {
  20                 hdmi@0,54280000 {
  21                         status = "okay";
  22
  23                         vdd-supply = <&vdd_3v3_hdmi>;
  24                         pll-supply = <&vdd_hdmi_pll>;
  25                         hdmi-supply = <&vdd_5v0_hdmi>;
  26
  27                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  28                         nvidia,hpd-gpio =
  29                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  30                 };
  31
  32                 sor@0,54540000 {
  33                         status = "okay";
  34
  35                         nvidia,dpaux = <&dpaux>;
  36                         nvidia,panel = <&panel>;
  37                 };
  38
  39                 dpaux: dpaux@0,545c0000 {
  40                         vdd-supply = <&vdd_3v3_panel>;
  41                         status = "okay";
  42                 };
  43         };
  44
  45         pinmux: pinmux@0,70000868 {
  46                 pinctrl-names = "default";
  47                 pinctrl-0 = <&pinmux_default>;
  48
  49                 pinmux_default: common {
  50                         dap_mclk1_pw4 {
  51                                 nvidia,pins = "dap_mclk1_pw4";
  52                                 nvidia,function = "extperiph1";
  53                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  54                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  55                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  56                         };
  57                         dap1_din_pn1 {
  58                                 nvidia,pins = "dap1_din_pn1";
  59                                 nvidia,function = "i2s0";
  60                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  61                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  62                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  63                         };
  64                         dap1_dout_pn2 {
  65                                 nvidia,pins = "dap1_dout_pn2",
  66                                               "dap1_fs_pn0",
  67                                               "dap1_sclk_pn3";
  68                                 nvidia,function = "i2s0";
  69                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  70                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  71                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  72                         };
  73                         dap2_din_pa4 {
  74                                 nvidia,pins = "dap2_din_pa4";
  75                                 nvidia,function = "i2s1";
  76                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  77                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  78                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  79                         };
  80                         dap2_dout_pa5 {
  81                                 nvidia,pins = "dap2_dout_pa5",
  82                                               "dap2_fs_pa2",
  83                                               "dap2_sclk_pa3";
  84                                 nvidia,function = "i2s1";
  85                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  86                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  87                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  88                         };
  89                         dvfs_pwm_px0 {
  90                                 nvidia,pins = "dvfs_pwm_px0",
  91                                               "dvfs_clk_px2";
  92                                 nvidia,function = "cldvfs";
  93                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  94                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  95                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  96                         };
  97                         ulpi_clk_py0 {
  98                                 nvidia,pins = "ulpi_clk_py0",
  99                                               "ulpi_nxt_py2",
 100                                               "ulpi_stp_py3";
 101                                 nvidia,function = "spi1";
 102                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 103                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 104                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 105                         };
 106                         ulpi_dir_py1 {
 107                                 nvidia,pins = "ulpi_dir_py1";
 108                                 nvidia,function = "spi1";
 109                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 110                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 111                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 112                         };
 113                         cam_i2c_scl_pbb1 {
 114                                 nvidia,pins = "cam_i2c_scl_pbb1",
 115                                               "cam_i2c_sda_pbb2";
 116                                 nvidia,function = "i2c3";
 117                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 118                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 119                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 120                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 121                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 122                         };
 123                         gen2_i2c_scl_pt5 {
 124                                 nvidia,pins = "gen2_i2c_scl_pt5",
 125                                               "gen2_i2c_sda_pt6";
 126                                 nvidia,function = "i2c2";
 127                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 128                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 129                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 130                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 131                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 132                         };
 133                         pg4 {
 134                                 nvidia,pins = "pg4",
 135                                               "pg5",
 136                                               "pg6",
 137                                               "pi3";
 138                                 nvidia,function = "spi4";
 139                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 140                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 141                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 142                         };
 143                         pg7 {
 144                                 nvidia,pins = "pg7";
 145                                 nvidia,function = "spi4";
 146                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 147                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 148                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 149                         };
 150                         ph1 {
 151                                 nvidia,pins = "ph1";
 152                                 nvidia,function = "pwm1";
 153                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 154                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 155                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 156                         };
 157                         pk0 {
 158                                 nvidia,pins = "pk0",
 159                                               "kb_row15_ps7",
 160                                               "clk_32k_out_pa0";
 161                                 nvidia,function = "soc";
 162                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 163                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 164                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 165                         };
 166                         sdmmc1_clk_pz0 {
 167                                 nvidia,pins = "sdmmc1_clk_pz0";
 168                                 nvidia,function = "sdmmc1";
 169                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 170                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 171                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 172                         };
 173                         sdmmc1_cmd_pz1 {
 174                                 nvidia,pins = "sdmmc1_cmd_pz1",
 175                                               "sdmmc1_dat0_py7",
 176                                               "sdmmc1_dat1_py6",
 177                                               "sdmmc1_dat2_py5",
 178                                               "sdmmc1_dat3_py4";
 179                                 nvidia,function = "sdmmc1";
 180                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 181                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 182                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 183                         };
 184                         sdmmc3_clk_pa6 {
 185                                 nvidia,pins = "sdmmc3_clk_pa6";
 186                                 nvidia,function = "sdmmc3";
 187                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 188                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 189                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 190                         };
 191                         sdmmc3_cmd_pa7 {
 192                                 nvidia,pins = "sdmmc3_cmd_pa7",
 193                                               "sdmmc3_dat0_pb7",
 194                                               "sdmmc3_dat1_pb6",
 195                                               "sdmmc3_dat2_pb5",
 196                                               "sdmmc3_dat3_pb4",
 197                                               "sdmmc3_clk_lb_out_pee4",
 198                                               "sdmmc3_clk_lb_in_pee5";
 199                                 nvidia,function = "sdmmc3";
 200                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 201                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 202                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 203                         };
 204                         sdmmc4_clk_pcc4 {
 205                                 nvidia,pins = "sdmmc4_clk_pcc4";
 206                                 nvidia,function = "sdmmc4";
 207                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 208                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 209                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 210                         };
 211                         sdmmc4_cmd_pt7 {
 212                                 nvidia,pins = "sdmmc4_cmd_pt7",
 213                                               "sdmmc4_dat0_paa0",
 214                                               "sdmmc4_dat1_paa1",
 215                                               "sdmmc4_dat2_paa2",
 216                                               "sdmmc4_dat3_paa3",
 217                                               "sdmmc4_dat4_paa4",
 218                                               "sdmmc4_dat5_paa5",
 219                                               "sdmmc4_dat6_paa6",
 220                                               "sdmmc4_dat7_paa7";
 221                                 nvidia,function = "sdmmc4";
 222                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 223                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 224                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 225                         };
 226                         pwr_i2c_scl_pz6 {
 227                                 nvidia,pins = "pwr_i2c_scl_pz6",
 228                                               "pwr_i2c_sda_pz7";
 229                                 nvidia,function = "i2cpwr";
 230                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 231                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 232                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 233                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 234                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 235                         };
 236                         jtag_rtck {
 237                                 nvidia,pins = "jtag_rtck";
 238                                 nvidia,function = "rtck";
 239                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 240                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 241                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 242                         };
 243                         clk_32k_in {
 244                                 nvidia,pins = "clk_32k_in";
 245                                 nvidia,function = "clk";
 246                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 247                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 248                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 249                         };
 250                         core_pwr_req {
 251                                 nvidia,pins = "core_pwr_req";
 252                                 nvidia,function = "pwron";
 253                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 254                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 255                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 256                         };
 257                         cpu_pwr_req {
 258                                 nvidia,pins = "cpu_pwr_req";
 259                                 nvidia,function = "cpu";
 260                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 261                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 262                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 263                         };
 264                         pwr_int_n {
 265                                 nvidia,pins = "pwr_int_n";
 266                                 nvidia,function = "pmi";
 267                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 268                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 269                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 270                         };
 271                         reset_out_n {
 272                                 nvidia,pins = "reset_out_n";
 273                                 nvidia,function = "reset_out_n";
 274                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 275                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 276                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 277                         };
 278                         clk3_out_pee0 {
 279                                 nvidia,pins = "clk3_out_pee0";
 280                                 nvidia,function = "extperiph3";
 281                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 282                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 283                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 284                         };
 285                         dap4_din_pp5 {
 286                                 nvidia,pins = "dap4_din_pp5";
 287                                 nvidia,function = "i2s3";
 288                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 289                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 290                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 291                         };
 292                         dap4_dout_pp6 {
 293                                 nvidia,pins = "dap4_dout_pp6",
 294                                               "dap4_fs_pp4",
 295                                               "dap4_sclk_pp7";
 296                                 nvidia,function = "i2s3";
 297                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 298                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 299                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 300                         };
 301                         gen1_i2c_sda_pc5 {
 302                                 nvidia,pins = "gen1_i2c_sda_pc5",
 303                                               "gen1_i2c_scl_pc4";
 304                                 nvidia,function = "i2c1";
 305                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 306                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 307                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 308                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 309                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 310                         };
 311                         uart2_cts_n_pj5 {
 312                                 nvidia,pins = "uart2_cts_n_pj5";
 313                                 nvidia,function = "uartb";
 314                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 316                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 317                         };
 318                         uart2_rts_n_pj6 {
 319                                 nvidia,pins = "uart2_rts_n_pj6";
 320                                 nvidia,function = "uartb";
 321                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 322                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 323                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 324                         };
 325                         uart2_rxd_pc3 {
 326                                 nvidia,pins = "uart2_rxd_pc3";
 327                                 nvidia,function = "irda";
 328                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 329                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 330                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 331                         };
 332                         uart2_txd_pc2 {
 333                                 nvidia,pins = "uart2_txd_pc2";
 334                                 nvidia,function = "irda";
 335                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 336                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 337                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 338                         };
 339                         uart3_cts_n_pa1 {
 340                                 nvidia,pins = "uart3_cts_n_pa1",
 341                                               "uart3_rxd_pw7";
 342                                 nvidia,function = "uartc";
 343                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 344                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 345                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 346                         };
 347                         uart3_rts_n_pc0 {
 348                                 nvidia,pins = "uart3_rts_n_pc0",
 349                                               "uart3_txd_pw6";
 350                                 nvidia,function = "uartc";
 351                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 352                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 353                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 354                         };
 355                         hdmi_cec_pee3 {
 356                                 nvidia,pins = "hdmi_cec_pee3";
 357                                 nvidia,function = "cec";
 358                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 359                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 360                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 361                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 362                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 363                         };
 364                         hdmi_int_pn7 {
 365                                 nvidia,pins = "hdmi_int_pn7";
 366                                 nvidia,function = "rsvd1";
 367                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 368                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 369                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 370                         };
 371                         ddc_scl_pv4 {
 372                                 nvidia,pins = "ddc_scl_pv4",
 373                                               "ddc_sda_pv5";
 374                                 nvidia,function = "i2c4";
 375                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 376                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 377                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 378                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 379                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 380                         };
 381                         pj7 {
 382                                 nvidia,pins = "pj7",
 383                                               "pk7";
 384                                 nvidia,function = "uartd";
 385                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 386                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 387                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 388                         };
 389                         pb0 {
 390                                 nvidia,pins = "pb0",
 391                                               "pb1";
 392                                 nvidia,function = "uartd";
 393                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 394                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 395                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 396                         };
 397                         ph0 {
 398                                 nvidia,pins = "ph0";
 399                                 nvidia,function = "pwm0";
 400                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 401                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 402                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 403                         };
 404                         kb_row10_ps2 {
 405                                 nvidia,pins = "kb_row10_ps2";
 406                                 nvidia,function = "uarta";
 407                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 408                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 409                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 410                         };
 411                         kb_row9_ps1 {
 412                                 nvidia,pins = "kb_row9_ps1";
 413                                 nvidia,function = "uarta";
 414                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 415                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 416                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 417                         };
 418                         kb_row6_pr6 {
 419                                 nvidia,pins = "kb_row6_pr6";
 420                                 nvidia,function = "displaya_alt";
 421                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 422                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 423                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 424                         };
 425                         usb_vbus_en0_pn4 {
 426                                 nvidia,pins = "usb_vbus_en0_pn4",
 427                                               "usb_vbus_en1_pn5";
 428                                 nvidia,function = "usb";
 429                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 430                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 431                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 432                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 433                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 434                         };
 435                         drive_sdio1 {
 436                                 nvidia,pins = "drive_sdio1";
 437                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 438                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 439                                 nvidia,pull-down-strength = <32>;
 440                                 nvidia,pull-up-strength = <42>;
 441                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 442                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 443                         };
 444                         drive_sdio3 {
 445                                 nvidia,pins = "drive_sdio3";
 446                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 447                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 448                                 nvidia,pull-down-strength = <20>;
 449                                 nvidia,pull-up-strength = <36>;
 450                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 451                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 452                         };
 453                         drive_gma {
 454                                 nvidia,pins = "drive_gma";
 455                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 456                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 457                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 458                                 nvidia,pull-down-strength = <1>;
 459                                 nvidia,pull-up-strength = <2>;
 460                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 461                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 462                                 nvidia,drive-type = <1>;
 463                         };
 464                         als_irq_l {
 465                                 nvidia,pins = "gpio_x3_aud_px3";
 466                                 nvidia,function = "gmi";
 467                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 468                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 469                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 470                         };
 471                         codec_irq_l {
 472                                 nvidia,pins = "ph4";
 473                                 nvidia,function = "gmi";
 474                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 475                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 476                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 477                         };
 478                         lcd_bl_en {
 479                                 nvidia,pins = "ph2";
 480                                 nvidia,function = "gmi";
 481                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 482                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 483                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 484                         };
 485                         touch_irq_l {
 486                                 nvidia,pins = "gpio_w3_aud_pw3";
 487                                 nvidia,function = "spi6";
 488                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 489                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 490                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 491                         };
 492                         tpm_davint_l {
 493                                 nvidia,pins = "ph6";
 494                                 nvidia,function = "gmi";
 495                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 496                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 497                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 498                         };
 499                         ts_irq_l {
 500                                 nvidia,pins = "pk2";
 501                                 nvidia,function = "gmi";
 502                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 503                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 504                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 505                         };
 506                         ts_reset_l {
 507                                 nvidia,pins = "pk4";
 508                                 nvidia,function = "gmi";
 509                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 510                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 511                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 512                         };
 513                         ts_shdn_l {
 514                                 nvidia,pins = "pk1";
 515                                 nvidia,function = "gmi";
 516                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 517                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 518                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 519                         };
 520                         ph7 {
 521                                 nvidia,pins = "ph7";
 522                                 nvidia,function = "gmi";
 523                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 524                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 525                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 526                         };
 527                         kb_col0_ap {
 528                                 nvidia,pins = "kb_col0_pq0";
 529                                 nvidia,function = "rsvd4";
 530                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 531                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 532                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 533                         };
 534                         lid_open {
 535                                 nvidia,pins = "kb_row4_pr4";
 536                                 nvidia,function = "rsvd3";
 537                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 538                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 539                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 540                         };
 541                         en_vdd_sd {
 542                                 nvidia,pins = "kb_row0_pr0";
 543                                 nvidia,function = "rsvd4";
 544                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 545                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 546                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 547                         };
 548                         ac_ok {
 549                                 nvidia,pins = "pj0";
 550                                 nvidia,function = "gmi";
 551                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 552                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 553                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 554                         };
 555                         sensor_irq_l {
 556                                 nvidia,pins = "pi6";
 557                                 nvidia,function = "gmi";
 558                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 559                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 560                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 561                         };
 562                         wifi_en {
 563                                 nvidia,pins = "gpio_x7_aud_px7";
 564                                 nvidia,function = "rsvd4";
 565                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 566                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 567                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 568                         };
 569                         wifi_rst_l {
 570                                 nvidia,pins = "clk2_req_pcc5";
 571                                 nvidia,function = "dap";
 572                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 573                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 574                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 575                         };
 576                         hp_det_l {
 577                                 nvidia,pins = "ulpi_data1_po2";
 578                                 nvidia,function = "spi3";
 579                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 580                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 581                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 582                         };
 583                 };
 584         };
 585
 586         serial@0,70006000 {
 587                 status = "okay";
 588         };
 589
 590         pwm: pwm@0,7000a000 {
 591                 status = "okay";
 592         };
 593
 594         i2c@0,7000c000 {
 595                 status = "okay";
 596                 clock-frequency = <100000>;
 597
 598                 acodec: audio-codec@10 {
 599                         compatible = "maxim,max98090";
 600                         reg = <0x10>;
 601                         interrupt-parent = <&gpio>;
 602                         interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
 603                 };
 604         };
 605
 606         i2c@0,7000c400 {
 607                 status = "okay";
 608                 clock-frequency = <100000>;
 609         };
 610
 611         i2c@0,7000c500 {
 612                 status = "okay";
 613                 clock-frequency = <100000>;
 614         };
 615
 616         hdmi_ddc: i2c@0,7000c700 {
 617                 status = "okay";
 618                 clock-frequency = <100000>;
 619         };
 620
 621         i2c@0,7000d000 {
 622                 status = "okay";
 623                 clock-frequency = <400000>;
 624
 625                 pmic: pmic@40 {
 626                         compatible = "ams,as3722";
 627                         reg = <0x40>;
 628                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 629
 630                         ams,system-power-controller;
 631
 632                         #interrupt-cells = <2>;
 633                         interrupt-controller;
 634
 635                         gpio-controller;
 636                         #gpio-cells = <2>;
 637
 638                         pinctrl-names = "default";
 639                         pinctrl-0 = <&as3722_default>;
 640
 641                         as3722_default: pinmux {
 642                                 gpio0 {
 643                                         pins = "gpio0";
 644                                         function = "gpio";
 645                                         bias-pull-down;
 646                                 };
 647
 648                                 gpio1_2_4_7 {
 649                                         pins = "gpio1", "gpio2", "gpio4", "gpio7";
 650                                         function = "gpio";
 651                                         bias-pull-up;
 652                                 };
 653
 654                                 gpio3_6 {
 655                                         pins = "gpio3", "gpio6";
 656                                         bias-high-impedance;
 657                                 };
 658
 659                                 gpio5 {
 660                                         pins = "gpio5";
 661                                         function = "clk32k-out";
 662                                 };
 663                         };
 664
 665                         regulators {
 666                                 vsup-sd2-supply = <&vdd_5v0_sys>;
 667                                 vsup-sd3-supply = <&vdd_5v0_sys>;
 668                                 vsup-sd4-supply = <&vdd_5v0_sys>;
 669                                 vsup-sd5-supply = <&vdd_5v0_sys>;
 670                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
 671                                 vin-ldo1-6-supply = <&vdd_3v3_run>;
 672                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
 673                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
 674                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
 675                                 vin-ldo11-supply = <&vdd_3v3_run>;
 676
 677                                 sd0 {
 678                                         regulator-name = "+VDD_CPU_AP";
 679                                         regulator-min-microvolt = <700000>;
 680                                         regulator-max-microvolt = <1400000>;
 681                                         regulator-min-microamp = <3500000>;
 682                                         regulator-max-microamp = <3500000>;
 683                                         regulator-always-on;
 684                                         regulator-boot-on;
 685                                         ams,ext-control = <2>;
 686                                 };
 687
 688                                 sd1 {
 689                                         regulator-name = "+VDD_CORE";
 690                                         regulator-min-microvolt = <700000>;
 691                                         regulator-max-microvolt = <1350000>;
 692                                         regulator-min-microamp = <2500000>;
 693                                         regulator-max-microamp = <2500000>;
 694                                         regulator-always-on;
 695                                         regulator-boot-on;
 696                                         ams,ext-control = <1>;
 697                                 };
 698
 699                                 vdd_1v35_lp0: sd2 {
 700                                         regulator-name = "+1.35V_LP0(sd2)";
 701                                         regulator-min-microvolt = <1350000>;
 702                                         regulator-max-microvolt = <1350000>;
 703                                         regulator-always-on;
 704                                         regulator-boot-on;
 705                                 };
 706
 707                                 sd3 {
 708                                         regulator-name = "+1.35V_LP0(sd3)";
 709                                         regulator-min-microvolt = <1350000>;
 710                                         regulator-max-microvolt = <1350000>;
 711                                         regulator-always-on;
 712                                         regulator-boot-on;
 713                                 };
 714
 715                                 vdd_1v05_run: sd4 {
 716                                         regulator-name = "+1.05V_RUN";
 717                                         regulator-min-microvolt = <1050000>;
 718                                         regulator-max-microvolt = <1050000>;
 719                                 };
 720
 721                                 vddio_1v8: sd5 {
 722                                         regulator-name = "+1.8V_VDDIO";
 723                                         regulator-min-microvolt = <1800000>;
 724                                         regulator-max-microvolt = <1800000>;
 725                                         regulator-boot-on;
 726                                         regulator-always-on;
 727                                 };
 728
 729                                 sd6 {
 730                                         regulator-name = "+VDD_GPU_AP";
 731                                         regulator-min-microvolt = <650000>;
 732                                         regulator-max-microvolt = <1200000>;
 733                                         regulator-min-microamp = <3500000>;
 734                                         regulator-max-microamp = <3500000>;
 735                                         regulator-boot-on;
 736                                         regulator-always-on;
 737                                 };
 738
 739                                 ldo0 {
 740                                         regulator-name = "+1.05V_RUN_AVDD";
 741                                         regulator-min-microvolt = <1050000>;
 742                                         regulator-max-microvolt = <1050000>;
 743                                         regulator-boot-on;
 744                                         regulator-always-on;
 745                                         ams,ext-control = <1>;
 746                                 };
 747
 748                                 ldo1 {
 749                                         regulator-name = "+1.8V_RUN_CAM";
 750                                         regulator-min-microvolt = <1800000>;
 751                                         regulator-max-microvolt = <1800000>;
 752                                 };
 753
 754                                 ldo2 {
 755                                         regulator-name = "+1.2V_GEN_AVDD";
 756                                         regulator-min-microvolt = <1200000>;
 757                                         regulator-max-microvolt = <1200000>;
 758                                         regulator-boot-on;
 759                                         regulator-always-on;
 760                                 };
 761
 762                                 ldo3 {
 763                                         regulator-name = "+1.00V_LP0_VDD_RTC";
 764                                         regulator-min-microvolt = <1000000>;
 765                                         regulator-max-microvolt = <1000000>;
 766                                         regulator-boot-on;
 767                                         regulator-always-on;
 768                                         ams,enable-tracking;
 769                                 };
 770
 771                                 vdd_run_cam: ldo4 {
 772                                         regulator-name = "+3.3V_RUN_CAM";
 773                                         regulator-min-microvolt = <2800000>;
 774                                         regulator-max-microvolt = <2800000>;
 775                                 };
 776
 777                                 ldo5 {
 778                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
 779                                         regulator-min-microvolt = <1200000>;
 780                                         regulator-max-microvolt = <1200000>;
 781                                 };
 782
 783                                 vddio_sdmmc3: ldo6 {
 784                                         regulator-name = "+VDDIO_SDMMC3";
 785                                         regulator-min-microvolt = <1800000>;
 786                                         regulator-max-microvolt = <3300000>;
 787                                 };
 788
 789                                 ldo7 {
 790                                         regulator-name = "+1.05V_RUN_CAM_REAR";
 791                                         regulator-min-microvolt = <1050000>;
 792                                         regulator-max-microvolt = <1050000>;
 793                                 };
 794
 795                                 ldo9 {
 796                                         regulator-name = "+2.8V_RUN_TOUCH";
 797                                         regulator-min-microvolt = <2800000>;
 798                                         regulator-max-microvolt = <2800000>;
 799                                 };
 800
 801                                 ldo10 {
 802                                         regulator-name = "+2.8V_RUN_CAM_AF";
 803                                         regulator-min-microvolt = <2800000>;
 804                                         regulator-max-microvolt = <2800000>;
 805                                 };
 806
 807                                 ldo11 {
 808                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
 809                                         regulator-min-microvolt = <1800000>;
 810                                         regulator-max-microvolt = <1800000>;
 811                                 };
 812                         };
 813                 };
 814         };
 815
 816         spi@0,7000d400 {
 817                 status = "okay";
 818
 819                 cros_ec: cros-ec@0 {
 820                         compatible = "google,cros-ec-spi";
 821                         spi-max-frequency = <4000000>;
 822                         interrupt-parent = <&gpio>;
 823                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
 824                         reg = <0>;
 825
 826                         google,cros-ec-spi-msg-delay = <2000>;
 827
 828                         i2c-tunnel {
 829                                 compatible = "google,cros-ec-i2c-tunnel";
 830                                 #address-cells = <1>;
 831                                 #size-cells = <0>;
 832
 833                                 google,remote-bus = <0>;
 834
 835                                 charger: bq24735@9 {
 836                                         compatible = "ti,bq24735";
 837                                         reg = <0x9>;
 838                                         interrupt-parent = <&gpio>;
 839                                         interrupts = <TEGRA_GPIO(J, 0)
 840                                                         GPIO_ACTIVE_HIGH>;
 841                                         ti,ac-detect-gpios = <&gpio
 842                                                         TEGRA_GPIO(J, 0)
 843                                                         GPIO_ACTIVE_HIGH>;
 844                                 };
 845
 846                                 battery: sbs-battery@b {
 847                                         compatible = "sbs,sbs-battery";
 848                                         reg = <0xb>;
 849                                         sbs,i2c-retry-count = <2>;
 850                                         sbs,poll-retry-count = <1>;
 851                                 };
 852                         };
 853                 };
 854         };
 855
 856         spi@0,7000da00 {
 857                 status = "okay";
 858                 spi-max-frequency = <25000000>;
 859                 spi-flash@0 {
 860                         compatible = "winbond,w25q32dw";
 861                         reg = <0>;
 862                         spi-max-frequency = <20000000>;
 863                 };
 864         };
 865
 866         pmc@0,7000e400 {
 867                 nvidia,invert-interrupt;
 868                 nvidia,suspend-mode = <1>;
 869                 nvidia,cpu-pwr-good-time = <500>;
 870                 nvidia,cpu-pwr-off-time = <300>;
 871                 nvidia,core-pwr-good-time = <641 3845>;
 872                 nvidia,core-pwr-off-time = <61036>;
 873                 nvidia,core-power-req-active-high;
 874                 nvidia,sys-clock-req-active-high;
 875         };
 876
 877         hda@0,70030000 {
 878                 status = "okay";
 879         };
 880
 881         sdhci@0,700b0400 {
 882                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
 883                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
 884                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 885                 status = "okay";
 886                 bus-width = <4>;
 887                 vqmmc-supply = <&vddio_sdmmc3>;
 888         };
 889
 890         sdhci@0,700b0600 {
 891                 status = "okay";
 892                 bus-width = <8>;
 893         };
 894
 895         ahub@0,70300000 {
 896                 i2s@0,70301100 {
 897                         status = "okay";
 898                 };
 899         };
 900
 901         usb@0,7d000000 {
 902                 status = "okay";
 903         };
 904
 905         usb-phy@0,7d000000 {
 906                 status = "okay";
 907                 vbus-supply = <&vdd_usb1_vbus>;
 908         };
 909
 910         usb@0,7d004000 {
 911                 status = "okay";
 912         };
 913
 914         usb-phy@0,7d004000 {
 915                 status = "okay";
 916                 vbus-supply = <&vdd_run_cam>;
 917         };
 918
 919         usb@0,7d008000 {
 920                 status = "okay";
 921         };
 922
 923         usb-phy@0,7d008000 {
 924                 status = "okay";
 925                 vbus-supply = <&vdd_usb3_vbus>;
 926         };
 927
 928         backlight: backlight {
 929                 compatible = "pwm-backlight";
 930
 931                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 932                 power-supply = <&vdd_led>;
 933                 pwms = <&pwm 1 1000000>;
 934
 935                 brightness-levels = <0 4 8 16 32 64 128 255>;
 936                 default-brightness-level = <6>;
 937         };
 938
 939         clocks {
 940                 compatible = "simple-bus";
 941                 #address-cells = <1>;
 942                 #size-cells = <0>;
 943
 944                 clk32k_in: clock@0 {
 945                         compatible = "fixed-clock";
 946                         reg = <0>;
 947                         #clock-cells = <0>;
 948                         clock-frequency = <32768>;
 949                 };
 950         };
 951
 952         gpio-keys {
 953                 compatible = "gpio-keys";
 954
 955                 power {
 956                         label = "Power";
 957                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
 958                         linux,code = <KEY_POWER>;
 959                         debounce-interval = <10>;
 960                         gpio-key,wakeup;
 961                 };
 962         };
 963
 964         panel: panel {
 965                 compatible = "lg,lp129qe", "simple-panel";
 966
 967                 backlight = <&backlight>;
 968                 ddc-i2c-bus = <&dpaux>;
 969         };
 970
 971         regulators {
 972                 compatible = "simple-bus";
 973                 #address-cells = <1>;
 974                 #size-cells = <0>;
 975
 976                 vdd_mux: regulator@0 {
 977                         compatible = "regulator-fixed";
 978                         reg = <0>;
 979                         regulator-name = "+VDD_MUX";
 980                         regulator-min-microvolt = <12000000>;
 981                         regulator-max-microvolt = <12000000>;
 982                         regulator-always-on;
 983                         regulator-boot-on;
 984                 };
 985
 986                 vdd_5v0_sys: regulator@1 {
 987                         compatible = "regulator-fixed";
 988                         reg = <1>;
 989                         regulator-name = "+5V_SYS";
 990                         regulator-min-microvolt = <5000000>;
 991                         regulator-max-microvolt = <5000000>;
 992                         regulator-always-on;
 993                         regulator-boot-on;
 994                         vin-supply = <&vdd_mux>;
 995                 };
 996
 997                 vdd_3v3_sys: regulator@2 {
 998                         compatible = "regulator-fixed";
 999                         reg = <2>;
1000                         regulator-name = "+3.3V_SYS";
1001                         regulator-min-microvolt = <3300000>;
1002                         regulator-max-microvolt = <3300000>;
1003                         regulator-always-on;
1004                         regulator-boot-on;
1005                         vin-supply = <&vdd_mux>;
1006                 };
1007
1008                 vdd_3v3_run: regulator@3 {
1009                         compatible = "regulator-fixed";
1010                         reg = <3>;
1011                         regulator-name = "+3.3V_RUN";
1012                         regulator-min-microvolt = <3300000>;
1013                         regulator-max-microvolt = <3300000>;
1014                         regulator-always-on;
1015                         regulator-boot-on;
1016                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1017                         enable-active-high;
1018                         vin-supply = <&vdd_3v3_sys>;
1019                 };
1020
1021                 vdd_3v3_hdmi: regulator@4 {
1022                         compatible = "regulator-fixed";
1023                         reg = <4>;
1024                         regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1025                         regulator-min-microvolt = <3300000>;
1026                         regulator-max-microvolt = <3300000>;
1027                         vin-supply = <&vdd_3v3_run>;
1028                 };
1029
1030                 vdd_led: regulator@5 {
1031                         compatible = "regulator-fixed";
1032                         reg = <5>;
1033                         regulator-name = "+VDD_LED";
1034                         gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1035                         enable-active-high;
1036                         vin-supply = <&vdd_mux>;
1037                 };
1038
1039                 vdd_5v0_ts: regulator@6 {
1040                         compatible = "regulator-fixed";
1041                         reg = <6>;
1042                         regulator-name = "+5V_VDD_TS_SW";
1043                         regulator-min-microvolt = <5000000>;
1044                         regulator-max-microvolt = <5000000>;
1045                         regulator-boot-on;
1046                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1047                         enable-active-high;
1048                         vin-supply = <&vdd_5v0_sys>;
1049                 };
1050
1051                 vdd_usb1_vbus: regulator@7 {
1052                         compatible = "regulator-fixed";
1053                         reg = <7>;
1054                         regulator-name = "+5V_USB_HS";
1055                         regulator-min-microvolt = <5000000>;
1056                         regulator-max-microvolt = <5000000>;
1057                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1058                         enable-active-high;
1059                         gpio-open-drain;
1060                         vin-supply = <&vdd_5v0_sys>;
1061                 };
1062
1063                 vdd_usb3_vbus: regulator@8 {
1064                         compatible = "regulator-fixed";
1065                         reg = <8>;
1066                         regulator-name = "+5V_USB_SS";
1067                         regulator-min-microvolt = <5000000>;
1068                         regulator-max-microvolt = <5000000>;
1069                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1070                         enable-active-high;
1071                         gpio-open-drain;
1072                         vin-supply = <&vdd_5v0_sys>;
1073                 };
1074
1075                 vdd_3v3_panel: regulator@9 {
1076                         compatible = "regulator-fixed";
1077                         reg = <9>;
1078                         regulator-name = "+3.3V_PANEL";
1079                         regulator-min-microvolt = <3300000>;
1080                         regulator-max-microvolt = <3300000>;
1081                         gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1082                         enable-active-high;
1083                         vin-supply = <&vdd_3v3_run>;
1084                 };
1085
1086                 vdd_3v3_lp0: regulator@10 {
1087                         compatible = "regulator-fixed";
1088                         reg = <10>;
1089                         regulator-name = "+3.3V_LP0";
1090                         regulator-min-microvolt = <3300000>;
1091                         regulator-max-microvolt = <3300000>;
1092                         /*
1093                          * TODO: find a way to wire this up with the USB EHCI
1094                          * controllers so that it can be enabled on demand.
1095                          */
1096                         regulator-always-on;
1097                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1098                         enable-active-high;
1099                         vin-supply = <&vdd_3v3_sys>;
1100                 };
1101
1102                 vdd_hdmi_pll: regulator@11 {
1103                         compatible = "regulator-fixed";
1104                         reg = <11>;
1105                         regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1106                         regulator-min-microvolt = <1050000>;
1107                         regulator-max-microvolt = <1050000>;
1108                         gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1109                         vin-supply = <&vdd_1v05_run>;
1110                 };
1111
1112                 vdd_5v0_hdmi: regulator@12 {
1113                         compatible = "regulator-fixed";
1114                         reg = <12>;
1115                         regulator-name = "+5V_HDMI_CON";
1116                         regulator-min-microvolt = <5000000>;
1117                         regulator-max-microvolt = <5000000>;
1118                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1119                         enable-active-high;
1120                         vin-supply = <&vdd_5v0_sys>;
1121                 };
1122         };
1123
1124         sound {
1125                 compatible = "nvidia,tegra-audio-max98090-venice2",
1126                              "nvidia,tegra-audio-max98090";
1127                 nvidia,model = "NVIDIA Tegra Venice2";
1128
1129                 nvidia,audio-routing =
1130                         "Headphones", "HPR",
1131                         "Headphones", "HPL",
1132                         "Speakers", "SPKR",
1133                         "Speakers", "SPKL",
1134                         "Mic Jack", "MICBIAS",
1135                         "IN34", "Mic Jack";
1136
1137                 nvidia,i2s-controller = <&tegra_i2s1>;
1138                 nvidia,audio-codec = <&acodec>;
1139
1140                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1141                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1142                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1143                 clock-names = "pll_a", "pll_a_out0", "mclk";
1144         };
1145 };
1146
1147 #include "cros-ec-keyboard.dtsi"