ARM: dts: mt6589: Change compatible string for GIC
[cascardo/linux.git] / arch / arm / boot / dts / tegra20-trimslice.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
5
6 / {
7         model = "Compulab TrimSlice board";
8         compatible = "compulab,trimslice", "nvidia,tegra20";
9
10         aliases {
11                 rtc0 = "/i2c@7000c500/rtc@56";
12                 rtc1 = "/rtc@7000e000";
13         };
14
15         memory {
16                 reg = <0x00000000 0x40000000>;
17         };
18
19         host1x@50000000 {
20                 hdmi@54280000 {
21                         status = "okay";
22
23                         vdd-supply = <&hdmi_vdd_reg>;
24                         pll-supply = <&hdmi_pll_reg>;
25
26                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
27                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
28                                 GPIO_ACTIVE_HIGH>;
29                 };
30         };
31
32         pinmux@70000014 {
33                 pinctrl-names = "default";
34                 pinctrl-0 = <&state_default>;
35
36                 state_default: pinmux {
37                         ata {
38                                 nvidia,pins = "ata";
39                                 nvidia,function = "ide";
40                         };
41                         atb {
42                                 nvidia,pins = "atb", "gma";
43                                 nvidia,function = "sdio4";
44                         };
45                         atc {
46                                 nvidia,pins = "atc", "gmb";
47                                 nvidia,function = "nand";
48                         };
49                         atd {
50                                 nvidia,pins = "atd", "ate", "gme", "pta";
51                                 nvidia,function = "gmi";
52                         };
53                         cdev1 {
54                                 nvidia,pins = "cdev1";
55                                 nvidia,function = "plla_out";
56                         };
57                         cdev2 {
58                                 nvidia,pins = "cdev2";
59                                 nvidia,function = "pllp_out4";
60                         };
61                         crtp {
62                                 nvidia,pins = "crtp";
63                                 nvidia,function = "crt";
64                         };
65                         csus {
66                                 nvidia,pins = "csus";
67                                 nvidia,function = "vi_sensor_clk";
68                         };
69                         dap1 {
70                                 nvidia,pins = "dap1";
71                                 nvidia,function = "dap1";
72                         };
73                         dap2 {
74                                 nvidia,pins = "dap2";
75                                 nvidia,function = "dap2";
76                         };
77                         dap3 {
78                                 nvidia,pins = "dap3";
79                                 nvidia,function = "dap3";
80                         };
81                         dap4 {
82                                 nvidia,pins = "dap4";
83                                 nvidia,function = "dap4";
84                         };
85                         ddc {
86                                 nvidia,pins = "ddc";
87                                 nvidia,function = "i2c2";
88                         };
89                         dta {
90                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
91                                 nvidia,function = "vi";
92                         };
93                         dtf {
94                                 nvidia,pins = "dtf";
95                                 nvidia,function = "i2c3";
96                         };
97                         gmc {
98                                 nvidia,pins = "gmc", "gmd";
99                                 nvidia,function = "sflash";
100                         };
101                         gpu {
102                                 nvidia,pins = "gpu";
103                                 nvidia,function = "uarta";
104                         };
105                         gpu7 {
106                                 nvidia,pins = "gpu7";
107                                 nvidia,function = "rtck";
108                         };
109                         gpv {
110                                 nvidia,pins = "gpv", "slxa", "slxk";
111                                 nvidia,function = "pcie";
112                         };
113                         hdint {
114                                 nvidia,pins = "hdint";
115                                 nvidia,function = "hdmi";
116                         };
117                         i2cp {
118                                 nvidia,pins = "i2cp";
119                                 nvidia,function = "i2cp";
120                         };
121                         irrx {
122                                 nvidia,pins = "irrx", "irtx";
123                                 nvidia,function = "uartb";
124                         };
125                         kbca {
126                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
127                                         "kbce", "kbcf";
128                                 nvidia,function = "kbc";
129                         };
130                         lcsn {
131                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
132                                         "ld3", "ld4", "ld5", "ld6", "ld7",
133                                         "ld8", "ld9", "ld10", "ld11", "ld12",
134                                         "ld13", "ld14", "ld15", "ld16", "ld17",
135                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
136                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
137                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
138                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
139                                         "lvs";
140                                 nvidia,function = "displaya";
141                         };
142                         owc {
143                                 nvidia,pins = "owc", "uac";
144                                 nvidia,function = "rsvd2";
145                         };
146                         pmc {
147                                 nvidia,pins = "pmc";
148                                 nvidia,function = "pwr_on";
149                         };
150                         rm {
151                                 nvidia,pins = "rm";
152                                 nvidia,function = "i2c1";
153                         };
154                         sdb {
155                                 nvidia,pins = "sdb", "sdc", "sdd";
156                                 nvidia,function = "pwm";
157                         };
158                         sdio1 {
159                                 nvidia,pins = "sdio1";
160                                 nvidia,function = "sdio1";
161                         };
162                         slxc {
163                                 nvidia,pins = "slxc", "slxd";
164                                 nvidia,function = "sdio3";
165                         };
166                         spdi {
167                                 nvidia,pins = "spdi", "spdo";
168                                 nvidia,function = "spdif";
169                         };
170                         spia {
171                                 nvidia,pins = "spia", "spib", "spic";
172                                 nvidia,function = "spi2";
173                         };
174                         spid {
175                                 nvidia,pins = "spid", "spie", "spif";
176                                 nvidia,function = "spi1";
177                         };
178                         spig {
179                                 nvidia,pins = "spig", "spih";
180                                 nvidia,function = "spi2_alt";
181                         };
182                         uaa {
183                                 nvidia,pins = "uaa", "uab", "uda";
184                                 nvidia,function = "ulpi";
185                         };
186                         uad {
187                                 nvidia,pins = "uad";
188                                 nvidia,function = "irda";
189                         };
190                         uca {
191                                 nvidia,pins = "uca", "ucb";
192                                 nvidia,function = "uartc";
193                         };
194                         conf_ata {
195                                 nvidia,pins = "ata", "atc", "atd", "ate",
196                                         "crtp", "dap2", "dap3", "dap4", "dta",
197                                         "dtb", "dtc", "dtd", "dte", "gmb",
198                                         "gme", "i2cp", "pta", "slxc", "slxd",
199                                         "spdi", "spdo", "uda";
200                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
201                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
202                         };
203                         conf_atb {
204                                 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
205                                         "gma", "gmc", "gmd", "gpu", "gpu7",
206                                         "gpv", "sdio1", "slxa", "slxk", "uac";
207                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
209                         };
210                         conf_ck32 {
211                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
212                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
213                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214                         };
215                         conf_csus {
216                                 nvidia,pins = "csus", "spia", "spib",
217                                         "spid", "spif";
218                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
219                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
220                         };
221                         conf_ddc {
222                                 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
223                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
224                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
225                         };
226                         conf_hdint {
227                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
228                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
229                                         "lvp0", "pmc";
230                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
231                         };
232                         conf_irrx {
233                                 nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
234                                         "kbcc", "kbcd", "kbce", "kbcf", "owc",
235                                         "spic", "spie", "spig", "spih", "uaa",
236                                         "uab", "uad", "uca", "ucb";
237                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
238                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
239                         };
240                         conf_lc {
241                                 nvidia,pins = "lc", "ls";
242                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
243                         };
244                         conf_ld0 {
245                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
246                                         "ld5", "ld6", "ld7", "ld8", "ld9",
247                                         "ld10", "ld11", "ld12", "ld13", "ld14",
248                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
249                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
250                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
251                                         "lvs", "sdb";
252                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
253                         };
254                         conf_ld17_0 {
255                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
256                                         "ld23_22";
257                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
258                         };
259                         conf_spif {
260                                 nvidia,pins = "spif";
261                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
262                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
263                         };
264                 };
265         };
266
267         i2s@70002800 {
268                 status = "okay";
269         };
270
271         serial@70006000 {
272                 status = "okay";
273         };
274
275         dvi_ddc: i2c@7000c000 {
276                 status = "okay";
277                 clock-frequency = <100000>;
278         };
279
280         spi@7000c380 {
281                 status = "okay";
282                 spi-max-frequency = <48000000>;
283                 spi-flash@0 {
284                         compatible = "winbond,w25q80bl";
285                         reg = <0>;
286                         spi-max-frequency = <48000000>;
287                 };
288         };
289
290         hdmi_ddc: i2c@7000c400 {
291                 status = "okay";
292                 clock-frequency = <100000>;
293         };
294
295         i2c@7000c500 {
296                 status = "okay";
297                 clock-frequency = <400000>;
298
299                 codec: codec@1a {
300                         compatible = "ti,tlv320aic23";
301                         reg = <0x1a>;
302                 };
303
304                 rtc@56 {
305                         compatible = "emmicro,em3027";
306                         reg = <0x56>;
307                 };
308         };
309
310         pmc@7000e400 {
311                 nvidia,suspend-mode = <1>;
312                 nvidia,cpu-pwr-good-time = <5000>;
313                 nvidia,cpu-pwr-off-time = <5000>;
314                 nvidia,core-pwr-good-time = <3845 3845>;
315                 nvidia,core-pwr-off-time = <3875>;
316                 nvidia,sys-clock-req-active-high;
317         };
318
319         pcie-controller@80003000 {
320                 status = "okay";
321
322                 avdd-pex-supply = <&pci_vdd_reg>;
323                 vdd-pex-supply = <&pci_vdd_reg>;
324                 avdd-pex-pll-supply = <&pci_vdd_reg>;
325                 avdd-plle-supply = <&pci_vdd_reg>;
326                 vddio-pex-clk-supply = <&pci_clk_reg>;
327
328                 pci@1,0 {
329                         status = "okay";
330                 };
331         };
332
333         usb@c5000000 {
334                 status = "okay";
335         };
336
337         usb-phy@c5000000 {
338                 status = "okay";
339                 vbus-supply = <&vbus_reg>;
340         };
341
342         usb@c5004000 {
343                 status = "okay";
344                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
345                         GPIO_ACTIVE_LOW>;
346         };
347
348         usb-phy@c5004000 {
349                 status = "okay";
350                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
351                         GPIO_ACTIVE_LOW>;
352         };
353
354         usb@c5008000 {
355                 status = "okay";
356         };
357
358         usb-phy@c5008000 {
359                 status = "okay";
360         };
361
362         sdhci@c8000000 {
363                 status = "okay";
364                 bus-width = <4>;
365         };
366
367         sdhci@c8000600 {
368                 status = "okay";
369                 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
370                 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
371                 bus-width = <4>;
372         };
373
374         clocks {
375                 compatible = "simple-bus";
376                 #address-cells = <1>;
377                 #size-cells = <0>;
378
379                 clk32k_in: clock@0 {
380                         compatible = "fixed-clock";
381                         reg=<0>;
382                         #clock-cells = <0>;
383                         clock-frequency = <32768>;
384                 };
385         };
386
387         gpio-keys {
388                 compatible = "gpio-keys";
389
390                 power {
391                         label = "Power";
392                         gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
393                         linux,code = <KEY_POWER>;
394                         gpio-key,wakeup;
395                 };
396         };
397
398         poweroff {
399                 compatible = "gpio-poweroff";
400                 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
401         };
402
403         regulators {
404                 compatible = "simple-bus";
405                 #address-cells = <1>;
406                 #size-cells = <0>;
407
408                 hdmi_vdd_reg: regulator@0 {
409                         compatible = "regulator-fixed";
410                         reg = <0>;
411                         regulator-name = "avdd_hdmi";
412                         regulator-min-microvolt = <3300000>;
413                         regulator-max-microvolt = <3300000>;
414                         regulator-always-on;
415                 };
416
417                 hdmi_pll_reg: regulator@1 {
418                         compatible = "regulator-fixed";
419                         reg = <1>;
420                         regulator-name = "avdd_hdmi_pll";
421                         regulator-min-microvolt = <1800000>;
422                         regulator-max-microvolt = <1800000>;
423                         regulator-always-on;
424                 };
425
426                 vbus_reg: regulator@2 {
427                         compatible = "regulator-fixed";
428                         reg = <2>;
429                         regulator-name = "usb1_vbus";
430                         regulator-min-microvolt = <5000000>;
431                         regulator-max-microvolt = <5000000>;
432                         enable-active-high;
433                         gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
434                         regulator-always-on;
435                         regulator-boot-on;
436                 };
437
438                 pci_clk_reg: regulator@3 {
439                         compatible = "regulator-fixed";
440                         reg = <3>;
441                         regulator-name = "pci_clk";
442                         regulator-min-microvolt = <3300000>;
443                         regulator-max-microvolt = <3300000>;
444                         regulator-always-on;
445                 };
446
447                 pci_vdd_reg: regulator@4 {
448                         compatible = "regulator-fixed";
449                         reg = <4>;
450                         regulator-name = "pci_vdd";
451                         regulator-min-microvolt = <1050000>;
452                         regulator-max-microvolt = <1050000>;
453                         regulator-always-on;
454                 };
455         };
456
457         sound {
458                 compatible = "nvidia,tegra-audio-trimslice";
459                 nvidia,i2s-controller = <&tegra_i2s1>;
460                 nvidia,audio-codec = <&codec>;
461
462                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
463                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
464                          <&tegra_car TEGRA20_CLK_CDEV1>;
465                 clock-names = "pll_a", "pll_a_out0", "mclk";
466         };
467 };