arch/arm/mach-imx/mach-imx6sx.c

   1 /*
   2  * Copyright 2014 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/irqchip.h>
  10 #include <linux/of_platform.h>
  11 #include <linux/phy.h>
  12 #include <linux/regmap.h>
  13 #include <linux/mfd/syscon.h>
  14 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  15 #include <linux/fec.h>
  16 #include <linux/netdevice.h>
  17 #include <asm/mach/arch.h>
  18 #include <asm/mach/map.h>
  19
  20 #include "common.h"
  21 #include "cpuidle.h"
  22
  23 static struct fec_platform_data fec_pdata[2];
  24
  25 static void imx6sx_fec1_sleep_enable(int enabled)
  26 {
  27         struct regmap *gpr;
  28
  29         gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
  30         if (!IS_ERR(gpr)) {
  31                 if (enabled)
  32                         regmap_update_bits(gpr, IOMUXC_GPR4,
  33                                            IMX6SX_GPR4_FEC_ENET1_STOP_REQ,
  34                                            IMX6SX_GPR4_FEC_ENET1_STOP_REQ);
  35                 else
  36                         regmap_update_bits(gpr, IOMUXC_GPR4,
  37                                            IMX6SX_GPR4_FEC_ENET1_STOP_REQ, 0);
  38         } else
  39                 pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
  40 }
  41
  42 static void imx6sx_fec2_sleep_enable(int enabled)
  43 {
  44         struct regmap *gpr;
  45
  46         gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
  47         if (!IS_ERR(gpr)) {
  48                 if (enabled)
  49                         regmap_update_bits(gpr, IOMUXC_GPR4,
  50                                            IMX6SX_GPR4_FEC_ENET2_STOP_REQ,
  51                                            IMX6SX_GPR4_FEC_ENET2_STOP_REQ);
  52                 else
  53                         regmap_update_bits(gpr, IOMUXC_GPR4,
  54                                            IMX6SX_GPR4_FEC_ENET2_STOP_REQ, 0);
  55         } else
  56                 pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
  57 }
  58
  59 static void __init imx6sx_enet_plt_init(void)
  60 {
  61         struct device_node *np;
  62
  63         np = of_find_node_by_path("/soc/aips-bus@02100000/ethernet@02188000");
  64         if (np && of_get_property(np, "fsl,magic-packet", NULL))
  65                 fec_pdata[0].sleep_mode_enable = imx6sx_fec1_sleep_enable;
  66         np = of_find_node_by_path("/soc/aips-bus@02100000/ethernet@021b4000");
  67         if (np && of_get_property(np, "fsl,magic-packet", NULL))
  68                 fec_pdata[1].sleep_mode_enable = imx6sx_fec2_sleep_enable;
  69 }
  70
  71 static int ar8031_phy_fixup(struct phy_device *dev)
  72 {
  73         u16 val;
  74
  75         /* Set RGMII IO voltage to 1.8V */
  76         phy_write(dev, 0x1d, 0x1f);
  77         phy_write(dev, 0x1e, 0x8);
  78
  79         /* introduce tx clock delay */
  80         phy_write(dev, 0x1d, 0x5);
  81         val = phy_read(dev, 0x1e);
  82         val |= 0x0100;
  83         phy_write(dev, 0x1e, val);
  84
  85         return 0;
  86 }
  87
  88 #define PHY_ID_AR8031   0x004dd074
  89 static void __init imx6sx_enet_phy_init(void)
  90 {
  91         if (IS_BUILTIN(CONFIG_PHYLIB))
  92                 phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
  93                                            ar8031_phy_fixup);
  94 }
  95
  96 static void __init imx6sx_enet_clk_sel(void)
  97 {
  98         struct regmap *gpr;
  99
 100         gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
 101         if (!IS_ERR(gpr)) {
 102                 regmap_update_bits(gpr, IOMUXC_GPR1,
 103                                    IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);
 104                 regmap_update_bits(gpr, IOMUXC_GPR1,
 105                                    IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0);
 106         } else {
 107                 pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
 108         }
 109 }
 110
 111 static inline void imx6sx_enet_init(void)
 112 {
 113         imx6sx_enet_phy_init();
 114         imx6sx_enet_clk_sel();
 115 }
 116
 117 static void __init imx6sx_init_machine(void)
 118 {
 119         struct device *parent;
 120
 121         parent = imx_soc_device_init();
 122         if (parent == NULL)
 123                 pr_warn("failed to initialize soc device\n");
 124
 125         of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
 126
 127         imx6sx_enet_init();
 128         imx_anatop_init();
 129         imx6sx_pm_init();
 130 }
 131
 132 static void __init imx6sx_init_irq(void)
 133 {
 134         imx_init_revision_from_anatop();
 135         imx_init_l2cache();
 136         imx_src_init();
 137         imx_gpc_init();
 138         irqchip_init();
 139 }
 140
 141 static void __init imx6sx_init_late(void)
 142 {
 143         imx6q_cpuidle_init();
 144
 145         if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
 146                 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
 147 }
 148
 149 static const char * const imx6sx_dt_compat[] __initconst = {
 150         "fsl,imx6sx",
 151         NULL,
 152 };
 153
 154 DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)")
 155         .init_irq       = imx6sx_init_irq,
 156         .init_machine   = imx6sx_init_machine,
 157         .dt_compat      = imx6sx_dt_compat,
 158         .init_late      = imx6sx_init_late,
 159 MACHINE_END