2 * linux/arch/arm/mach-integrator/integrator_cp.c
4 * Copyright (C) 2003 Deep Blue Solutions Ltd
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/list.h>
14 #include <linux/platform_device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/string.h>
17 #include <linux/device.h>
18 #include <linux/amba/bus.h>
19 #include <linux/amba/kmi.h>
20 #include <linux/amba/mmci.h>
22 #include <linux/irqchip.h>
23 #include <linux/gfp.h>
24 #include <linux/of_irq.h>
25 #include <linux/of_address.h>
26 #include <linux/of_platform.h>
27 #include <linux/sched_clock.h>
29 #include <asm/setup.h>
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32 #include <asm/mach/irq.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/time.h>
40 /* Base address to the CP controller */
41 static void __iomem *intcp_con_base;
45 * f1000000 10000000 Core module registers
46 * f1300000 13000000 Counter/Timer
47 * f1400000 14000000 Interrupt controller
48 * f1600000 16000000 UART 0
49 * f1700000 17000000 UART 1
50 * f1a00000 1a000000 Debug LEDs
51 * fc900000 c9000000 GPIO
52 * fca00000 ca000000 SIC
55 static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
57 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
58 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
62 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
63 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
67 .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
68 .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
72 .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
73 .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
77 .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
78 .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
82 .virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),
83 .pfn = __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE),
87 .virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),
88 .pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
94 static void __init intcp_map_io(void)
96 iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
100 * It seems that the card insertion interrupt remains active after
101 * we've acknowledged it. We therefore ignore the interrupt, and
102 * rely on reading it from the SIC. This also means that we must
103 * clear the latched interrupt.
105 static unsigned int mmc_status(struct device *dev)
107 unsigned int status = readl(__io_address(0xca000000 + 4));
108 writel(8, intcp_con_base + 8);
113 static struct mmci_platform_data mmc_data = {
114 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
115 .status = mmc_status,
120 #define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
122 static u64 notrace intcp_read_sched_clock(void)
124 return readl(REFCOUNTER);
127 static void __init intcp_init_early(void)
129 sched_clock_register(intcp_read_sched_clock, 32, 24000000);
132 static void __init intcp_init_irq_of(void)
139 * For the Device Tree, add in the UART, MMC and CLCD specifics as AUXDATA
140 * and enforce the bus names since these are used for clock lookups.
142 static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
143 OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,
148 static const struct of_device_id intcp_syscon_match[] = {
149 { .compatible = "arm,integrator-cp-syscon"},
153 static void __init intcp_init_of(void)
155 struct device_node *cpcon;
157 cpcon = of_find_matching_node(NULL, intcp_syscon_match);
161 intcp_con_base = of_iomap(cpcon, 0);
165 of_platform_default_populate(NULL, intcp_auxdata_lookup, NULL);
168 static const char * intcp_dt_board_compat[] = {
173 DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
174 .reserve = integrator_reserve,
175 .map_io = intcp_map_io,
176 .init_early = intcp_init_early,
177 .init_irq = intcp_init_irq_of,
178 .init_machine = intcp_init_of,
179 .dt_compat = intcp_dt_board_compat,