arch/arm/mach-shmobile/setup-r8a7791.c

   1 /*
   2  * r8a7791 processor support
   3  *
   4  * Copyright (C) 2013  Renesas Electronics Corporation
   5  * Copyright (C) 2013  Renesas Solutions Corp.
   6  * Copyright (C) 2013  Magnus Damm
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/irq.h>
  19 #include <linux/kernel.h>
  20 #include <linux/of_platform.h>
  21 #include <linux/platform_data/gpio-rcar.h>
  22 #include <linux/platform_data/irq-renesas-irqc.h>
  23 #include <linux/serial_sci.h>
  24 #include <linux/sh_timer.h>
  25
  26 #include <asm/mach/arch.h>
  27
  28 #include "common.h"
  29 #include "irqs.h"
  30 #include "r8a7791.h"
  31 #include "rcar-gen2.h"
  32
  33 static const struct resource pfc_resources[] __initconst = {
  34         DEFINE_RES_MEM(0xe6060000, 0x250),
  35 };
  36
  37 #define r8a7791_register_pfc()                                          \
  38         platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
  39                                         ARRAY_SIZE(pfc_resources))
  40
  41 #define R8A7791_GPIO(idx, base, nr)                                     \
  42 static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
  43         DEFINE_RES_MEM((base), 0x50),                                   \
  44         DEFINE_RES_IRQ(gic_spi(4 + (idx))),                             \
  45 };                                                                      \
  46                                                                         \
  47 static const struct gpio_rcar_config                                    \
  48 r8a7791_gpio##idx##_platform_data __initconst = {                       \
  49         .gpio_base      = 32 * (idx),                                   \
  50         .irq_base       = 0,                                            \
  51         .number_of_pins = (nr),                                         \
  52         .pctl_name      = "pfc-r8a7791",                                \
  53         .has_both_edge_trigger = 1,                                     \
  54 };                                                                      \
  55
  56 R8A7791_GPIO(0, 0xe6050000, 32);
  57 R8A7791_GPIO(1, 0xe6051000, 32);
  58 R8A7791_GPIO(2, 0xe6052000, 32);
  59 R8A7791_GPIO(3, 0xe6053000, 32);
  60 R8A7791_GPIO(4, 0xe6054000, 32);
  61 R8A7791_GPIO(5, 0xe6055000, 32);
  62 R8A7791_GPIO(6, 0xe6055400, 32);
  63 R8A7791_GPIO(7, 0xe6055800, 26);
  64
  65 #define r8a7791_register_gpio(idx)                                      \
  66         platform_device_register_resndata(NULL, "gpio_rcar", idx,       \
  67                 r8a7791_gpio##idx##_resources,                          \
  68                 ARRAY_SIZE(r8a7791_gpio##idx##_resources),              \
  69                 &r8a7791_gpio##idx##_platform_data,                     \
  70                 sizeof(r8a7791_gpio##idx##_platform_data))
  71
  72 void __init r8a7791_pinmux_init(void)
  73 {
  74         r8a7791_register_pfc();
  75         r8a7791_register_gpio(0);
  76         r8a7791_register_gpio(1);
  77         r8a7791_register_gpio(2);
  78         r8a7791_register_gpio(3);
  79         r8a7791_register_gpio(4);
  80         r8a7791_register_gpio(5);
  81         r8a7791_register_gpio(6);
  82         r8a7791_register_gpio(7);
  83 }
  84
  85 #define __R8A7791_SCIF(scif_type, index, baseaddr, irq)                 \
  86 static struct plat_sci_port scif##index##_platform_data = {             \
  87         .type           = scif_type,                                    \
  88         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,              \
  89         .scscr          = SCSCR_RE | SCSCR_TE,                          \
  90 };                                                                      \
  91                                                                         \
  92 static struct resource scif##index##_resources[] = {                    \
  93         DEFINE_RES_MEM(baseaddr, 0x100),                                \
  94         DEFINE_RES_IRQ(irq),                                            \
  95 }
  96
  97 #define R8A7791_SCIF(index, baseaddr, irq)                              \
  98         __R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
  99
 100 #define R8A7791_SCIFA(index, baseaddr, irq)                             \
 101         __R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
 102
 103 #define R8A7791_SCIFB(index, baseaddr, irq)                             \
 104         __R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
 105
 106 R8A7791_SCIFA(0,  0xe6c40000, gic_spi(144)); /* SCIFA0 */
 107 R8A7791_SCIFA(1,  0xe6c50000, gic_spi(145)); /* SCIFA1 */
 108 R8A7791_SCIFB(2,  0xe6c20000, gic_spi(148)); /* SCIFB0 */
 109 R8A7791_SCIFB(3,  0xe6c30000, gic_spi(149)); /* SCIFB1 */
 110 R8A7791_SCIFB(4,  0xe6ce0000, gic_spi(150)); /* SCIFB2 */
 111 R8A7791_SCIFA(5,  0xe6c60000, gic_spi(151)); /* SCIFA2 */
 112 R8A7791_SCIF(6,   0xe6e60000, gic_spi(152)); /* SCIF0 */
 113 R8A7791_SCIF(7,   0xe6e68000, gic_spi(153)); /* SCIF1 */
 114 R8A7791_SCIF(8,   0xe6e58000, gic_spi(22)); /* SCIF2 */
 115 R8A7791_SCIF(9,   0xe6ea8000, gic_spi(23)); /* SCIF3 */
 116 R8A7791_SCIF(10,  0xe6ee0000, gic_spi(24)); /* SCIF4 */
 117 R8A7791_SCIF(11,  0xe6ee8000, gic_spi(25)); /* SCIF5 */
 118 R8A7791_SCIFA(12, 0xe6c70000, gic_spi(29)); /* SCIFA3 */
 119 R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
 120 R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
 121
 122 #define r8a7791_register_scif(index)                                           \
 123         platform_device_register_resndata(NULL, "sh-sci", index,               \
 124                                           scif##index##_resources,             \
 125                                           ARRAY_SIZE(scif##index##_resources), \
 126                                           &scif##index##_platform_data,        \
 127                                           sizeof(scif##index##_platform_data))
 128
 129 static struct sh_timer_config cmt0_platform_data = {
 130         .channels_mask = 0x60,
 131 };
 132
 133 static struct resource cmt0_resources[] = {
 134         DEFINE_RES_MEM(0xffca0000, 0x1004),
 135         DEFINE_RES_IRQ(gic_spi(142)),
 136 };
 137
 138 #define r8a7791_register_cmt(idx)                                       \
 139         platform_device_register_resndata(NULL, "sh-cmt-48-gen2",       \
 140                                           idx, cmt##idx##_resources,    \
 141                                           ARRAY_SIZE(cmt##idx##_resources), \
 142                                           &cmt##idx##_platform_data,    \
 143                                           sizeof(struct sh_timer_config))
 144
 145 static struct renesas_irqc_config irqc0_data = {
 146         .irq_base = irq_pin(0), /* IRQ0 -> IRQ9 */
 147 };
 148
 149 static struct resource irqc0_resources[] = {
 150         DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
 151         DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
 152         DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
 153         DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
 154         DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
 155         DEFINE_RES_IRQ(gic_spi(12)), /* IRQ4 */
 156         DEFINE_RES_IRQ(gic_spi(13)), /* IRQ5 */
 157         DEFINE_RES_IRQ(gic_spi(14)), /* IRQ6 */
 158         DEFINE_RES_IRQ(gic_spi(15)), /* IRQ7 */
 159         DEFINE_RES_IRQ(gic_spi(16)), /* IRQ8 */
 160         DEFINE_RES_IRQ(gic_spi(17)), /* IRQ9 */
 161 };
 162
 163 #define r8a7791_register_irqc(idx)                                      \
 164         platform_device_register_resndata(NULL, "renesas_irqc",         \
 165                                           idx, irqc##idx##_resources,   \
 166                                           ARRAY_SIZE(irqc##idx##_resources), \
 167                                           &irqc##idx##_data,            \
 168                                           sizeof(struct renesas_irqc_config))
 169
 170 static const struct resource thermal_resources[] __initconst = {
 171         DEFINE_RES_MEM(0xe61f0000, 0x14),
 172         DEFINE_RES_MEM(0xe61f0100, 0x38),
 173         DEFINE_RES_IRQ(gic_spi(69)),
 174 };
 175
 176 #define r8a7791_register_thermal()                                      \
 177         platform_device_register_simple("rcar_thermal", -1,             \
 178                                         thermal_resources,              \
 179                                         ARRAY_SIZE(thermal_resources))
 180
 181 void __init r8a7791_add_standard_devices(void)
 182 {
 183         r8a7791_register_scif(0);
 184         r8a7791_register_scif(1);
 185         r8a7791_register_scif(2);
 186         r8a7791_register_scif(3);
 187         r8a7791_register_scif(4);
 188         r8a7791_register_scif(5);
 189         r8a7791_register_scif(6);
 190         r8a7791_register_scif(7);
 191         r8a7791_register_scif(8);
 192         r8a7791_register_scif(9);
 193         r8a7791_register_scif(10);
 194         r8a7791_register_scif(11);
 195         r8a7791_register_scif(12);
 196         r8a7791_register_scif(13);
 197         r8a7791_register_scif(14);
 198         r8a7791_register_cmt(0);
 199         r8a7791_register_irqc(0);
 200         r8a7791_register_thermal();
 201 }
 202
 203 #ifdef CONFIG_USE_OF
 204 static const char *r8a7791_boards_compat_dt[] __initdata = {
 205         "renesas,r8a7791",
 206         NULL,
 207 };
 208
 209 DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
 210         .smp            = smp_ops(r8a7791_smp_ops),
 211         .init_early     = shmobile_init_delay,
 212         .init_time      = rcar_gen2_timer_init,
 213         .init_late      = shmobile_init_late,
 214         .reserve        = rcar_gen2_reserve,
 215         .dt_compat      = r8a7791_boards_compat_dt,
 216 MACHINE_END
 217 #endif /* CONFIG_USE_OF */