Merge branch 'renesas/cleanup2' into next/soc
[cascardo/linux.git] / arch / arm / mach-shmobile / smp-r8a7790.c
1 /*
2  * SMP support for r8a7790
3  *
4  * Copyright (C) 2012-2013 Renesas Solutions Corp.
5  * Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/io.h>
20
21 #include <asm/smp_plat.h>
22
23 #include "common.h"
24 #include "pm-rcar.h"
25 #include "r8a7790.h"
26
27 #define RST             0xe6160000
28 #define CA15BAR         0x0020
29 #define CA7BAR          0x0030
30 #define CA15RESCNT      0x0040
31 #define CA7RESCNT       0x0044
32 #define MERAM           0xe8080000
33
34 static struct rcar_sysc_ch r8a7790_ca15_scu = {
35         .chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
36         .isr_bit = 12, /* CA15-SCU */
37 };
38
39 static struct rcar_sysc_ch r8a7790_ca7_scu = {
40         .chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
41         .isr_bit = 21, /* CA7-SCU */
42 };
43
44 static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
45 {
46         void __iomem *p;
47         u32 bar;
48
49         /* let APMU code install data related to shmobile_boot_vector */
50         shmobile_smp_apmu_prepare_cpus(max_cpus);
51
52         /* MERAM for jump stub, because BAR requires 256KB aligned address */
53         p = ioremap_nocache(MERAM, shmobile_boot_size);
54         memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
55         iounmap(p);
56
57         /* setup reset vectors */
58         p = ioremap_nocache(RST, 0x63);
59         bar = (MERAM >> 8) & 0xfffffc00;
60         writel_relaxed(bar, p + CA15BAR);
61         writel_relaxed(bar, p + CA7BAR);
62         writel_relaxed(bar | 0x10, p + CA15BAR);
63         writel_relaxed(bar | 0x10, p + CA7BAR);
64
65         /* enable clocks to all CPUs */
66         writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
67                        p + CA15RESCNT);
68         writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
69                        p + CA7RESCNT);
70         iounmap(p);
71
72         /* turn on power to SCU */
73         r8a7790_pm_init();
74         shmobile_smp_apmu_suspend_init();
75         rcar_sysc_power_up(&r8a7790_ca15_scu);
76         rcar_sysc_power_up(&r8a7790_ca7_scu);
77 }
78
79 struct smp_operations r8a7790_smp_ops __initdata = {
80         .smp_prepare_cpus       = r8a7790_smp_prepare_cpus,
81         .smp_boot_secondary     = shmobile_smp_apmu_boot_secondary,
82 #ifdef CONFIG_HOTPLUG_CPU
83         .cpu_disable            = shmobile_smp_cpu_disable,
84         .cpu_die                = shmobile_smp_apmu_cpu_die,
85         .cpu_kill               = shmobile_smp_apmu_cpu_kill,
86 #endif
87 };