arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include <dt-bindings/gpio/gpio.h>
  44 #include <dt-bindings/interrupt-controller/irq.h>
  45 #include <dt-bindings/interrupt-controller/arm-gic.h>
  46 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  47
  48 / {
  49         compatible = "amlogic,meson-gxbb";
  50         interrupt-parent = <&gic>;
  51         #address-cells = <2>;
  52         #size-cells = <2>;
  53
  54         cpus {
  55                 #address-cells = <0x2>;
  56                 #size-cells = <0x0>;
  57
  58                 cpu0: cpu@0 {
  59                         device_type = "cpu";
  60                         compatible = "arm,cortex-a53", "arm,armv8";
  61                         reg = <0x0 0x0>;
  62                         enable-method = "psci";
  63                 };
  64
  65                 cpu1: cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a53", "arm,armv8";
  68                         reg = <0x0 0x1>;
  69                         enable-method = "psci";
  70                 };
  71
  72                 cpu2: cpu@2 {
  73                         device_type = "cpu";
  74                         compatible = "arm,cortex-a53", "arm,armv8";
  75                         reg = <0x0 0x2>;
  76                         enable-method = "psci";
  77                 };
  78
  79                 cpu3: cpu@3 {
  80                         device_type = "cpu";
  81                         compatible = "arm,cortex-a53", "arm,armv8";
  82                         reg = <0x0 0x3>;
  83                         enable-method = "psci";
  84                 };
  85         };
  86
  87         arm-pmu {
  88                 compatible = "arm,cortex-a53-pmu";
  89                 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
  90                              <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
  91                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
  92                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
  93                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
  94         };
  95
  96         psci {
  97                 compatible = "arm,psci-0.2";
  98                 method = "smc";
  99         };
 100
 101         timer {
 102                 compatible = "arm,armv8-timer";
 103                 interrupts = <GIC_PPI 13
 104                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 105                              <GIC_PPI 14
 106                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 107                              <GIC_PPI 11
 108                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
 109                              <GIC_PPI 10
 110                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
 111         };
 112
 113         xtal: xtal-clk {
 114                 compatible = "fixed-clock";
 115                 clock-frequency = <24000000>;
 116                 clock-output-names = "xtal";
 117                 #clock-cells = <0>;
 118         };
 119
 120         soc {
 121                 compatible = "simple-bus";
 122                 #address-cells = <2>;
 123                 #size-cells = <2>;
 124                 ranges;
 125
 126                 cbus: cbus@c1100000 {
 127                         compatible = "simple-bus";
 128                         reg = <0x0 0xc1100000 0x0 0x100000>;
 129                         #address-cells = <2>;
 130                         #size-cells = <2>;
 131                         ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
 132
 133                         uart_A: serial@84c0 {
 134                                 compatible = "amlogic,meson-uart";
 135                                 reg = <0x0 0x084c0 0x0 0x14>;
 136                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 137                                 clocks = <&xtal>;
 138                                 status = "disabled";
 139                         };
 140                 };
 141
 142                 gic: interrupt-controller@c4301000 {
 143                         compatible = "arm,gic-400";
 144                         reg = <0x0 0xc4301000 0 0x1000>,
 145                               <0x0 0xc4302000 0 0x2000>,
 146                               <0x0 0xc4304000 0 0x2000>,
 147                               <0x0 0xc4306000 0 0x2000>;
 148                         interrupt-controller;
 149                         interrupts = <GIC_PPI 9
 150                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 151                         #interrupt-cells = <3>;
 152                         #address-cells = <0>;
 153                 };
 154
 155                 aobus: aobus@c8100000 {
 156                         compatible = "simple-bus";
 157                         reg = <0x0 0xc8100000 0x0 0x100000>;
 158                         #address-cells = <2>;
 159                         #size-cells = <2>;
 160                         ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
 161
 162                         pinctrl_aobus: pinctrl@14 {
 163                                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
 164                                 #address-cells = <2>;
 165                                 #size-cells = <2>;
 166                                 ranges;
 167
 168                                 gpio_ao: bank@14 {
 169                                         reg = <0x0 0x00014 0x0 0x8>,
 170                                               <0x0 0x0002c 0x0 0x4>,
 171                                               <0x0 0x00024 0x0 0x8>;
 172                                         reg-names = "mux", "pull", "gpio";
 173                                         gpio-controller;
 174                                         #gpio-cells = <2>;
 175                                 };
 176
 177                                 uart_ao_a_pins: uart_ao_a {
 178                                         mux {
 179                                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 180                                                 function = "uart_ao";
 181                                         };
 182                                 };
 183                         };
 184
 185                         uart_AO: serial@4c0 {
 186                                 compatible = "amlogic,meson-uart";
 187                                 reg = <0x0 0x004c0 0x0 0x14>;
 188                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 189                                 clocks = <&xtal>;
 190                                 status = "disabled";
 191                         };
 192                 };
 193
 194                 periphs: periphs@c8834000 {
 195                         compatible = "simple-bus";
 196                         reg = <0x0 0xc8834000 0x0 0x2000>;
 197                         #address-cells = <2>;
 198                         #size-cells = <2>;
 199                         ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 200
 201                         pinctrl_periphs: pinctrl@4b0 {
 202                                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
 203                                 #address-cells = <2>;
 204                                 #size-cells = <2>;
 205                                 ranges;
 206
 207                                 gpio: bank@4b0 {
 208                                         reg = <0x0 0x004b0 0x0 0x28>,
 209                                               <0x0 0x004e8 0x0 0x14>,
 210                                               <0x0 0x00120 0x0 0x14>,
 211                                               <0x0 0x00430 0x0 0x40>;
 212                                         reg-names = "mux", "pull", "pull-enable", "gpio";
 213                                         gpio-controller;
 214                                         #gpio-cells = <2>;
 215                                 };
 216
 217                                 emmc_pins: emmc {
 218                                         mux {
 219                                                 groups = "emmc_nand_d07",
 220                                                        "emmc_cmd",
 221                                                        "emmc_clk";
 222                                                 function = "emmc";
 223                                         };
 224                                 };
 225
 226                                 sdcard_pins: sdcard {
 227                                         mux {
 228                                                 groups = "sdcard_d0",
 229                                                        "sdcard_d1",
 230                                                        "sdcard_d2",
 231                                                        "sdcard_d3",
 232                                                        "sdcard_cmd",
 233                                                        "sdcard_clk";
 234                                                 function = "sdcard";
 235                                         };
 236                                 };
 237                         };
 238                 };
 239
 240                 hiubus: hiubus@c883c000 {
 241                         compatible = "simple-bus";
 242                         reg = <0x0 0xc883c000 0x0 0x2000>;
 243                         #address-cells = <2>;
 244                         #size-cells = <2>;
 245                         ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
 246                 };
 247
 248                 apb: apb@d0000000 {
 249                         compatible = "simple-bus";
 250                         reg = <0x0 0xd0000000 0x0 0x200000>;
 251                         #address-cells = <2>;
 252                         #size-cells = <2>;
 253                         ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
 254                 };
 255         };
 256 };