arch/arm64/boot/dts/arm/juno-base.dtsi

   1         /*
   2          *  Devices shared by all Juno boards
   3          */
   4
   5         memtimer: timer@2a810000 {
   6                 compatible = "arm,armv7-timer-mem";
   7                 reg = <0x0 0x2a810000 0x0 0x10000>;
   8                 clock-frequency = <50000000>;
   9                 #address-cells = <2>;
  10                 #size-cells = <2>;
  11                 ranges;
  12                 status = "disabled";
  13                 frame@2a830000 {
  14                         frame-number = <1>;
  15                         interrupts = <0 60 4>;
  16                         reg = <0x0 0x2a830000 0x0 0x10000>;
  17                 };
  18         };
  19
  20         mailbox: mhu@2b1f0000 {
  21                 compatible = "arm,mhu", "arm,primecell";
  22                 reg = <0x0 0x2b1f0000 0x0 0x1000>;
  23                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
  24                              <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
  25                 interrupt-names = "mhu_lpri_rx",
  26                                   "mhu_hpri_rx";
  27                 #mbox-cells = <1>;
  28                 clocks = <&soc_refclk100mhz>;
  29                 clock-names = "apb_pclk";
  30         };
  31
  32         gic: interrupt-controller@2c010000 {
  33                 compatible = "arm,gic-400", "arm,cortex-a15-gic";
  34                 reg = <0x0 0x2c010000 0 0x1000>,
  35                       <0x0 0x2c02f000 0 0x2000>,
  36                       <0x0 0x2c04f000 0 0x2000>,
  37                       <0x0 0x2c06f000 0 0x2000>;
  38                 #address-cells = <2>;
  39                 #interrupt-cells = <3>;
  40                 #size-cells = <2>;
  41                 interrupt-controller;
  42                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
  43                 ranges = <0 0 0 0x2c1c0000 0 0x40000>;
  44                 v2m_0: v2m@0 {
  45                         compatible = "arm,gic-v2m-frame";
  46                         msi-controller;
  47                         reg = <0 0 0 0x1000>;
  48                 };
  49         };
  50
  51         timer {
  52                 compatible = "arm,armv8-timer";
  53                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
  54                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
  55                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
  56                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
  57         };
  58
  59         sram: sram@2e000000 {
  60                 compatible = "arm,juno-sram-ns", "mmio-sram";
  61                 reg = <0x0 0x2e000000 0x0 0x8000>;
  62
  63                 #address-cells = <1>;
  64                 #size-cells = <1>;
  65                 ranges = <0 0x0 0x2e000000 0x8000>;
  66
  67                 cpu_scp_lpri: scp-shmem@0 {
  68                         compatible = "arm,juno-scp-shmem";
  69                         reg = <0x0 0x200>;
  70                 };
  71
  72                 cpu_scp_hpri: scp-shmem@200 {
  73                         compatible = "arm,juno-scp-shmem";
  74                         reg = <0x200 0x200>;
  75                 };
  76         };
  77
  78         pcie_ctlr: pcie-controller@40000000 {
  79                 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
  80                 device_type = "pci";
  81                 reg = <0 0x40000000 0 0x10000000>;      /* ECAM config space */
  82                 bus-range = <0 255>;
  83                 linux,pci-domain = <0>;
  84                 #address-cells = <3>;
  85                 #size-cells = <2>;
  86                 dma-coherent;
  87                 ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
  88                          <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
  89                          <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
  90                 #interrupt-cells = <1>;
  91                 interrupt-map-mask = <0 0 0 7>;
  92                 interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>,
  93                                 <0 0 0 2 &gic 0 0 0 137 4>,
  94                                 <0 0 0 3 &gic 0 0 0 138 4>,
  95                                 <0 0 0 4 &gic 0 0 0 139 4>;
  96                 msi-parent = <&v2m_0>;
  97                 status = "disabled";
  98         };
  99
 100         scpi {
 101                 compatible = "arm,scpi";
 102                 mboxes = <&mailbox 1>;
 103                 shmem = <&cpu_scp_hpri>;
 104
 105                 clocks {
 106                         compatible = "arm,scpi-clocks";
 107
 108                         scpi_dvfs: scpi-dvfs {
 109                                 compatible = "arm,scpi-dvfs-clocks";
 110                                 #clock-cells = <1>;
 111                                 clock-indices = <0>, <1>, <2>;
 112                                 clock-output-names = "atlclk", "aplclk","gpuclk";
 113                         };
 114                         scpi_clk: scpi-clk {
 115                                 compatible = "arm,scpi-variable-clocks";
 116                                 #clock-cells = <1>;
 117                                 clock-indices = <3>;
 118                                 clock-output-names = "pxlclk";
 119                         };
 120                 };
 121
 122                 scpi_sensors0: sensors {
 123                         compatible = "arm,scpi-sensors";
 124                         #thermal-sensor-cells = <1>;
 125                 };
 126         };
 127
 128         /include/ "juno-clocks.dtsi"
 129
 130         dma@7ff00000 {
 131                 compatible = "arm,pl330", "arm,primecell";
 132                 reg = <0x0 0x7ff00000 0 0x1000>;
 133                 #dma-cells = <1>;
 134                 #dma-channels = <8>;
 135                 #dma-requests = <32>;
 136                 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
 137                              <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
 138                              <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
 139                              <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
 140                              <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 141                              <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
 142                              <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 143                              <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 144                              <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 145                 clocks = <&soc_faxiclk>;
 146                 clock-names = "apb_pclk";
 147         };
 148
 149         hdlcd@7ff50000 {
 150                 compatible = "arm,hdlcd";
 151                 reg = <0 0x7ff50000 0 0x1000>;
 152                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 153                 clocks = <&scpi_clk 3>;
 154                 clock-names = "pxlclk";
 155
 156                 port {
 157                         hdlcd1_output: hdlcd1-endpoint {
 158                                 remote-endpoint = <&tda998x_1_input>;
 159                         };
 160                 };
 161         };
 162
 163         hdlcd@7ff60000 {
 164                 compatible = "arm,hdlcd";
 165                 reg = <0 0x7ff60000 0 0x1000>;
 166                 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 167                 clocks = <&scpi_clk 3>;
 168                 clock-names = "pxlclk";
 169
 170                 port {
 171                         hdlcd0_output: hdlcd0-endpoint {
 172                                 remote-endpoint = <&tda998x_0_input>;
 173                         };
 174                 };
 175         };
 176
 177         soc_uart0: uart@7ff80000 {
 178                 compatible = "arm,pl011", "arm,primecell";
 179                 reg = <0x0 0x7ff80000 0x0 0x1000>;
 180                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 181                 clocks = <&soc_uartclk>, <&soc_refclk100mhz>;
 182                 clock-names = "uartclk", "apb_pclk";
 183         };
 184
 185         i2c@7ffa0000 {
 186                 compatible = "snps,designware-i2c";
 187                 reg = <0x0 0x7ffa0000 0x0 0x1000>;
 188                 #address-cells = <1>;
 189                 #size-cells = <0>;
 190                 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
 191                 clock-frequency = <400000>;
 192                 i2c-sda-hold-time-ns = <500>;
 193                 clocks = <&soc_smc50mhz>;
 194
 195                 hdmi-transmitter@70 {
 196                         compatible = "nxp,tda998x";
 197                         reg = <0x70>;
 198                         port {
 199                                 tda998x_0_input: tda998x-0-endpoint {
 200                                         remote-endpoint = <&hdlcd0_output>;
 201                                 };
 202                         };
 203                 };
 204
 205                 hdmi-transmitter@71 {
 206                         compatible = "nxp,tda998x";
 207                         reg = <0x71>;
 208                         port {
 209                                 tda998x_1_input: tda998x-1-endpoint {
 210                                         remote-endpoint = <&hdlcd1_output>;
 211                                 };
 212                         };
 213                 };
 214         };
 215
 216         ohci@7ffb0000 {
 217                 compatible = "generic-ohci";
 218                 reg = <0x0 0x7ffb0000 0x0 0x10000>;
 219                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 220                 clocks = <&soc_usb48mhz>;
 221         };
 222
 223         ehci@7ffc0000 {
 224                 compatible = "generic-ehci";
 225                 reg = <0x0 0x7ffc0000 0x0 0x10000>;
 226                 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 227                 clocks = <&soc_usb48mhz>;
 228         };
 229
 230         memory-controller@7ffd0000 {
 231                 compatible = "arm,pl354", "arm,primecell";
 232                 reg = <0 0x7ffd0000 0 0x1000>;
 233                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 234                              <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 235                 clocks = <&soc_smc50mhz>;
 236                 clock-names = "apb_pclk";
 237         };
 238
 239         memory@80000000 {
 240                 device_type = "memory";
 241                 /* last 16MB of the first memory area is reserved for secure world use by firmware */
 242                 reg = <0x00000000 0x80000000 0x0 0x7f000000>,
 243                       <0x00000008 0x80000000 0x1 0x80000000>;
 244         };
 245
 246         smb@08000000 {
 247                 compatible = "simple-bus";
 248                 #address-cells = <2>;
 249                 #size-cells = <1>;
 250                 ranges = <0 0 0 0x08000000 0x04000000>,
 251                          <1 0 0 0x14000000 0x04000000>,
 252                          <2 0 0 0x18000000 0x04000000>,
 253                          <3 0 0 0x1c000000 0x04000000>,
 254                          <4 0 0 0x0c000000 0x04000000>,
 255                          <5 0 0 0x10000000 0x04000000>;
 256
 257                 #interrupt-cells = <1>;
 258                 interrupt-map-mask = <0 0 15>;
 259                 interrupt-map = <0 0  0 &gic 0 0 0  68 IRQ_TYPE_LEVEL_HIGH>,
 260                                 <0 0  1 &gic 0 0 0  69 IRQ_TYPE_LEVEL_HIGH>,
 261                                 <0 0  2 &gic 0 0 0  70 IRQ_TYPE_LEVEL_HIGH>,
 262                                 <0 0  3 &gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH>,
 263                                 <0 0  4 &gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH>,
 264                                 <0 0  5 &gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH>,
 265                                 <0 0  6 &gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH>,
 266                                 <0 0  7 &gic 0 0 0 164 IRQ_TYPE_LEVEL_HIGH>,
 267                                 <0 0  8 &gic 0 0 0 165 IRQ_TYPE_LEVEL_HIGH>,
 268                                 <0 0  9 &gic 0 0 0 166 IRQ_TYPE_LEVEL_HIGH>,
 269                                 <0 0 10 &gic 0 0 0 167 IRQ_TYPE_LEVEL_HIGH>,
 270                                 <0 0 11 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>,
 271                                 <0 0 12 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>;
 272
 273                 /include/ "juno-motherboard.dtsi"
 274         };