arch/arm64/boot/dts/nvidia/tegra132-norrin.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra132.dtsi"
   5
   6 / {
   7         model = "NVIDIA Tegra132 Norrin";
   8         compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
   9
  10         aliases {
  11                 rtc0 = "/i2c@0,7000d000/as3722@40";
  12                 rtc1 = "/rtc@0,7000e000";
  13         };
  14
  15         memory {
  16                 device_type = "memory";
  17                 reg = <0x0 0x80000000 0x0 0x80000000>;
  18         };
  19
  20         host1x@0,50000000 {
  21                 hdmi@0,54280000 {
  22                         status = "disabled";
  23
  24                         vdd-supply = <&vdd_3v3_hdmi>;
  25                         pll-supply = <&vdd_hdmi_pll>;
  26                         hdmi-supply = <&vdd_5v0_hdmi>;
  27
  28                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  29                         nvidia,hpd-gpio =
  30                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  31                 };
  32
  33                 sor@0,54540000 {
  34                         status = "okay";
  35
  36                         nvidia,dpaux = <&dpaux>;
  37                         nvidia,panel = <&panel>;
  38                 };
  39
  40                 dpaux: dpaux@0,545c0000 {
  41                         vdd-supply = <&vdd_3v3_panel>;
  42                         status = "okay";
  43                 };
  44         };
  45
  46         gpu@0,57000000 {
  47                 status = "okay";
  48
  49                 vdd-supply = <&vdd_gpu>;
  50         };
  51
  52         pinmux@0,70000868 {
  53                 pinctrl-names = "default";
  54                 pinctrl-0 = <&pinmux_default>;
  55
  56                 pinmux_default: pinmux@0 {
  57                         dap_mclk1_pw4 {
  58                                 nvidia,pins = "dap_mclk1_pw4";
  59                                 nvidia,function = "extperiph1";
  60                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  61                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  62                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  63                         };
  64                         dap2_din_pa4 {
  65                                 nvidia,pins = "dap2_din_pa4";
  66                                 nvidia,function = "i2s1";
  67                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  68                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  69                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  70                         };
  71                         dap2_dout_pa5 {
  72                                 nvidia,pins = "dap2_dout_pa5",
  73                                               "dap2_fs_pa2",
  74                                               "dap2_sclk_pa3";
  75                                 nvidia,function = "i2s1";
  76                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  77                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  78                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  79                         };
  80                         dap3_dout_pp2 {
  81                                 nvidia,pins = "dap3_dout_pp2";
  82                                 nvidia,function = "i2s2";
  83                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  84                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  85                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  86                         };
  87                         dvfs_pwm_px0 {
  88                                 nvidia,pins = "dvfs_pwm_px0",
  89                                               "dvfs_clk_px2";
  90                                 nvidia,function = "cldvfs";
  91                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  92                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  93                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  94                         };
  95                         ulpi_clk_py0 {
  96                                 nvidia,pins = "ulpi_clk_py0",
  97                                               "ulpi_nxt_py2",
  98                                               "ulpi_stp_py3";
  99                                 nvidia,function = "spi1";
 100                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 101                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 102                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 103                         };
 104                         ulpi_dir_py1 {
 105                                 nvidia,pins = "ulpi_dir_py1";
 106                                 nvidia,function = "spi1";
 107                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 108                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 109                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 110                         };
 111                         cam_i2c_scl_pbb1 {
 112                                 nvidia,pins = "cam_i2c_scl_pbb1",
 113                                               "cam_i2c_sda_pbb2";
 114                                 nvidia,function = "i2c3";
 115                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 116                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 117                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 118                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 119                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 120                         };
 121                         gen2_i2c_scl_pt5 {
 122                                 nvidia,pins = "gen2_i2c_scl_pt5",
 123                                               "gen2_i2c_sda_pt6";
 124                                 nvidia,function = "i2c2";
 125                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 126                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 127                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 128                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 129                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 130                         };
 131                         pj7 {
 132                                 nvidia,pins = "pj7";
 133                                 nvidia,function = "uartd";
 134                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 135                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 136                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 137                         };
 138                         spdif_in_pk6 {
 139                                 nvidia,pins = "spdif_in_pk6";
 140                                 nvidia,function = "spdif";
 141                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 142                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 143                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 144                         };
 145                         pk7 {
 146                                 nvidia,pins = "pk7";
 147                                 nvidia,function = "uartd";
 148                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 149                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 150                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 151                         };
 152                         pg4 {
 153                                 nvidia,pins = "pg4",
 154                                               "pg5",
 155                                               "pg6",
 156                                               "pi3";
 157                                 nvidia,function = "spi4";
 158                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 159                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 160                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 161                         };
 162                         pg7 {
 163                                 nvidia,pins = "pg7";
 164                                 nvidia,function = "spi4";
 165                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 166                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 167                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 168                         };
 169                         ph1 {
 170                                 nvidia,pins = "ph1";
 171                                 nvidia,function = "pwm1";
 172                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 173                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 174                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 175                         };
 176                         pk0 {
 177                                 nvidia,pins = "pk0",
 178                                               "kb_row15_ps7",
 179                                               "clk_32k_out_pa0";
 180                                 nvidia,function = "soc";
 181                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 182                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 183                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 184                         };
 185                         sdmmc1_clk_pz0 {
 186                                 nvidia,pins = "sdmmc1_clk_pz0";
 187                                 nvidia,function = "sdmmc1";
 188                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 189                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 190                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 191                         };
 192                         sdmmc1_cmd_pz1 {
 193                                 nvidia,pins = "sdmmc1_cmd_pz1",
 194                                               "sdmmc1_dat0_py7",
 195                                               "sdmmc1_dat1_py6",
 196                                               "sdmmc1_dat2_py5",
 197                                               "sdmmc1_dat3_py4";
 198                                 nvidia,function = "sdmmc1";
 199                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 200                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 201                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 202                         };
 203                         sdmmc3_clk_pa6 {
 204                                 nvidia,pins = "sdmmc3_clk_pa6";
 205                                 nvidia,function = "sdmmc3";
 206                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 207                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 208                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 209                         };
 210                         sdmmc3_cmd_pa7 {
 211                                 nvidia,pins = "sdmmc3_cmd_pa7",
 212                                               "sdmmc3_dat0_pb7",
 213                                               "sdmmc3_dat1_pb6",
 214                                               "sdmmc3_dat2_pb5",
 215                                               "sdmmc3_dat3_pb4",
 216                                               "kb_col4_pq4",
 217                                               "sdmmc3_clk_lb_out_pee4",
 218                                               "sdmmc3_clk_lb_in_pee5",
 219                                               "sdmmc3_cd_n_pv2";
 220                                 nvidia,function = "sdmmc3";
 221                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 222                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 223                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 224                         };
 225                         sdmmc4_clk_pcc4 {
 226                                 nvidia,pins = "sdmmc4_clk_pcc4";
 227                                 nvidia,function = "sdmmc4";
 228                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 229                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 230                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 231                         };
 232                         sdmmc4_cmd_pt7 {
 233                                 nvidia,pins = "sdmmc4_cmd_pt7",
 234                                               "sdmmc4_dat0_paa0",
 235                                               "sdmmc4_dat1_paa1",
 236                                               "sdmmc4_dat2_paa2",
 237                                               "sdmmc4_dat3_paa3",
 238                                               "sdmmc4_dat4_paa4",
 239                                               "sdmmc4_dat5_paa5",
 240                                               "sdmmc4_dat6_paa6",
 241                                               "sdmmc4_dat7_paa7";
 242                                 nvidia,function = "sdmmc4";
 243                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 244                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 245                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 246                         };
 247                         mic_det_l {
 248                                 nvidia,pins = "kb_row7_pr7";
 249                                 nvidia,function = "rsvd2";
 250                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 251                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 252                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 253                         };
 254                         kb_row10_ps2 {
 255                                 nvidia,pins = "kb_row10_ps2";
 256                                 nvidia,function = "uarta";
 257                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 258                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 259                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 260                         };
 261                         kb_row9_ps1 {
 262                                 nvidia,pins = "kb_row9_ps1";
 263                                 nvidia,function = "uarta";
 264                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 265                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 266                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 267                         };
 268                         pwr_i2c_scl_pz6 {
 269                                 nvidia,pins = "pwr_i2c_scl_pz6",
 270                                               "pwr_i2c_sda_pz7";
 271                                 nvidia,function = "i2cpwr";
 272                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 273                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 274                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 275                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 276                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 277                         };
 278                         jtag_rtck {
 279                                 nvidia,pins = "jtag_rtck";
 280                                 nvidia,function = "rtck";
 281                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 282                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 283                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 284                         };
 285                         clk_32k_in {
 286                                 nvidia,pins = "clk_32k_in";
 287                                 nvidia,function = "clk";
 288                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 289                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 290                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 291                         };
 292                         core_pwr_req {
 293                                 nvidia,pins = "core_pwr_req";
 294                                 nvidia,function = "pwron";
 295                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 296                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 297                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 298                         };
 299                         cpu_pwr_req {
 300                                 nvidia,pins = "cpu_pwr_req";
 301                                 nvidia,function = "cpu";
 302                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 303                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 304                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 305                         };
 306                         kb_col0_ap {
 307                                 nvidia,pins = "kb_col0_pq0";
 308                                 nvidia,function = "rsvd4";
 309                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 310                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 311                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 312                         };
 313                         en_vdd_sd {
 314                                 nvidia,pins = "kb_row0_pr0";
 315                                 nvidia,function = "rsvd4";
 316                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 317                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 318                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 319                         };
 320                         lid_open {
 321                                 nvidia,pins = "kb_row4_pr4";
 322                                 nvidia,function = "rsvd3";
 323                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 324                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 325                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 326                         };
 327                         pwr_int_n {
 328                                 nvidia,pins = "pwr_int_n";
 329                                 nvidia,function = "pmi";
 330                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 331                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 332                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 333                         };
 334                         reset_out_n {
 335                                 nvidia,pins = "reset_out_n";
 336                                 nvidia,function = "reset_out_n";
 337                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 338                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 339                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 340                         };
 341                         clk3_out_pee0 {
 342                                 nvidia,pins = "clk3_out_pee0";
 343                                 nvidia,function = "extperiph3";
 344                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 345                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 346                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 347                         };
 348                         gen1_i2c_scl_pc4 {
 349                                 nvidia,pins = "gen1_i2c_scl_pc4",
 350                                               "gen1_i2c_sda_pc5";
 351                                 nvidia,function = "i2c1";
 352                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 353                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 354                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 355                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 356                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 357                         };
 358                         hdmi_cec_pee3 {
 359                                 nvidia,pins = "hdmi_cec_pee3";
 360                                 nvidia,function = "cec";
 361                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 362                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 363                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 364                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 365                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 366                         };
 367                         hdmi_int_pn7 {
 368                                 nvidia,pins = "hdmi_int_pn7";
 369                                 nvidia,function = "rsvd1";
 370                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 371                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 372                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 373                         };
 374                         ddc_scl_pv4 {
 375                                 nvidia,pins = "ddc_scl_pv4",
 376                                               "ddc_sda_pv5";
 377                                 nvidia,function = "i2c4";
 378                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 379                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 380                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 381                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 382                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 383                         };
 384                         usb_vbus_en0_pn4 {
 385                                 nvidia,pins = "usb_vbus_en0_pn4",
 386                                               "usb_vbus_en1_pn5",
 387                                               "usb_vbus_en2_pff1";
 388                                 nvidia,function = "usb";
 389                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 390                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 391                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 392                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 393                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 394                         };
 395                         drive_sdio1 {
 396                                 nvidia,pins = "drive_sdio1";
 397                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 398                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 399                                 nvidia,pull-down-strength = <36>;
 400                                 nvidia,pull-up-strength = <20>;
 401                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 402                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 403                         };
 404                         drive_sdio3 {
 405                                 nvidia,pins = "drive_sdio3";
 406                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 407                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 408                                 nvidia,pull-down-strength = <22>;
 409                                 nvidia,pull-up-strength = <36>;
 410                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 411                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 412                         };
 413                         drive_gma {
 414                                 nvidia,pins = "drive_gma";
 415                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 416                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 417                                 nvidia,pull-down-strength = <2>;
 418                                 nvidia,pull-up-strength = <1>;
 419                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 420                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 421                                 nvidia,drive-type = <1>;
 422                         };
 423                         ac_ok {
 424                                 nvidia,pins = "pj0";
 425                                 nvidia,function = "gmi";
 426                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 427                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 428                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 429                         };
 430                         codec_irq_l {
 431                                 nvidia,pins = "ph4";
 432                                 nvidia,function = "gmi";
 433                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 434                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 435                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 436                         };
 437                         lcd_bl_en {
 438                                 nvidia,pins = "ph2";
 439                                 nvidia,function = "gmi";
 440                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 441                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 442                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 443                         };
 444                         touch_irq_l {
 445                                 nvidia,pins = "gpio_w3_aud_pw3";
 446                                 nvidia,function = "spi6";
 447                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 448                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 449                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 450                         };
 451                         tpm_davint_l {
 452                                 nvidia,pins = "ph6";
 453                                 nvidia,function = "gmi";
 454                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 455                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 456                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 457                         };
 458                         ts_irq_l {
 459                                 nvidia,pins = "pk2";
 460                                 nvidia,function = "gmi";
 461                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 462                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 463                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 464                         };
 465                         ts_reset_l {
 466                                 nvidia,pins = "pk4";
 467                                 nvidia,function = "gmi";
 468                                 nvidia,pull = <1>;
 469                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 471                         };
 472                         ts_shdn_l {
 473                                 nvidia,pins = "pk1";
 474                                 nvidia,function = "gmi";
 475                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 476                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 477                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 478                         };
 479                         ph7 {
 480                                 nvidia,pins = "ph7";
 481                                 nvidia,function = "gmi";
 482                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 483                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 484                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 485                         };
 486                         sensor_irq_l {
 487                                 nvidia,pins = "pi6";
 488                                 nvidia,function = "gmi";
 489                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 490                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 491                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 492                         };
 493                         wifi_en {
 494                                 nvidia,pins = "gpio_x7_aud_px7";
 495                                 nvidia,function = "rsvd4";
 496                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 497                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 498                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 499                         };
 500                         chromeos_write_protect {
 501                                 nvidia,pins = "kb_row1_pr1";
 502                                 nvidia,function = "rsvd4";
 503                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 504                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 505                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 506                         };
 507                         hp_det_l {
 508                                 nvidia,pins = "pi7";
 509                                 nvidia,function = "rsvd1";
 510                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 511                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 512                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 513                         };
 514                         soc_warm_reset_l {
 515                                 nvidia,pins = "pi5";
 516                                 nvidia,function = "gmi";
 517                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 518                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 519                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 520                         };
 521                 };
 522         };
 523
 524         serial@0,70006000 {
 525                 status = "okay";
 526         };
 527
 528         pwm: pwm@0,7000a000 {
 529                 status = "okay";
 530         };
 531
 532         /* HDMI DDC */
 533         hdmi_ddc: i2c@0,7000c700 {
 534                 status = "okay";
 535                 clock-frequency = <100000>;
 536         };
 537
 538         i2c@0,7000d000 {
 539                 status = "okay";
 540                 clock-frequency = <400000>;
 541
 542                 as3722: pmic@40 {
 543                         compatible = "ams,as3722";
 544                         reg = <0x40>;
 545                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 546
 547                         ams,system-power-controller;
 548
 549                         #interrupt-cells = <2>;
 550                         interrupt-controller;
 551
 552                         #gpio-cells = <2>;
 553                         gpio-controller;
 554
 555                         pinctrl-names = "default";
 556                         pinctrl-0 = <&as3722_default>;
 557
 558                         as3722_default: pinmux@0 {
 559                                 gpio0 {
 560                                         pins = "gpio0";
 561                                         function = "gpio";
 562                                         bias-pull-down;
 563                                 };
 564
 565                                 gpio1 {
 566                                         pins = "gpio1";
 567                                         function = "gpio";
 568                                         bias-pull-up;
 569                                 };
 570
 571                                 gpio2_4_7 {
 572                                         pins = "gpio2", "gpio4", "gpio7";
 573                                         function = "gpio";
 574                                         bias-pull-up;
 575                                 };
 576
 577                                 gpio3 {
 578                                         pins = "gpio3";
 579                                         function = "gpio";
 580                                         bias-high-impedance;
 581                                 };
 582
 583                                 gpio5 {
 584                                         pins = "gpio5";
 585                                         function = "clk32k-out";
 586                                         bias-pull-down;
 587                                 };
 588
 589                                 gpio6 {
 590                                         pins = "gpio6";
 591                                         function = "clk32k-out";
 592                                         bias-pull-down;
 593                                 };
 594                         };
 595
 596                         regulators {
 597                                 vsup-sd2-supply = <&vdd_5v0_sys>;
 598                                 vsup-sd3-supply = <&vdd_5v0_sys>;
 599                                 vsup-sd4-supply = <&vdd_5v0_sys>;
 600                                 vsup-sd5-supply = <&vdd_5v0_sys>;
 601                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
 602                                 vin-ldo1-6-supply = <&vdd_3v3_sys>;
 603                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
 604                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
 605                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
 606                                 vin-ldo11-supply = <&vdd_3v3_run>;
 607
 608                                 sd0 {
 609                                         regulator-name = "+VDD_CPU_AP";
 610                                         regulator-min-microvolt = <700000>;
 611                                         regulator-max-microvolt = <1350000>;
 612                                         regulator-max-microamp = <3500000>;
 613                                         regulator-always-on;
 614                                         regulator-boot-on;
 615                                         ams,ext-control = <2>;
 616                                 };
 617
 618                                 sd1 {
 619                                         regulator-name = "+VDD_CORE";
 620                                         regulator-min-microvolt = <700000>;
 621                                         regulator-max-microvolt = <1350000>;
 622                                         regulator-max-microamp = <4000000>;
 623                                         regulator-always-on;
 624                                         regulator-boot-on;
 625                                         ams,ext-control = <1>;
 626                                 };
 627
 628                                 vdd_1v35_lp0: sd2 {
 629                                         regulator-name = "+1.35V_LP0(sd2)";
 630                                         regulator-min-microvolt = <1350000>;
 631                                         regulator-max-microvolt = <1350000>;
 632                                         regulator-always-on;
 633                                         regulator-boot-on;
 634                                 };
 635
 636                                 sd3 {
 637                                         regulator-name = "+1.35V_LP0(sd3)";
 638                                         regulator-min-microvolt = <1350000>;
 639                                         regulator-max-microvolt = <1350000>;
 640                                         regulator-always-on;
 641                                         regulator-boot-on;
 642                                 };
 643
 644                                 vdd_1v05_run: sd4 {
 645                                         regulator-name = "+1.05V_RUN";
 646                                         regulator-min-microvolt = <1050000>;
 647                                         regulator-max-microvolt = <1050000>;
 648                                 };
 649
 650                                 vddio_1v8: sd5 {
 651                                         regulator-name = "+1.8V_VDDIO";
 652                                         regulator-min-microvolt = <1800000>;
 653                                         regulator-max-microvolt = <1800000>;
 654                                         regulator-always-on;
 655                                         regulator-boot-on;
 656                                 };
 657
 658                                 vdd_gpu: sd6 {
 659                                         regulator-name = "+VDD_GPU_AP";
 660                                         regulator-min-microvolt = <800000>;
 661                                         regulator-max-microvolt = <1200000>;
 662                                         regulator-min-microamp = <3500000>;
 663                                         regulator-max-microamp = <3500000>;
 664                                         regulator-always-on;
 665                                         regulator-boot-on;
 666                                 };
 667
 668                                 ldo0 {
 669                                         regulator-name = "+1.05_RUN_AVDD";
 670                                         regulator-min-microvolt = <1050000>;
 671                                         regulator-max-microvolt = <1050000>;
 672                                         regulator-always-on;
 673                                         regulator-boot-on;
 674                                         ams,ext-control = <1>;
 675                                 };
 676
 677                                 ldo1 {
 678                                         regulator-name = "+1.8V_RUN_CAM";
 679                                         regulator-min-microvolt = <1800000>;
 680                                         regulator-max-microvolt = <1800000>;
 681                                 };
 682
 683                                 ldo2 {
 684                                         regulator-name = "+1.2V_GEN_AVDD";
 685                                         regulator-min-microvolt = <1200000>;
 686                                         regulator-max-microvolt = <1200000>;
 687                                         regulator-always-on;
 688                                         regulator-boot-on;
 689                                 };
 690
 691                                 ldo3 {
 692                                         regulator-name = "+1.00V_LP0_VDD_RTC";
 693                                         regulator-min-microvolt = <1000000>;
 694                                         regulator-max-microvolt = <1000000>;
 695                                         regulator-always-on;
 696                                         regulator-boot-on;
 697                                         ams,enable-tracking;
 698                                 };
 699
 700                                 vdd_run_cam: ldo4 {
 701                                         regulator-name = "+2.8V_RUN_CAM";
 702                                         regulator-min-microvolt = <2800000>;
 703                                         regulator-max-microvolt = <2800000>;
 704                                 };
 705
 706                                 ldo5 {
 707                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
 708                                         regulator-min-microvolt = <1200000>;
 709                                         regulator-max-microvolt = <1200000>;
 710                                 };
 711
 712                                 vddio_sdmmc3: ldo6 {
 713                                         regulator-name = "+VDDIO_SDMMC3";
 714                                         regulator-min-microvolt = <1800000>;
 715                                         regulator-max-microvolt = <3300000>;
 716                                 };
 717
 718                                 ldo7 {
 719                                         regulator-name = "+1.05V_RUN_CAM_REAR";
 720                                         regulator-min-microvolt = <1050000>;
 721                                         regulator-max-microvolt = <1050000>;
 722                                 };
 723
 724                                 ldo9 {
 725                                         regulator-name = "+2.8V_RUN_TOUCH";
 726                                         regulator-min-microvolt = <2800000>;
 727                                         regulator-max-microvolt = <2800000>;
 728                                 };
 729
 730                                 ldo10 {
 731                                         regulator-name = "+2.8V_RUN_CAM_AF";
 732                                         regulator-min-microvolt = <2800000>;
 733                                         regulator-max-microvolt = <2800000>;
 734                                 };
 735
 736                                 ldo11 {
 737                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
 738                                         regulator-min-microvolt = <1800000>;
 739                                         regulator-max-microvolt = <1800000>;
 740                                 };
 741                         };
 742                 };
 743         };
 744
 745         spi@0,7000d400 {
 746                 status = "okay";
 747
 748                 ec: cros-ec@0 {
 749                         compatible = "google,cros-ec-spi";
 750                         spi-max-frequency = <3000000>;
 751                         interrupt-parent = <&gpio>;
 752                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
 753                         reg = <0>;
 754
 755                         google,cros-ec-spi-msg-delay = <2000>;
 756
 757                         i2c_20: i2c-tunnel {
 758                                 compatible = "google,cros-ec-i2c-tunnel";
 759                                 #address-cells = <1>;
 760                                 #size-cells = <0>;
 761
 762                                 google,remote-bus = <0>;
 763
 764                                 charger: bq24735 {
 765                                         compatible = "ti,bq24735";
 766                                         reg = <0x9>;
 767                                         interrupt-parent = <&gpio>;
 768                                         interrupts = <TEGRA_GPIO(J, 0)
 769                                                         GPIO_ACTIVE_HIGH>;
 770                                         ti,ac-detect-gpios = <&gpio
 771                                                         TEGRA_GPIO(J, 0)
 772                                                         GPIO_ACTIVE_HIGH>;
 773                                 };
 774
 775                                 battery: smart-battery {
 776                                         compatible = "sbs,sbs-battery";
 777                                         reg = <0xb>;
 778                                         battery-name = "battery";
 779                                         sbs,i2c-retry-count = <2>;
 780                                         sbs,poll-retry-count = <10>;
 781                                 /*      power-supplies = <&charger>; */
 782                                 };
 783                         };
 784
 785                         keyboard-controller {
 786                                 compatible = "google,cros-ec-keyb";
 787                                 keypad,num-rows = <8>;
 788                                 keypad,num-columns = <13>;
 789                                 google,needs-ghost-filter;
 790                                 linux,keymap =
 791                                         <MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
 792                                          MATRIX_KEY(0x00, 0x02, KEY_F1)
 793                                          MATRIX_KEY(0x00, 0x03, KEY_B)
 794                                          MATRIX_KEY(0x00, 0x04, KEY_F10)
 795                                          MATRIX_KEY(0x00, 0x06, KEY_N)
 796                                          MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
 797                                          MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
 798
 799                                          MATRIX_KEY(0x01, 0x01, KEY_ESC)
 800                                          MATRIX_KEY(0x01, 0x02, KEY_F4)
 801                                          MATRIX_KEY(0x01, 0x03, KEY_G)
 802                                          MATRIX_KEY(0x01, 0x04, KEY_F7)
 803                                          MATRIX_KEY(0x01, 0x06, KEY_H)
 804                                          MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
 805                                          MATRIX_KEY(0x01, 0x09, KEY_F9)
 806                                          MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
 807
 808                                          MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
 809                                          MATRIX_KEY(0x02, 0x01, KEY_TAB)
 810                                          MATRIX_KEY(0x02, 0x02, KEY_F3)
 811                                          MATRIX_KEY(0x02, 0x03, KEY_T)
 812                                          MATRIX_KEY(0x02, 0x04, KEY_F6)
 813                                          MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
 814                                          MATRIX_KEY(0x02, 0x06, KEY_Y)
 815                                          MATRIX_KEY(0x02, 0x07, KEY_102ND)
 816                                          MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
 817                                          MATRIX_KEY(0x02, 0x09, KEY_F8)
 818
 819                                          MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
 820                                          MATRIX_KEY(0x03, 0x02, KEY_F2)
 821                                          MATRIX_KEY(0x03, 0x03, KEY_5)
 822                                          MATRIX_KEY(0x03, 0x04, KEY_F5)
 823                                          MATRIX_KEY(0x03, 0x06, KEY_6)
 824                                          MATRIX_KEY(0x03, 0x08, KEY_MINUS)
 825                                          MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
 826
 827                                          MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
 828                                          MATRIX_KEY(0x04, 0x01, KEY_A)
 829                                          MATRIX_KEY(0x04, 0x02, KEY_D)
 830                                          MATRIX_KEY(0x04, 0x03, KEY_F)
 831                                          MATRIX_KEY(0x04, 0x04, KEY_S)
 832                                          MATRIX_KEY(0x04, 0x05, KEY_K)
 833                                          MATRIX_KEY(0x04, 0x06, KEY_J)
 834                                          MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
 835                                          MATRIX_KEY(0x04, 0x09, KEY_L)
 836                                          MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
 837                                          MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
 838
 839                                          MATRIX_KEY(0x05, 0x01, KEY_Z)
 840                                          MATRIX_KEY(0x05, 0x02, KEY_C)
 841                                          MATRIX_KEY(0x05, 0x03, KEY_V)
 842                                          MATRIX_KEY(0x05, 0x04, KEY_X)
 843                                          MATRIX_KEY(0x05, 0x05, KEY_COMMA)
 844                                          MATRIX_KEY(0x05, 0x06, KEY_M)
 845                                          MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
 846                                          MATRIX_KEY(0x05, 0x08, KEY_SLASH)
 847                                          MATRIX_KEY(0x05, 0x09, KEY_DOT)
 848                                          MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
 849
 850                                          MATRIX_KEY(0x06, 0x01, KEY_1)
 851                                          MATRIX_KEY(0x06, 0x02, KEY_3)
 852                                          MATRIX_KEY(0x06, 0x03, KEY_4)
 853                                          MATRIX_KEY(0x06, 0x04, KEY_2)
 854                                          MATRIX_KEY(0x06, 0x05, KEY_8)
 855                                          MATRIX_KEY(0x06, 0x06, KEY_7)
 856                                          MATRIX_KEY(0x06, 0x08, KEY_0)
 857                                          MATRIX_KEY(0x06, 0x09, KEY_9)
 858                                          MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
 859                                          MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
 860                                          MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
 861
 862                                          MATRIX_KEY(0x07, 0x01, KEY_Q)
 863                                          MATRIX_KEY(0x07, 0x02, KEY_E)
 864                                          MATRIX_KEY(0x07, 0x03, KEY_R)
 865                                          MATRIX_KEY(0x07, 0x04, KEY_W)
 866                                          MATRIX_KEY(0x07, 0x05, KEY_I)
 867                                          MATRIX_KEY(0x07, 0x06, KEY_U)
 868                                          MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
 869                                          MATRIX_KEY(0x07, 0x08, KEY_P)
 870                                          MATRIX_KEY(0x07, 0x09, KEY_O)
 871                                          MATRIX_KEY(0x07, 0x0b, KEY_UP)
 872                                          MATRIX_KEY(0x07, 0x0c, KEY_LEFT)>;
 873                         };
 874                 };
 875         };
 876
 877         pmc@0,7000e400 {
 878                 nvidia,invert-interrupt;
 879                 nvidia,suspend-mode = <0>;
 880                 #wake-cells = <3>;
 881                 nvidia,cpu-pwr-good-time = <500>;
 882                 nvidia,cpu-pwr-off-time = <300>;
 883                 nvidia,core-pwr-good-time = <641 3845>;
 884                 nvidia,core-pwr-off-time = <61036>;
 885                 nvidia,core-power-req-active-high;
 886                 nvidia,sys-clock-req-active-high;
 887                 nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 888         };
 889
 890         /* WIFI/BT module */
 891         sdhci@0,700b0000 {
 892                 status = "disabled";
 893         };
 894
 895         /* external SD/MMC */
 896         sdhci@0,700b0400 {
 897                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 898                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
 899                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
 900                 status = "okay";
 901                 bus-width = <4>;
 902                 vqmmc-supply = <&vddio_sdmmc3>;
 903         };
 904
 905         /* EMMC 4.51 */
 906         sdhci@0,700b0600 {
 907                 status = "okay";
 908                 bus-width = <8>;
 909                 non-removable;
 910         };
 911
 912         usb@0,7d000000 {
 913                 status = "okay";
 914         };
 915
 916         usb-phy@0,7d000000 {
 917                 status = "okay";
 918                 vbus-supply = <&vdd_usb1_vbus>;
 919         };
 920
 921         usb@0,7d004000 {
 922                 status = "okay";
 923         };
 924
 925         usb-phy@0,7d004000 {
 926                 status = "okay";
 927                 vbus-supply = <&vdd_run_cam>;
 928         };
 929
 930         usb@0,7d008000 {
 931                 status = "okay";
 932         };
 933
 934         usb-phy@0,7d008000 {
 935                 status = "okay";
 936                 vbus-supply = <&vdd_usb3_vbus>;
 937         };
 938
 939         backlight: backlight {
 940                 compatible = "pwm-backlight";
 941
 942                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 943                 power-supply = <&vdd_led>;
 944                 pwms = <&pwm 1 1000000>;
 945
 946                 brightness-levels = <0 4 8 16 32 64 128 255>;
 947                 default-brightness-level = <6>;
 948
 949                 backlight-boot-off;
 950         };
 951
 952         clocks {
 953                 compatible = "simple-bus";
 954                 #address-cells = <1>;
 955                 #size-cells = <0>;
 956
 957                 clk32k_in: clock@0 {
 958                         compatible = "fixed-clock";
 959                         reg=<0>;
 960                         #clock-cells = <0>;
 961                         clock-frequency = <32768>;
 962                 };
 963         };
 964
 965         gpio-keys {
 966                 compatible = "gpio-keys";
 967
 968                 lid {
 969                         label = "Lid";
 970                         gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
 971                         linux,input-type = <5>;
 972                         linux,code = <0>;
 973                         debounce-interval = <1>;
 974                         gpio-key,wakeup;
 975                 };
 976
 977                 power {
 978                         label = "Power";
 979                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
 980                         linux,code = <KEY_POWER>;
 981                         debounce-interval = <10>;
 982                         gpio-key,wakeup;
 983                 };
 984         };
 985
 986         panel: panel {
 987                 compatible = "innolux,n116bge", "simple-panel";
 988                 backlight = <&backlight>;
 989                 ddc-i2c-bus = <&dpaux>;
 990         };
 991
 992         regulators {
 993                 compatible = "simple-bus";
 994                 #address-cells = <1>;
 995                 #size-cells = <0>;
 996
 997                 vdd_mux: regulator@0 {
 998                         compatible = "regulator-fixed";
 999                         reg = <0>;
1000                         regulator-name = "+VDD_MUX";
1001                         regulator-min-microvolt = <19000000>;
1002                         regulator-max-microvolt = <19000000>;
1003                         regulator-always-on;
1004                         regulator-boot-on;
1005                 };
1006
1007                 vdd_5v0_sys: regulator@1 {
1008                         compatible = "regulator-fixed";
1009                         reg = <1>;
1010                         regulator-name = "+5V_SYS";
1011                         regulator-min-microvolt = <5000000>;
1012                         regulator-max-microvolt = <5000000>;
1013                         regulator-always-on;
1014                         regulator-boot-on;
1015                         vin-supply = <&vdd_mux>;
1016                 };
1017
1018                 vdd_3v3_sys: regulator@2 {
1019                         compatible = "regulator-fixed";
1020                         reg = <2>;
1021                         regulator-name = "+3.3V_SYS";
1022                         regulator-min-microvolt = <3300000>;
1023                         regulator-max-microvolt = <3300000>;
1024                         regulator-always-on;
1025                         regulator-boot-on;
1026                         vin-supply = <&vdd_mux>;
1027                 };
1028
1029                 vdd_3v3_run: regulator@3 {
1030                         compatible = "regulator-fixed";
1031                         reg = <3>;
1032                         regulator-name = "+3.3V_RUN";
1033                         regulator-min-microvolt = <3300000>;
1034                         regulator-max-microvolt = <3300000>;
1035                         regulator-always-on;
1036                         regulator-boot-on;
1037                         gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
1038                         enable-active-high;
1039                         vin-supply = <&vdd_3v3_sys>;
1040                 };
1041
1042                 vdd_3v3_hdmi: regulator@4 {
1043                         compatible = "regulator-fixed";
1044                         reg = <4>;
1045                         regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1046                         regulator-min-microvolt = <3300000>;
1047                         regulator-max-microvolt = <3300000>;
1048                         vin-supply = <&vdd_3v3_run>;
1049                 };
1050
1051                 vdd_led: regulator@5 {
1052                         compatible = "regulator-fixed";
1053                         reg = <5>;
1054                         regulator-name = "+VDD_LED";
1055                         regulator-min-microvolt = <3300000>;
1056                         regulator-max-microvolt = <3300000>;
1057                         gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1058                         enable-active-high;
1059                         vin-supply = <&vdd_mux>;
1060                 };
1061
1062                 vdd_usb1_vbus: regulator@6 {
1063                         compatible = "regulator-fixed";
1064                         reg = <6>;
1065                         regulator-name = "+5V_USB_HS";
1066                         regulator-min-microvolt = <5000000>;
1067                         regulator-max-microvolt = <5000000>;
1068                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1069                         enable-active-high;
1070                         gpio-open-drain;
1071                         vin-supply = <&vdd_5v0_sys>;
1072                 };
1073
1074                 vdd_usb3_vbus: regulator@7 {
1075                         compatible = "regulator-fixed";
1076                         reg = <7>;
1077                         regulator-name = "+5V_USB_SS";
1078                         regulator-min-microvolt = <5000000>;
1079                         regulator-max-microvolt = <5000000>;
1080                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1081                         enable-active-high;
1082                         gpio-open-drain;
1083                         vin-supply = <&vdd_5v0_sys>;
1084                 };
1085
1086                 vdd_3v3_panel: regulator@8 {
1087                         compatible = "regulator-fixed";
1088                         reg = <8>;
1089                         regulator-name = "+3.3V_PANEL";
1090                         regulator-min-microvolt = <3300000>;
1091                         regulator-max-microvolt = <3300000>;
1092                         gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
1093                         enable-active-high;
1094                         vin-supply = <&vdd_3v3_sys>;
1095                 };
1096
1097                 vdd_hdmi_pll: regulator@9 {
1098                         compatible = "regulator-fixed";
1099                         reg = <9>;
1100                         regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
1101                         regulator-min-microvolt = <1050000>;
1102                         regulator-max-microvolt = <1050000>;
1103                         gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1104                         vin-supply = <&vdd_1v05_run>;
1105                 };
1106
1107                 vdd_5v0_hdmi: regulator@10 {
1108                         compatible = "regulator-fixed";
1109                         reg = <10>;
1110                         regulator-name = "+5V_HDMI_CON";
1111                         regulator-min-microvolt = <5000000>;
1112                         regulator-max-microvolt = <5000000>;
1113                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1114                         enable-active-high;
1115                         vin-supply = <&vdd_5v0_sys>;
1116                 };
1117
1118                 vdd_5v0_ts: regulator@11 {
1119                         compatible = "regulator-fixed";
1120                         reg = <11>;
1121                         regulator-name = "+5V_VDD_TS";
1122                         regulator-min-microvolt = <5000000>;
1123                         regulator-max-microvolt = <5000000>;
1124                         regulator-always-on;
1125                         regulator-boot-on;
1126                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1127                         enable-active-high;
1128                 };
1129         };
1130 };