arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0
[cascardo/linux.git] / arch / arm64 / boot / dts / renesas / r8a7795-salvator-x.dts
1 /*
2  * Device Tree Source for the Salvator-X board
3  *
4  * Copyright (C) 2015 Renesas Electronics Corp.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2.  This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 /*
12  * SSI-AK4613
13  *
14  * This command is required when Playback/Capture
15  *
16  *      amixer set "DVC Out" 100%
17  *      amixer set "DVC In" 100%
18  *
19  * You can use Mute
20  *
21  *      amixer set "DVC Out Mute" on
22  *      amixer set "DVC In Mute" on
23  *
24  * You can use Volume Ramp
25  *
26  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
27  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
28  *      amixer set "DVC Out Ramp" on
29  *      aplay xxx.wav &
30  *      amixer set "DVC Out"  80%  // Volume Down
31  *      amixer set "DVC Out" 100%  // Volume Up
32  */
33
34 /dts-v1/;
35 #include "r8a7795.dtsi"
36 #include <dt-bindings/gpio/gpio.h>
37
38 / {
39         model = "Renesas Salvator-X board based on r8a7795";
40         compatible = "renesas,salvator-x", "renesas,r8a7795";
41
42         aliases {
43                 serial0 = &scif2;
44                 serial1 = &scif1;
45                 ethernet0 = &avb;
46         };
47
48         chosen {
49                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
50                 stdout-path = "serial0:115200n8";
51         };
52
53         memory@48000000 {
54                 device_type = "memory";
55                 /* first 128MB is reserved for secure area. */
56                 reg = <0x0 0x48000000 0x0 0x38000000>;
57         };
58
59         x12_clk: x12_clk {
60                 compatible = "fixed-clock";
61                 #clock-cells = <0>;
62                 clock-frequency = <24576000>;
63         };
64
65         vcc_sdhi0: regulator-vcc-sdhi0 {
66                 compatible = "regulator-fixed";
67
68                 regulator-name = "SDHI0 Vcc";
69                 regulator-min-microvolt = <3300000>;
70                 regulator-max-microvolt = <3300000>;
71
72                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
73                 enable-active-high;
74         };
75
76         vccq_sdhi0: regulator-vccq-sdhi0 {
77                 compatible = "regulator-gpio";
78
79                 regulator-name = "SDHI0 VccQ";
80                 regulator-min-microvolt = <1800000>;
81                 regulator-max-microvolt = <3300000>;
82
83                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
84                 gpios-states = <1>;
85                 states = <3300000 1
86                           1800000 0>;
87         };
88
89         vcc_sdhi3: regulator-vcc-sdhi3 {
90                 compatible = "regulator-fixed";
91
92                 regulator-name = "SDHI3 Vcc";
93                 regulator-min-microvolt = <3300000>;
94                 regulator-max-microvolt = <3300000>;
95
96                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
97                 enable-active-high;
98         };
99
100         vccq_sdhi3: regulator-vccq-sdhi3 {
101                 compatible = "regulator-gpio";
102
103                 regulator-name = "SDHI3 VccQ";
104                 regulator-min-microvolt = <1800000>;
105                 regulator-max-microvolt = <3300000>;
106
107                 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
108                 gpios-states = <1>;
109                 states = <3300000 1
110                           1800000 0>;
111         };
112
113         vbus0_usb2: regulator-vbus0-usb2 {
114                 compatible = "regulator-fixed";
115
116                 regulator-name = "USB20_VBUS0";
117                 regulator-min-microvolt = <5000000>;
118                 regulator-max-microvolt = <5000000>;
119
120                 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
121                 enable-active-high;
122         };
123
124         audio_clkout: audio_clkout {
125                 /*
126                  * This is same as <&rcar_sound 0>
127                  * but needed to avoid cs2000/rcar_sound probe dead-lock
128                  */
129                 compatible = "fixed-clock";
130                 #clock-cells = <0>;
131                 clock-frequency = <11289600>;
132         };
133
134         rsnd_ak4613: sound {
135                 compatible = "simple-audio-card";
136
137                 simple-audio-card,format = "left_j";
138                 simple-audio-card,bitclock-master = <&sndcpu>;
139                 simple-audio-card,frame-master = <&sndcpu>;
140
141                 sndcpu: simple-audio-card,cpu {
142                         sound-dai = <&rcar_sound>;
143                 };
144
145                 sndcodec: simple-audio-card,codec {
146                         sound-dai = <&ak4613>;
147                 };
148         };
149 };
150
151 &extal_clk {
152         clock-frequency = <16666666>;
153 };
154
155 &extalr_clk {
156         clock-frequency = <32768>;
157 };
158
159 &pfc {
160         pinctrl-0 = <&scif_clk_pins>;
161         pinctrl-names = "default";
162
163         scif1_pins: scif1 {
164                 groups = "scif1_data_a", "scif1_ctrl";
165                 function = "scif1";
166         };
167         scif2_pins: scif2 {
168                 groups = "scif2_data_a";
169                 function = "scif2";
170         };
171         scif_clk_pins: scif_clk {
172                 groups = "scif_clk_a";
173                 function = "scif_clk";
174         };
175
176         i2c2_pins: i2c2 {
177                 groups = "i2c2_a";
178                 function = "i2c2";
179         };
180
181         avb_pins: avb {
182                 groups = "avb_mdc";
183                 function = "avb";
184         };
185
186         sdhi0_pins: sd0 {
187                 groups = "sdhi0_data4", "sdhi0_ctrl";
188                 function = "sdhi0";
189         };
190
191         sdhi3_pins: sd3 {
192                 groups = "sdhi3_data4", "sdhi3_ctrl";
193                 function = "sdhi3";
194         };
195
196         sound_pins: sound {
197                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
198                 function = "ssi";
199         };
200
201         sound_clk_pins: sound_clk {
202                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
203                          "audio_clkout_a", "audio_clkout3_a";
204                 function = "audio_clk";
205         };
206
207         usb0_pins: usb0 {
208                 groups = "usb0";
209                 function = "usb0";
210         };
211
212         usb1_pins: usb1 {
213                 groups = "usb1";
214                 function = "usb1";
215         };
216
217         usb2_pins: usb2 {
218                 groups = "usb2";
219                 function = "usb2";
220         };
221 };
222
223 &scif1 {
224         pinctrl-0 = <&scif1_pins>;
225         pinctrl-names = "default";
226
227         uart-has-rtscts;
228         status = "okay";
229 };
230
231 &scif2 {
232         pinctrl-0 = <&scif2_pins>;
233         pinctrl-names = "default";
234
235         status = "okay";
236 };
237
238 &scif_clk {
239         clock-frequency = <14745600>;
240         status = "okay";
241 };
242
243 &i2c2 {
244         pinctrl-0 = <&i2c2_pins>;
245         pinctrl-names = "default";
246
247         status = "okay";
248
249         clock-frequency = <100000>;
250
251         ak4613: codec@10 {
252                 compatible = "asahi-kasei,ak4613";
253                 #sound-dai-cells = <0>;
254                 reg = <0x10>;
255                 clocks = <&rcar_sound 3>;
256
257                 asahi-kasei,in1-single-end;
258                 asahi-kasei,in2-single-end;
259                 asahi-kasei,out1-single-end;
260                 asahi-kasei,out2-single-end;
261                 asahi-kasei,out3-single-end;
262                 asahi-kasei,out4-single-end;
263                 asahi-kasei,out5-single-end;
264                 asahi-kasei,out6-single-end;
265         };
266
267         cs2000: clk_multiplier@4f {
268                 #clock-cells = <0>;
269                 compatible = "cirrus,cs2000-cp";
270                 reg = <0x4f>;
271                 clocks = <&audio_clkout>, <&x12_clk>;
272                 clock-names = "clk_in", "ref_clk";
273
274                 assigned-clocks = <&cs2000>;
275                 assigned-clock-rates = <24576000>; /* 1/1 divide */
276         };
277 };
278
279 &rcar_sound {
280         pinctrl-0 = <&sound_pins &sound_clk_pins>;
281         pinctrl-names = "default";
282
283         /* Single DAI */
284         #sound-dai-cells = <0>;
285
286         /* audio_clkout0/1/2/3 */
287         #clock-cells = <1>;
288         clock-frequency = <11289600>;
289
290         status = "okay";
291
292         /* update <audio_clk_b> to <cs2000> */
293         clocks = <&cpg CPG_MOD 1005>,
294                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
295                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
296                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
297                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
298                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
299                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
300                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
301                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
302                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
303                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
304                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
305                  <&audio_clk_a>, <&cs2000>,
306                  <&audio_clk_c>,
307                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
308
309         rcar_sound,dai {
310                 dai0 {
311                         playback = <&ssi0 &src0 &dvc0>;
312                         capture  = <&ssi1 &src1 &dvc1>;
313                 };
314         };
315 };
316
317 &sata {
318         status = "okay";
319 };
320
321 &sdhi0 {
322         pinctrl-0 = <&sdhi0_pins>;
323         pinctrl-names = "default";
324
325         vmmc-supply = <&vcc_sdhi0>;
326         vqmmc-supply = <&vccq_sdhi0>;
327         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
328         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
329         bus-width = <4>;
330         status = "okay";
331 };
332
333 &sdhi3 {
334         pinctrl-0 = <&sdhi3_pins>;
335         pinctrl-names = "default";
336
337         vmmc-supply = <&vcc_sdhi3>;
338         vqmmc-supply = <&vccq_sdhi3>;
339         cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
340         wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
341         bus-width = <4>;
342         status = "okay";
343 };
344
345 &ssi1 {
346         shared-pin;
347 };
348
349 &wdt0 {
350         timeout-sec = <60>;
351         status = "okay";
352 };
353
354 &audio_clk_a {
355         clock-frequency = <22579200>;
356 };
357
358 &avb {
359         pinctrl-0 = <&avb_pins>;
360         pinctrl-names = "default";
361         renesas,no-ether-link;
362         phy-handle = <&phy0>;
363         status = "okay";
364
365         phy0: ethernet-phy@0 {
366                 rxc-skew-ps = <900>;
367                 rxdv-skew-ps = <0>;
368                 rxd0-skew-ps = <0>;
369                 rxd1-skew-ps = <0>;
370                 rxd2-skew-ps = <0>;
371                 rxd3-skew-ps = <0>;
372                 txc-skew-ps = <900>;
373                 txen-skew-ps = <0>;
374                 txd0-skew-ps = <0>;
375                 txd1-skew-ps = <0>;
376                 txd2-skew-ps = <0>;
377                 txd3-skew-ps = <0>;
378                 reg = <0>;
379                 interrupt-parent = <&gpio2>;
380                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
381         };
382 };
383
384 &xhci0 {
385         status = "okay";
386 };
387
388 &usb2_phy0 {
389         pinctrl-0 = <&usb0_pins>;
390         pinctrl-names = "default";
391
392         vbus-supply = <&vbus0_usb2>;
393         status = "okay";
394 };
395
396 &usb2_phy1 {
397         pinctrl-0 = <&usb1_pins>;
398         pinctrl-names = "default";
399
400         status = "okay";
401 };
402
403 &usb2_phy2 {
404         pinctrl-0 = <&usb2_pins>;
405         pinctrl-names = "default";
406
407         status = "okay";
408 };
409
410 &ehci1 {
411         status = "okay";
412 };
413
414 &ehci2 {
415         status = "okay";
416 };
417
418 &ohci1 {
419         status = "okay";
420 };
421
422 &ohci2 {
423         status = "okay";
424 };
425
426 &pcie_bus_clk {
427         clock-frequency = <100000000>;
428         status = "okay";
429 };
430
431 &pciec0 {
432         status = "okay";
433 };
434
435 &pciec1 {
436         status = "okay";
437 };