arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci-0.2";
  32                 method = "smc";
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a57_0: cpu@0 {
  40                         compatible = "arm,cortex-a57", "arm,armv8";
  41                         reg = <0x0>;
  42                         device_type = "cpu";
  43                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  44                         next-level-cache = <&L2_CA57>;
  45                         enable-method = "psci";
  46                 };
  47
  48                 a57_1: cpu@1 {
  49                         compatible = "arm,cortex-a57","arm,armv8";
  50                         reg = <0x1>;
  51                         device_type = "cpu";
  52                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  53                         next-level-cache = <&L2_CA57>;
  54                         enable-method = "psci";
  55                 };
  56
  57                 a57_2: cpu@2 {
  58                         compatible = "arm,cortex-a57","arm,armv8";
  59                         reg = <0x2>;
  60                         device_type = "cpu";
  61                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  62                         next-level-cache = <&L2_CA57>;
  63                         enable-method = "psci";
  64                 };
  65
  66                 a57_3: cpu@3 {
  67                         compatible = "arm,cortex-a57","arm,armv8";
  68                         reg = <0x3>;
  69                         device_type = "cpu";
  70                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  71                         next-level-cache = <&L2_CA57>;
  72                         enable-method = "psci";
  73                 };
  74
  75                 L2_CA57: cache-controller@0 {
  76                         compatible = "cache";
  77                         reg = <0>;
  78                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
  79                         cache-unified;
  80                         cache-level = <2>;
  81                 };
  82
  83                 L2_CA53: cache-controller@100 {
  84                         compatible = "cache";
  85                         reg = <0x100>;
  86                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
  87                         cache-unified;
  88                         cache-level = <2>;
  89                 };
  90         };
  91
  92         extal_clk: extal {
  93                 compatible = "fixed-clock";
  94                 #clock-cells = <0>;
  95                 /* This value must be overridden by the board */
  96                 clock-frequency = <0>;
  97         };
  98
  99         extalr_clk: extalr {
 100                 compatible = "fixed-clock";
 101                 #clock-cells = <0>;
 102                 /* This value must be overridden by the board */
 103                 clock-frequency = <0>;
 104         };
 105
 106         /*
 107          * The external audio clocks are configured as 0 Hz fixed frequency
 108          * clocks by default.
 109          * Boards that provide audio clocks should override them.
 110          */
 111         audio_clk_a: audio_clk_a {
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <0>;
 115         };
 116
 117         audio_clk_b: audio_clk_b {
 118                 compatible = "fixed-clock";
 119                 #clock-cells = <0>;
 120                 clock-frequency = <0>;
 121         };
 122
 123         audio_clk_c: audio_clk_c {
 124                 compatible = "fixed-clock";
 125                 #clock-cells = <0>;
 126                 clock-frequency = <0>;
 127         };
 128
 129         /* External CAN clock - to be overridden by boards that provide it */
 130         can_clk: can {
 131                 compatible = "fixed-clock";
 132                 #clock-cells = <0>;
 133                 clock-frequency = <0>;
 134         };
 135
 136         /* External SCIF clock - to be overridden by boards that provide it */
 137         scif_clk: scif {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 clock-frequency = <0>;
 141         };
 142
 143         /* External PCIe clock - can be overridden by the board */
 144         pcie_bus_clk: pcie_bus {
 145                 compatible = "fixed-clock";
 146                 #clock-cells = <0>;
 147                 clock-frequency = <0>;
 148         };
 149
 150         soc {
 151                 compatible = "simple-bus";
 152                 interrupt-parent = <&gic>;
 153
 154                 #address-cells = <2>;
 155                 #size-cells = <2>;
 156                 ranges;
 157
 158                 gic: interrupt-controller@f1010000 {
 159                         compatible = "arm,gic-400";
 160                         #interrupt-cells = <3>;
 161                         #address-cells = <0>;
 162                         interrupt-controller;
 163                         reg = <0x0 0xf1010000 0 0x1000>,
 164                               <0x0 0xf1020000 0 0x20000>,
 165                               <0x0 0xf1040000 0 0x20000>,
 166                               <0x0 0xf1060000 0 0x20000>;
 167                         interrupts = <GIC_PPI 9
 168                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 169                 };
 170
 171                 wdt0: watchdog@e6020000 {
 172                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 173                         reg = <0 0xe6020000 0 0x0c>;
 174                         clocks = <&cpg CPG_MOD 402>;
 175                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 176                         status = "disabled";
 177                 };
 178
 179                 gpio0: gpio@e6050000 {
 180                         compatible = "renesas,gpio-r8a7795",
 181                                      "renesas,gpio-rcar";
 182                         reg = <0 0xe6050000 0 0x50>;
 183                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 184                         #gpio-cells = <2>;
 185                         gpio-controller;
 186                         gpio-ranges = <&pfc 0 0 16>;
 187                         #interrupt-cells = <2>;
 188                         interrupt-controller;
 189                         clocks = <&cpg CPG_MOD 912>;
 190                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 191                 };
 192
 193                 gpio1: gpio@e6051000 {
 194                         compatible = "renesas,gpio-r8a7795",
 195                                      "renesas,gpio-rcar";
 196                         reg = <0 0xe6051000 0 0x50>;
 197                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 198                         #gpio-cells = <2>;
 199                         gpio-controller;
 200                         gpio-ranges = <&pfc 0 32 28>;
 201                         #interrupt-cells = <2>;
 202                         interrupt-controller;
 203                         clocks = <&cpg CPG_MOD 911>;
 204                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 205                 };
 206
 207                 gpio2: gpio@e6052000 {
 208                         compatible = "renesas,gpio-r8a7795",
 209                                      "renesas,gpio-rcar";
 210                         reg = <0 0xe6052000 0 0x50>;
 211                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 212                         #gpio-cells = <2>;
 213                         gpio-controller;
 214                         gpio-ranges = <&pfc 0 64 15>;
 215                         #interrupt-cells = <2>;
 216                         interrupt-controller;
 217                         clocks = <&cpg CPG_MOD 910>;
 218                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 219                 };
 220
 221                 gpio3: gpio@e6053000 {
 222                         compatible = "renesas,gpio-r8a7795",
 223                                      "renesas,gpio-rcar";
 224                         reg = <0 0xe6053000 0 0x50>;
 225                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 226                         #gpio-cells = <2>;
 227                         gpio-controller;
 228                         gpio-ranges = <&pfc 0 96 16>;
 229                         #interrupt-cells = <2>;
 230                         interrupt-controller;
 231                         clocks = <&cpg CPG_MOD 909>;
 232                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 233                 };
 234
 235                 gpio4: gpio@e6054000 {
 236                         compatible = "renesas,gpio-r8a7795",
 237                                      "renesas,gpio-rcar";
 238                         reg = <0 0xe6054000 0 0x50>;
 239                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 240                         #gpio-cells = <2>;
 241                         gpio-controller;
 242                         gpio-ranges = <&pfc 0 128 18>;
 243                         #interrupt-cells = <2>;
 244                         interrupt-controller;
 245                         clocks = <&cpg CPG_MOD 908>;
 246                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 247                 };
 248
 249                 gpio5: gpio@e6055000 {
 250                         compatible = "renesas,gpio-r8a7795",
 251                                      "renesas,gpio-rcar";
 252                         reg = <0 0xe6055000 0 0x50>;
 253                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 160 26>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 907>;
 260                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 261                 };
 262
 263                 gpio6: gpio@e6055400 {
 264                         compatible = "renesas,gpio-r8a7795",
 265                                      "renesas,gpio-rcar";
 266                         reg = <0 0xe6055400 0 0x50>;
 267                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 268                         #gpio-cells = <2>;
 269                         gpio-controller;
 270                         gpio-ranges = <&pfc 0 192 32>;
 271                         #interrupt-cells = <2>;
 272                         interrupt-controller;
 273                         clocks = <&cpg CPG_MOD 906>;
 274                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 275                 };
 276
 277                 gpio7: gpio@e6055800 {
 278                         compatible = "renesas,gpio-r8a7795",
 279                                      "renesas,gpio-rcar";
 280                         reg = <0 0xe6055800 0 0x50>;
 281                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 282                         #gpio-cells = <2>;
 283                         gpio-controller;
 284                         gpio-ranges = <&pfc 0 224 4>;
 285                         #interrupt-cells = <2>;
 286                         interrupt-controller;
 287                         clocks = <&cpg CPG_MOD 905>;
 288                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 289                 };
 290
 291                 pmu_a57 {
 292                         compatible = "arm,cortex-a57-pmu";
 293                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 294                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 295                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 296                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 297                         interrupt-affinity = <&a57_0>,
 298                                              <&a57_1>,
 299                                              <&a57_2>,
 300                                              <&a57_3>;
 301                 };
 302
 303                 timer {
 304                         compatible = "arm,armv8-timer";
 305                         interrupts = <GIC_PPI 13
 306                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 307                                      <GIC_PPI 14
 308                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 309                                      <GIC_PPI 11
 310                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 311                                      <GIC_PPI 10
 312                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 313                 };
 314
 315                 cpg: clock-controller@e6150000 {
 316                         compatible = "renesas,r8a7795-cpg-mssr";
 317                         reg = <0 0xe6150000 0 0x1000>;
 318                         clocks = <&extal_clk>, <&extalr_clk>;
 319                         clock-names = "extal", "extalr";
 320                         #clock-cells = <2>;
 321                         #power-domain-cells = <0>;
 322                 };
 323
 324                 sysc: system-controller@e6180000 {
 325                         compatible = "renesas,r8a7795-sysc";
 326                         reg = <0 0xe6180000 0 0x0400>;
 327                         #power-domain-cells = <1>;
 328                 };
 329
 330                 audma0: dma-controller@ec700000 {
 331                         compatible = "renesas,rcar-dmac";
 332                         reg = <0 0xec700000 0 0x10000>;
 333                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 334                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 345                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 346                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 347                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 348                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 349                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 350                         interrupt-names = "error",
 351                                         "ch0", "ch1", "ch2", "ch3",
 352                                         "ch4", "ch5", "ch6", "ch7",
 353                                         "ch8", "ch9", "ch10", "ch11",
 354                                         "ch12", "ch13", "ch14", "ch15";
 355                         clocks = <&cpg CPG_MOD 502>;
 356                         clock-names = "fck";
 357                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 358                         #dma-cells = <1>;
 359                         dma-channels = <16>;
 360                 };
 361
 362                 audma1: dma-controller@ec720000 {
 363                         compatible = "renesas,rcar-dmac";
 364                         reg = <0 0xec720000 0 0x10000>;
 365                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 366                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 367                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 368                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 369                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 371                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 372                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 373                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 374                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 375                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 376                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 377                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 378                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 379                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 380                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 381                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 382                         interrupt-names = "error",
 383                                         "ch0", "ch1", "ch2", "ch3",
 384                                         "ch4", "ch5", "ch6", "ch7",
 385                                         "ch8", "ch9", "ch10", "ch11",
 386                                         "ch12", "ch13", "ch14", "ch15";
 387                         clocks = <&cpg CPG_MOD 501>;
 388                         clock-names = "fck";
 389                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 390                         #dma-cells = <1>;
 391                         dma-channels = <16>;
 392                 };
 393
 394                 pfc: pfc@e6060000 {
 395                         compatible = "renesas,pfc-r8a7795";
 396                         reg = <0 0xe6060000 0 0x50c>;
 397                 };
 398
 399                 intc_ex: interrupt-controller@e61c0000 {
 400                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 401                         #interrupt-cells = <2>;
 402                         interrupt-controller;
 403                         reg = <0 0xe61c0000 0 0x200>;
 404                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 405                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 406                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 407                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 408                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 409                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 410                         clocks = <&cpg CPG_MOD 407>;
 411                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 412                 };
 413
 414                 dmac0: dma-controller@e6700000 {
 415                         compatible = "renesas,dmac-r8a7795",
 416                                      "renesas,rcar-dmac";
 417                         reg = <0 0xe6700000 0 0x10000>;
 418                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 419                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 420                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 421                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 422                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 423                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 424                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 425                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 435                         interrupt-names = "error",
 436                                         "ch0", "ch1", "ch2", "ch3",
 437                                         "ch4", "ch5", "ch6", "ch7",
 438                                         "ch8", "ch9", "ch10", "ch11",
 439                                         "ch12", "ch13", "ch14", "ch15";
 440                         clocks = <&cpg CPG_MOD 219>;
 441                         clock-names = "fck";
 442                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 443                         #dma-cells = <1>;
 444                         dma-channels = <16>;
 445                 };
 446
 447                 dmac1: dma-controller@e7300000 {
 448                         compatible = "renesas,dmac-r8a7795",
 449                                      "renesas,rcar-dmac";
 450                         reg = <0 0xe7300000 0 0x10000>;
 451                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 452                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 453                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 454                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 455                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 456                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 457                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 458                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 468                         interrupt-names = "error",
 469                                         "ch0", "ch1", "ch2", "ch3",
 470                                         "ch4", "ch5", "ch6", "ch7",
 471                                         "ch8", "ch9", "ch10", "ch11",
 472                                         "ch12", "ch13", "ch14", "ch15";
 473                         clocks = <&cpg CPG_MOD 218>;
 474                         clock-names = "fck";
 475                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 476                         #dma-cells = <1>;
 477                         dma-channels = <16>;
 478                 };
 479
 480                 dmac2: dma-controller@e7310000 {
 481                         compatible = "renesas,dmac-r8a7795",
 482                                      "renesas,rcar-dmac";
 483                         reg = <0 0xe7310000 0 0x10000>;
 484                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 485                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 486                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 487                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 488                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 489                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 490                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 491                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 492                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 493                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 494                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 497                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 498                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 501                         interrupt-names = "error",
 502                                         "ch0", "ch1", "ch2", "ch3",
 503                                         "ch4", "ch5", "ch6", "ch7",
 504                                         "ch8", "ch9", "ch10", "ch11",
 505                                         "ch12", "ch13", "ch14", "ch15";
 506                         clocks = <&cpg CPG_MOD 217>;
 507                         clock-names = "fck";
 508                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 509                         #dma-cells = <1>;
 510                         dma-channels = <16>;
 511                 };
 512
 513                 avb: ethernet@e6800000 {
 514                         compatible = "renesas,etheravb-r8a7795",
 515                                      "renesas,etheravb-rcar-gen3";
 516                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 517                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 518                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 519                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 521                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 522                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 523                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 524                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 525                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 526                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 527                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 528                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 529                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 532                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 533                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 534                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 535                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 536                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 537                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 538                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 539                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 540                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 541                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 542                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 543                                           "ch4", "ch5", "ch6", "ch7",
 544                                           "ch8", "ch9", "ch10", "ch11",
 545                                           "ch12", "ch13", "ch14", "ch15",
 546                                           "ch16", "ch17", "ch18", "ch19",
 547                                           "ch20", "ch21", "ch22", "ch23",
 548                                           "ch24";
 549                         clocks = <&cpg CPG_MOD 812>;
 550                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 551                         phy-mode = "rgmii-id";
 552                         #address-cells = <1>;
 553                         #size-cells = <0>;
 554                 };
 555
 556                 can0: can@e6c30000 {
 557                         compatible = "renesas,can-r8a7795",
 558                                      "renesas,rcar-gen3-can";
 559                         reg = <0 0xe6c30000 0 0x1000>;
 560                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 561                         clocks = <&cpg CPG_MOD 916>,
 562                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 563                                <&can_clk>;
 564                         clock-names = "clkp1", "clkp2", "can_clk";
 565                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 566                         assigned-clock-rates = <40000000>;
 567                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 568                         status = "disabled";
 569                 };
 570
 571                 can1: can@e6c38000 {
 572                         compatible = "renesas,can-r8a7795",
 573                                      "renesas,rcar-gen3-can";
 574                         reg = <0 0xe6c38000 0 0x1000>;
 575                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 576                         clocks = <&cpg CPG_MOD 915>,
 577                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 578                                <&can_clk>;
 579                         clock-names = "clkp1", "clkp2", "can_clk";
 580                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 581                         assigned-clock-rates = <40000000>;
 582                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 583                         status = "disabled";
 584                 };
 585
 586                 canfd: can@e66c0000 {
 587                         compatible = "renesas,r8a7795-canfd",
 588                                      "renesas,rcar-gen3-canfd";
 589                         reg = <0 0xe66c0000 0 0x8000>;
 590                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 591                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 592                         clocks = <&cpg CPG_MOD 914>,
 593                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 594                                <&can_clk>;
 595                         clock-names = "fck", "canfd", "can_clk";
 596                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 597                         assigned-clock-rates = <40000000>;
 598                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 599                         status = "disabled";
 600
 601                         channel0 {
 602                                 status = "disabled";
 603                         };
 604
 605                         channel1 {
 606                                 status = "disabled";
 607                         };
 608                 };
 609
 610                 hscif0: serial@e6540000 {
 611                         compatible = "renesas,hscif-r8a7795",
 612                                      "renesas,rcar-gen3-hscif",
 613                                      "renesas,hscif";
 614                         reg = <0 0xe6540000 0 96>;
 615                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 616                         clocks = <&cpg CPG_MOD 520>,
 617                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 618                                  <&scif_clk>;
 619                         clock-names = "fck", "brg_int", "scif_clk";
 620                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 621                         dma-names = "tx", "rx";
 622                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 623                         status = "disabled";
 624                 };
 625
 626                 hscif1: serial@e6550000 {
 627                         compatible = "renesas,hscif-r8a7795",
 628                                      "renesas,rcar-gen3-hscif",
 629                                      "renesas,hscif";
 630                         reg = <0 0xe6550000 0 96>;
 631                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 632                         clocks = <&cpg CPG_MOD 519>,
 633                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 634                                  <&scif_clk>;
 635                         clock-names = "fck", "brg_int", "scif_clk";
 636                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 637                         dma-names = "tx", "rx";
 638                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 639                         status = "disabled";
 640                 };
 641
 642                 hscif2: serial@e6560000 {
 643                         compatible = "renesas,hscif-r8a7795",
 644                                      "renesas,rcar-gen3-hscif",
 645                                      "renesas,hscif";
 646                         reg = <0 0xe6560000 0 96>;
 647                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 648                         clocks = <&cpg CPG_MOD 518>,
 649                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 650                                  <&scif_clk>;
 651                         clock-names = "fck", "brg_int", "scif_clk";
 652                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 653                         dma-names = "tx", "rx";
 654                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 655                         status = "disabled";
 656                 };
 657
 658                 hscif3: serial@e66a0000 {
 659                         compatible = "renesas,hscif-r8a7795",
 660                                      "renesas,rcar-gen3-hscif",
 661                                      "renesas,hscif";
 662                         reg = <0 0xe66a0000 0 96>;
 663                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 664                         clocks = <&cpg CPG_MOD 517>,
 665                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 666                                  <&scif_clk>;
 667                         clock-names = "fck", "brg_int", "scif_clk";
 668                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 669                         dma-names = "tx", "rx";
 670                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 671                         status = "disabled";
 672                 };
 673
 674                 hscif4: serial@e66b0000 {
 675                         compatible = "renesas,hscif-r8a7795",
 676                                      "renesas,rcar-gen3-hscif",
 677                                      "renesas,hscif";
 678                         reg = <0 0xe66b0000 0 96>;
 679                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 680                         clocks = <&cpg CPG_MOD 516>,
 681                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 682                                  <&scif_clk>;
 683                         clock-names = "fck", "brg_int", "scif_clk";
 684                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 685                         dma-names = "tx", "rx";
 686                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 687                         status = "disabled";
 688                 };
 689
 690                 scif0: serial@e6e60000 {
 691                         compatible = "renesas,scif-r8a7795",
 692                                      "renesas,rcar-gen3-scif", "renesas,scif";
 693                         reg = <0 0xe6e60000 0 64>;
 694                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 695                         clocks = <&cpg CPG_MOD 207>,
 696                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 697                                  <&scif_clk>;
 698                         clock-names = "fck", "brg_int", "scif_clk";
 699                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 700                         dma-names = "tx", "rx";
 701                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 702                         status = "disabled";
 703                 };
 704
 705                 scif1: serial@e6e68000 {
 706                         compatible = "renesas,scif-r8a7795",
 707                                      "renesas,rcar-gen3-scif", "renesas,scif";
 708                         reg = <0 0xe6e68000 0 64>;
 709                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 710                         clocks = <&cpg CPG_MOD 206>,
 711                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 712                                  <&scif_clk>;
 713                         clock-names = "fck", "brg_int", "scif_clk";
 714                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 715                         dma-names = "tx", "rx";
 716                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 717                         status = "disabled";
 718                 };
 719
 720                 scif2: serial@e6e88000 {
 721                         compatible = "renesas,scif-r8a7795",
 722                                      "renesas,rcar-gen3-scif", "renesas,scif";
 723                         reg = <0 0xe6e88000 0 64>;
 724                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 725                         clocks = <&cpg CPG_MOD 310>,
 726                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 727                                  <&scif_clk>;
 728                         clock-names = "fck", "brg_int", "scif_clk";
 729                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 730                         dma-names = "tx", "rx";
 731                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 732                         status = "disabled";
 733                 };
 734
 735                 scif3: serial@e6c50000 {
 736                         compatible = "renesas,scif-r8a7795",
 737                                      "renesas,rcar-gen3-scif", "renesas,scif";
 738                         reg = <0 0xe6c50000 0 64>;
 739                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 740                         clocks = <&cpg CPG_MOD 204>,
 741                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 742                                  <&scif_clk>;
 743                         clock-names = "fck", "brg_int", "scif_clk";
 744                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 745                         dma-names = "tx", "rx";
 746                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 747                         status = "disabled";
 748                 };
 749
 750                 scif4: serial@e6c40000 {
 751                         compatible = "renesas,scif-r8a7795",
 752                                      "renesas,rcar-gen3-scif", "renesas,scif";
 753                         reg = <0 0xe6c40000 0 64>;
 754                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 755                         clocks = <&cpg CPG_MOD 203>,
 756                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 757                                  <&scif_clk>;
 758                         clock-names = "fck", "brg_int", "scif_clk";
 759                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 760                         dma-names = "tx", "rx";
 761                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 762                         status = "disabled";
 763                 };
 764
 765                 scif5: serial@e6f30000 {
 766                         compatible = "renesas,scif-r8a7795",
 767                                      "renesas,rcar-gen3-scif", "renesas,scif";
 768                         reg = <0 0xe6f30000 0 64>;
 769                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 770                         clocks = <&cpg CPG_MOD 202>,
 771                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 772                                  <&scif_clk>;
 773                         clock-names = "fck", "brg_int", "scif_clk";
 774                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 775                         dma-names = "tx", "rx";
 776                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 777                         status = "disabled";
 778                 };
 779
 780                 i2c0: i2c@e6500000 {
 781                         #address-cells = <1>;
 782                         #size-cells = <0>;
 783                         compatible = "renesas,i2c-r8a7795";
 784                         reg = <0 0xe6500000 0 0x40>;
 785                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 786                         clocks = <&cpg CPG_MOD 931>;
 787                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 788                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 789                         dma-names = "tx", "rx";
 790                         i2c-scl-internal-delay-ns = <110>;
 791                         status = "disabled";
 792                 };
 793
 794                 i2c1: i2c@e6508000 {
 795                         #address-cells = <1>;
 796                         #size-cells = <0>;
 797                         compatible = "renesas,i2c-r8a7795";
 798                         reg = <0 0xe6508000 0 0x40>;
 799                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 800                         clocks = <&cpg CPG_MOD 930>;
 801                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 802                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 803                         dma-names = "tx", "rx";
 804                         i2c-scl-internal-delay-ns = <6>;
 805                         status = "disabled";
 806                 };
 807
 808                 i2c2: i2c@e6510000 {
 809                         #address-cells = <1>;
 810                         #size-cells = <0>;
 811                         compatible = "renesas,i2c-r8a7795";
 812                         reg = <0 0xe6510000 0 0x40>;
 813                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 814                         clocks = <&cpg CPG_MOD 929>;
 815                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 816                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 817                         dma-names = "tx", "rx";
 818                         i2c-scl-internal-delay-ns = <6>;
 819                         status = "disabled";
 820                 };
 821
 822                 i2c3: i2c@e66d0000 {
 823                         #address-cells = <1>;
 824                         #size-cells = <0>;
 825                         compatible = "renesas,i2c-r8a7795";
 826                         reg = <0 0xe66d0000 0 0x40>;
 827                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 828                         clocks = <&cpg CPG_MOD 928>;
 829                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 830                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 831                         dma-names = "tx", "rx";
 832                         i2c-scl-internal-delay-ns = <110>;
 833                         status = "disabled";
 834                 };
 835
 836                 i2c4: i2c@e66d8000 {
 837                         #address-cells = <1>;
 838                         #size-cells = <0>;
 839                         compatible = "renesas,i2c-r8a7795";
 840                         reg = <0 0xe66d8000 0 0x40>;
 841                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 842                         clocks = <&cpg CPG_MOD 927>;
 843                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 844                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 845                         dma-names = "tx", "rx";
 846                         i2c-scl-internal-delay-ns = <110>;
 847                         status = "disabled";
 848                 };
 849
 850                 i2c5: i2c@e66e0000 {
 851                         #address-cells = <1>;
 852                         #size-cells = <0>;
 853                         compatible = "renesas,i2c-r8a7795";
 854                         reg = <0 0xe66e0000 0 0x40>;
 855                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 856                         clocks = <&cpg CPG_MOD 919>;
 857                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 858                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 859                         dma-names = "tx", "rx";
 860                         i2c-scl-internal-delay-ns = <110>;
 861                         status = "disabled";
 862                 };
 863
 864                 i2c6: i2c@e66e8000 {
 865                         #address-cells = <1>;
 866                         #size-cells = <0>;
 867                         compatible = "renesas,i2c-r8a7795";
 868                         reg = <0 0xe66e8000 0 0x40>;
 869                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 870                         clocks = <&cpg CPG_MOD 918>;
 871                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 872                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 873                         dma-names = "tx", "rx";
 874                         i2c-scl-internal-delay-ns = <6>;
 875                         status = "disabled";
 876                 };
 877
 878                 rcar_sound: sound@ec500000 {
 879                         /*
 880                          * #sound-dai-cells is required
 881                          *
 882                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 883                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 884                          */
 885                         /*
 886                          * #clock-cells is required for audio_clkout0/1/2/3
 887                          *
 888                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 889                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 890                          */
 891                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 892                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 893                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 894                                 <0 0xec540000 0 0x1000>, /* SSIU */
 895                                 <0 0xec541000 0 0x280>,  /* SSI */
 896                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 897                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 898
 899                         clocks = <&cpg CPG_MOD 1005>,
 900                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 901                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 902                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 903                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 904                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 905                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 906                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 907                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 908                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 909                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 910                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 911                                  <&audio_clk_a>, <&audio_clk_b>,
 912                                  <&audio_clk_c>,
 913                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 914                         clock-names = "ssi-all",
 915                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 916                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 917                                       "ssi.1", "ssi.0",
 918                                       "src.9", "src.8", "src.7", "src.6",
 919                                       "src.5", "src.4", "src.3", "src.2",
 920                                       "src.1", "src.0",
 921                                       "dvc.0", "dvc.1",
 922                                       "clk_a", "clk_b", "clk_c", "clk_i";
 923                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 924                         status = "disabled";
 925
 926                         rcar_sound,dvc {
 927                                 dvc0: dvc-0 {
 928                                         dmas = <&audma0 0xbc>;
 929                                         dma-names = "tx";
 930                                 };
 931                                 dvc1: dvc-1 {
 932                                         dmas = <&audma0 0xbe>;
 933                                         dma-names = "tx";
 934                                 };
 935                         };
 936
 937                         rcar_sound,src {
 938                                 src0: src-0 {
 939                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 940                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 941                                         dma-names = "rx", "tx";
 942                                 };
 943                                 src1: src-1 {
 944                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 945                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 946                                         dma-names = "rx", "tx";
 947                                 };
 948                                 src2: src-2 {
 949                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 950                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 951                                         dma-names = "rx", "tx";
 952                                 };
 953                                 src3: src-3 {
 954                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 955                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 956                                         dma-names = "rx", "tx";
 957                                 };
 958                                 src4: src-4 {
 959                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 960                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 961                                         dma-names = "rx", "tx";
 962                                 };
 963                                 src5: src-5 {
 964                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 965                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 966                                         dma-names = "rx", "tx";
 967                                 };
 968                                 src6: src-6 {
 969                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 970                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 971                                         dma-names = "rx", "tx";
 972                                 };
 973                                 src7: src-7 {
 974                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 975                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 976                                         dma-names = "rx", "tx";
 977                                 };
 978                                 src8: src-8 {
 979                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 980                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 981                                         dma-names = "rx", "tx";
 982                                 };
 983                                 src9: src-9 {
 984                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 985                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 986                                         dma-names = "rx", "tx";
 987                                 };
 988                         };
 989
 990                         rcar_sound,ssi {
 991                                 ssi0: ssi-0 {
 992                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
 993                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
 994                                         dma-names = "rx", "tx", "rxu", "txu";
 995                                 };
 996                                 ssi1: ssi-1 {
 997                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
 998                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
 999                                         dma-names = "rx", "tx", "rxu", "txu";
1000                                 };
1001                                 ssi2: ssi-2 {
1002                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1003                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1004                                         dma-names = "rx", "tx", "rxu", "txu";
1005                                 };
1006                                 ssi3: ssi-3 {
1007                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1008                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1009                                         dma-names = "rx", "tx", "rxu", "txu";
1010                                 };
1011                                 ssi4: ssi-4 {
1012                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1013                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1014                                         dma-names = "rx", "tx", "rxu", "txu";
1015                                 };
1016                                 ssi5: ssi-5 {
1017                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1018                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1019                                         dma-names = "rx", "tx", "rxu", "txu";
1020                                 };
1021                                 ssi6: ssi-6 {
1022                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1023                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1024                                         dma-names = "rx", "tx", "rxu", "txu";
1025                                 };
1026                                 ssi7: ssi-7 {
1027                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1028                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1029                                         dma-names = "rx", "tx", "rxu", "txu";
1030                                 };
1031                                 ssi8: ssi-8 {
1032                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1033                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1034                                         dma-names = "rx", "tx", "rxu", "txu";
1035                                 };
1036                                 ssi9: ssi-9 {
1037                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1038                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1039                                         dma-names = "rx", "tx", "rxu", "txu";
1040                                 };
1041                         };
1042                 };
1043
1044                 sata: sata@ee300000 {
1045                         compatible = "renesas,sata-r8a7795";
1046                         reg = <0 0xee300000 0 0x1fff>;
1047                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1048                         clocks = <&cpg CPG_MOD 815>;
1049                         status = "disabled";
1050                 };
1051
1052                 xhci0: usb@ee000000 {
1053                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1054                         reg = <0 0xee000000 0 0xc00>;
1055                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1056                         clocks = <&cpg CPG_MOD 328>;
1057                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1058                         status = "disabled";
1059                 };
1060
1061                 xhci1: usb@ee0400000 {
1062                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1063                         reg = <0 0xee040000 0 0xc00>;
1064                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1065                         clocks = <&cpg CPG_MOD 327>;
1066                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1067                         status = "disabled";
1068                 };
1069
1070                 usb_dmac0: dma-controller@e65a0000 {
1071                         compatible = "renesas,r8a7795-usb-dmac",
1072                                      "renesas,usb-dmac";
1073                         reg = <0 0xe65a0000 0 0x100>;
1074                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1075                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1076                         interrupt-names = "ch0", "ch1";
1077                         clocks = <&cpg CPG_MOD 330>;
1078                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1079                         #dma-cells = <1>;
1080                         dma-channels = <2>;
1081                 };
1082
1083                 usb_dmac1: dma-controller@e65b0000 {
1084                         compatible = "renesas,r8a7795-usb-dmac",
1085                                      "renesas,usb-dmac";
1086                         reg = <0 0xe65b0000 0 0x100>;
1087                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1088                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1089                         interrupt-names = "ch0", "ch1";
1090                         clocks = <&cpg CPG_MOD 331>;
1091                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1092                         #dma-cells = <1>;
1093                         dma-channels = <2>;
1094                 };
1095
1096                 sdhi0: sd@ee100000 {
1097                         compatible = "renesas,sdhi-r8a7795";
1098                         reg = <0 0xee100000 0 0x2000>;
1099                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1100                         clocks = <&cpg CPG_MOD 314>;
1101                         max-frequency = <200000000>;
1102                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1103                         status = "disabled";
1104                 };
1105
1106                 sdhi1: sd@ee120000 {
1107                         compatible = "renesas,sdhi-r8a7795";
1108                         reg = <0 0xee120000 0 0x2000>;
1109                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1110                         clocks = <&cpg CPG_MOD 313>;
1111                         max-frequency = <200000000>;
1112                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1113                         status = "disabled";
1114                 };
1115
1116                 sdhi2: sd@ee140000 {
1117                         compatible = "renesas,sdhi-r8a7795";
1118                         reg = <0 0xee140000 0 0x2000>;
1119                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1120                         clocks = <&cpg CPG_MOD 312>;
1121                         max-frequency = <200000000>;
1122                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1123                         cap-mmc-highspeed;
1124                         status = "disabled";
1125                 };
1126
1127                 sdhi3: sd@ee160000 {
1128                         compatible = "renesas,sdhi-r8a7795";
1129                         reg = <0 0xee160000 0 0x2000>;
1130                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1131                         clocks = <&cpg CPG_MOD 311>;
1132                         max-frequency = <200000000>;
1133                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1134                         cap-mmc-highspeed;
1135                         status = "disabled";
1136                 };
1137
1138                 usb2_phy0: usb-phy@ee080200 {
1139                         compatible = "renesas,usb2-phy-r8a7795";
1140                         reg = <0 0xee080200 0 0x700>;
1141                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1142                         clocks = <&cpg CPG_MOD 703>;
1143                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1144                         #phy-cells = <0>;
1145                         status = "disabled";
1146                 };
1147
1148                 usb2_phy1: usb-phy@ee0a0200 {
1149                         compatible = "renesas,usb2-phy-r8a7795";
1150                         reg = <0 0xee0a0200 0 0x700>;
1151                         clocks = <&cpg CPG_MOD 702>;
1152                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1153                         #phy-cells = <0>;
1154                         status = "disabled";
1155                 };
1156
1157                 usb2_phy2: usb-phy@ee0c0200 {
1158                         compatible = "renesas,usb2-phy-r8a7795";
1159                         reg = <0 0xee0c0200 0 0x700>;
1160                         clocks = <&cpg CPG_MOD 701>;
1161                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1162                         #phy-cells = <0>;
1163                         status = "disabled";
1164                 };
1165
1166                 ehci0: usb@ee080100 {
1167                         compatible = "generic-ehci";
1168                         reg = <0 0xee080100 0 0x100>;
1169                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1170                         clocks = <&cpg CPG_MOD 703>;
1171                         phys = <&usb2_phy0>;
1172                         phy-names = "usb";
1173                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1174                         status = "disabled";
1175                 };
1176
1177                 ehci1: usb@ee0a0100 {
1178                         compatible = "generic-ehci";
1179                         reg = <0 0xee0a0100 0 0x100>;
1180                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1181                         clocks = <&cpg CPG_MOD 702>;
1182                         phys = <&usb2_phy1>;
1183                         phy-names = "usb";
1184                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1185                         status = "disabled";
1186                 };
1187
1188                 ehci2: usb@ee0c0100 {
1189                         compatible = "generic-ehci";
1190                         reg = <0 0xee0c0100 0 0x100>;
1191                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1192                         clocks = <&cpg CPG_MOD 701>;
1193                         phys = <&usb2_phy2>;
1194                         phy-names = "usb";
1195                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1196                         status = "disabled";
1197                 };
1198
1199                 ohci0: usb@ee080000 {
1200                         compatible = "generic-ohci";
1201                         reg = <0 0xee080000 0 0x100>;
1202                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1203                         clocks = <&cpg CPG_MOD 703>;
1204                         phys = <&usb2_phy0>;
1205                         phy-names = "usb";
1206                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1207                         status = "disabled";
1208                 };
1209
1210                 ohci1: usb@ee0a0000 {
1211                         compatible = "generic-ohci";
1212                         reg = <0 0xee0a0000 0 0x100>;
1213                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1214                         clocks = <&cpg CPG_MOD 702>;
1215                         phys = <&usb2_phy1>;
1216                         phy-names = "usb";
1217                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1218                         status = "disabled";
1219                 };
1220
1221                 ohci2: usb@ee0c0000 {
1222                         compatible = "generic-ohci";
1223                         reg = <0 0xee0c0000 0 0x100>;
1224                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1225                         clocks = <&cpg CPG_MOD 701>;
1226                         phys = <&usb2_phy2>;
1227                         phy-names = "usb";
1228                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1229                         status = "disabled";
1230                 };
1231
1232                 hsusb: usb@e6590000 {
1233                         compatible = "renesas,usbhs-r8a7795",
1234                                      "renesas,rcar-gen3-usbhs";
1235                         reg = <0 0xe6590000 0 0x100>;
1236                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1237                         clocks = <&cpg CPG_MOD 704>;
1238                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1239                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1240                         dma-names = "ch0", "ch1", "ch2", "ch3";
1241                         renesas,buswait = <11>;
1242                         phys = <&usb2_phy0>;
1243                         phy-names = "usb";
1244                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1245                         status = "disabled";
1246                 };
1247
1248                 pciec0: pcie@fe000000 {
1249                         compatible = "renesas,pcie-r8a7795";
1250                         reg = <0 0xfe000000 0 0x80000>;
1251                         #address-cells = <3>;
1252                         #size-cells = <2>;
1253                         bus-range = <0x00 0xff>;
1254                         device_type = "pci";
1255                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1256                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1257                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1258                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1259                         /* Map all possible DDR as inbound ranges */
1260                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1261                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1262                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1263                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1264                         #interrupt-cells = <1>;
1265                         interrupt-map-mask = <0 0 0 0>;
1266                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1267                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1268                         clock-names = "pcie", "pcie_bus";
1269                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1270                         status = "disabled";
1271                 };
1272
1273                 pciec1: pcie@ee800000 {
1274                         compatible = "renesas,pcie-r8a7795";
1275                         reg = <0 0xee800000 0 0x80000>;
1276                         #address-cells = <3>;
1277                         #size-cells = <2>;
1278                         bus-range = <0x00 0xff>;
1279                         device_type = "pci";
1280                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1281                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1282                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1283                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1284                         /* Map all possible DDR as inbound ranges */
1285                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1286                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1287                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1288                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1289                         #interrupt-cells = <1>;
1290                         interrupt-map-mask = <0 0 0 0>;
1291                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1292                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1293                         clock-names = "pcie", "pcie_bus";
1294                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1295                         status = "disabled";
1296                 };
1297
1298                 vspbc: vsp@fe920000 {
1299                         compatible = "renesas,vsp2";
1300                         reg = <0 0xfe920000 0 0x8000>;
1301                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1302                         clocks = <&cpg CPG_MOD 624>;
1303                         power-domains = <&sysc R8A7795_PD_A3VP>;
1304
1305                         renesas,fcp = <&fcpvb1>;
1306                 };
1307
1308                 fcpvb1: fcp@fe92f000 {
1309                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1310                         reg = <0 0xfe92f000 0 0x200>;
1311                         clocks = <&cpg CPG_MOD 606>;
1312                         power-domains = <&sysc R8A7795_PD_A3VP>;
1313                 };
1314
1315                 fcpf0: fcp@fe950000 {
1316                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1317                         reg = <0 0xfe950000 0 0x200>;
1318                         clocks = <&cpg CPG_MOD 615>;
1319                         power-domains = <&sysc R8A7795_PD_A3VP>;
1320                 };
1321
1322                 fcpf1: fcp@fe951000 {
1323                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1324                         reg = <0 0xfe951000 0 0x200>;
1325                         clocks = <&cpg CPG_MOD 614>;
1326                         power-domains = <&sysc R8A7795_PD_A3VP>;
1327                 };
1328
1329                 fcpf2: fcp@fe952000 {
1330                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1331                         reg = <0 0xfe952000 0 0x200>;
1332                         clocks = <&cpg CPG_MOD 613>;
1333                         power-domains = <&sysc R8A7795_PD_A3VP>;
1334                 };
1335
1336                 vspbd: vsp@fe960000 {
1337                         compatible = "renesas,vsp2";
1338                         reg = <0 0xfe960000 0 0x8000>;
1339                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1340                         clocks = <&cpg CPG_MOD 626>;
1341                         power-domains = <&sysc R8A7795_PD_A3VP>;
1342
1343                         renesas,fcp = <&fcpvb0>;
1344                 };
1345
1346                 fcpvb0: fcp@fe96f000 {
1347                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1348                         reg = <0 0xfe96f000 0 0x200>;
1349                         clocks = <&cpg CPG_MOD 607>;
1350                         power-domains = <&sysc R8A7795_PD_A3VP>;
1351                 };
1352
1353                 vspi0: vsp@fe9a0000 {
1354                         compatible = "renesas,vsp2";
1355                         reg = <0 0xfe9a0000 0 0x8000>;
1356                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1357                         clocks = <&cpg CPG_MOD 631>;
1358                         power-domains = <&sysc R8A7795_PD_A3VP>;
1359
1360                         renesas,fcp = <&fcpvi0>;
1361                 };
1362
1363                 fcpvi0: fcp@fe9af000 {
1364                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1365                         reg = <0 0xfe9af000 0 0x200>;
1366                         clocks = <&cpg CPG_MOD 611>;
1367                         power-domains = <&sysc R8A7795_PD_A3VP>;
1368                 };
1369
1370                 vspi1: vsp@fe9b0000 {
1371                         compatible = "renesas,vsp2";
1372                         reg = <0 0xfe9b0000 0 0x8000>;
1373                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1374                         clocks = <&cpg CPG_MOD 630>;
1375                         power-domains = <&sysc R8A7795_PD_A3VP>;
1376
1377                         renesas,fcp = <&fcpvi1>;
1378                 };
1379
1380                 fcpvi1: fcp@fe9bf000 {
1381                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1382                         reg = <0 0xfe9bf000 0 0x200>;
1383                         clocks = <&cpg CPG_MOD 610>;
1384                         power-domains = <&sysc R8A7795_PD_A3VP>;
1385                 };
1386
1387                 vspi2: vsp@fe9c0000 {
1388                         compatible = "renesas,vsp2";
1389                         reg = <0 0xfe9c0000 0 0x8000>;
1390                         interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1391                         clocks = <&cpg CPG_MOD 629>;
1392                         power-domains = <&sysc R8A7795_PD_A3VP>;
1393
1394                         renesas,fcp = <&fcpvi2>;
1395                 };
1396
1397                 fcpvi2: fcp@fe9cf000 {
1398                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1399                         reg = <0 0xfe9cf000 0 0x200>;
1400                         clocks = <&cpg CPG_MOD 609>;
1401                         power-domains = <&sysc R8A7795_PD_A3VP>;
1402                 };
1403
1404                 vspd0: vsp@fea20000 {
1405                         compatible = "renesas,vsp2";
1406                         reg = <0 0xfea20000 0 0x4000>;
1407                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1408                         clocks = <&cpg CPG_MOD 623>;
1409                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1410
1411                         renesas,fcp = <&fcpvd0>;
1412                 };
1413
1414                 fcpvd0: fcp@fea27000 {
1415                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1416                         reg = <0 0xfea27000 0 0x200>;
1417                         clocks = <&cpg CPG_MOD 603>;
1418                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1419                 };
1420
1421                 vspd1: vsp@fea28000 {
1422                         compatible = "renesas,vsp2";
1423                         reg = <0 0xfea28000 0 0x4000>;
1424                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1425                         clocks = <&cpg CPG_MOD 622>;
1426                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1427
1428                         renesas,fcp = <&fcpvd1>;
1429                 };
1430
1431                 fcpvd1: fcp@fea2f000 {
1432                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1433                         reg = <0 0xfea2f000 0 0x200>;
1434                         clocks = <&cpg CPG_MOD 602>;
1435                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1436                 };
1437
1438                 vspd2: vsp@fea30000 {
1439                         compatible = "renesas,vsp2";
1440                         reg = <0 0xfea30000 0 0x4000>;
1441                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1442                         clocks = <&cpg CPG_MOD 621>;
1443                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1444
1445                         renesas,fcp = <&fcpvd2>;
1446                 };
1447
1448                 fcpvd2: fcp@fea37000 {
1449                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1450                         reg = <0 0xfea37000 0 0x200>;
1451                         clocks = <&cpg CPG_MOD 601>;
1452                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1453                 };
1454
1455                 vspd3: vsp@fea38000 {
1456                         compatible = "renesas,vsp2";
1457                         reg = <0 0xfea38000 0 0x4000>;
1458                         interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1459                         clocks = <&cpg CPG_MOD 620>;
1460                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1461
1462                         renesas,fcp = <&fcpvd3>;
1463                 };
1464
1465                 fcpvd3: fcp@fea3f000 {
1466                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1467                         reg = <0 0xfea3f000 0 0x200>;
1468                         clocks = <&cpg CPG_MOD 600>;
1469                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1470                 };
1471
1472                 fdp1@fe940000 {
1473                         compatible = "renesas,fdp1";
1474                         reg = <0 0xfe940000 0 0x2400>;
1475                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1476                         clocks = <&cpg CPG_MOD 119>;
1477                         power-domains = <&sysc R8A7795_PD_A3VP>;
1478                         renesas,fcp = <&fcpf0>;
1479                 };
1480
1481                 fdp1@fe944000 {
1482                         compatible = "renesas,fdp1";
1483                         reg = <0 0xfe944000 0 0x2400>;
1484                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1485                         clocks = <&cpg CPG_MOD 118>;
1486                         power-domains = <&sysc R8A7795_PD_A3VP>;
1487                         renesas,fcp = <&fcpf1>;
1488                 };
1489
1490                 fdp1@fe948000 {
1491                         compatible = "renesas,fdp1";
1492                         reg = <0 0xfe948000 0 0x2400>;
1493                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1494                         clocks = <&cpg CPG_MOD 117>;
1495                         power-domains = <&sysc R8A7795_PD_A3VP>;
1496                         renesas,fcp = <&fcpf2>;
1497                 };
1498
1499                 du: display@feb00000 {
1500                         compatible = "renesas,du-r8a7795";
1501                         reg = <0 0xfeb00000 0 0x80000>,
1502                               <0 0xfeb90000 0 0x14>;
1503                         reg-names = "du", "lvds.0";
1504                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1505                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1506                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1507                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1508                         clocks = <&cpg CPG_MOD 724>,
1509                                  <&cpg CPG_MOD 723>,
1510                                  <&cpg CPG_MOD 722>,
1511                                  <&cpg CPG_MOD 721>,
1512                                  <&cpg CPG_MOD 727>;
1513                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1514                         status = "disabled";
1515
1516                         vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1517
1518                         ports {
1519                                 #address-cells = <1>;
1520                                 #size-cells = <0>;
1521
1522                                 port@0 {
1523                                         reg = <0>;
1524                                         du_out_rgb: endpoint {
1525                                         };
1526                                 };
1527                                 port@1 {
1528                                         reg = <1>;
1529                                         du_out_hdmi0: endpoint {
1530                                         };
1531                                 };
1532                                 port@2 {
1533                                         reg = <2>;
1534                                         du_out_hdmi1: endpoint {
1535                                         };
1536                                 };
1537                                 port@3 {
1538                                         reg = <3>;
1539                                         du_out_lvds0: endpoint {
1540                                         };
1541                                 };
1542                         };
1543                 };
1544         };
1545 };