arch/mips/boot/dts/brcm/bcm7358.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm7358";
   5
   6         cpus {
   7                 #address-cells = <1>;
   8                 #size-cells = <0>;
   9
  10                 mips-hpt-frequency = <375000000>;
  11
  12                 cpu@0 {
  13                         compatible = "brcm,bmips3300";
  14                         device_type = "cpu";
  15                         reg = <0>;
  16                 };
  17         };
  18
  19         aliases {
  20                 uart0 = &uart0;
  21                 uart1 = &uart1;
  22                 uart2 = &uart2;
  23         };
  24
  25         cpu_intc: cpu_intc {
  26                 #address-cells = <0>;
  27                 compatible = "mti,cpu-interrupt-controller";
  28
  29                 interrupt-controller;
  30                 #interrupt-cells = <1>;
  31         };
  32
  33         clocks {
  34                 uart_clk: uart_clk {
  35                         compatible = "fixed-clock";
  36                         #clock-cells = <0>;
  37                         clock-frequency = <81000000>;
  38                 };
  39         };
  40
  41         rdb {
  42                 #address-cells = <1>;
  43                 #size-cells = <1>;
  44
  45                 compatible = "simple-bus";
  46                 ranges = <0 0x10000000 0x01000000>;
  47
  48                 periph_intc: periph_intc@411400 {
  49                         compatible = "brcm,bcm7038-l1-intc";
  50                         reg = <0x411400 0x30>;
  51
  52                         interrupt-controller;
  53                         #interrupt-cells = <1>;
  54
  55                         interrupt-parent = <&cpu_intc>;
  56                         interrupts = <2>;
  57                 };
  58
  59                 sun_l2_intc: sun_l2_intc@403000 {
  60                         compatible = "brcm,l2-intc";
  61                         reg = <0x403000 0x30>;
  62                         interrupt-controller;
  63                         #interrupt-cells = <1>;
  64                         interrupt-parent = <&periph_intc>;
  65                         interrupts = <48>;
  66                 };
  67
  68                 gisb-arb@400000 {
  69                         compatible = "brcm,bcm7400-gisb-arb";
  70                         reg = <0x400000 0xdc>;
  71                         native-endian;
  72                         interrupt-parent = <&sun_l2_intc>;
  73                         interrupts = <0>, <2>;
  74                         brcm,gisb-arb-master-mask = <0x2f3>;
  75                         brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
  76                                                      "rdc_0", "raaga_0",
  77                                                      "avd_0", "jtag_0";
  78                 };
  79
  80                 upg_irq0_intc: upg_irq0_intc@406600 {
  81                         compatible = "brcm,bcm7120-l2-intc";
  82                         reg = <0x406600 0x8>;
  83
  84                         brcm,int-map-mask = <0x44>;
  85                         brcm,int-fwd-mask = <0x70000>;
  86
  87                         interrupt-controller;
  88                         #interrupt-cells = <1>;
  89
  90                         interrupt-parent = <&periph_intc>;
  91                         interrupts = <56>;
  92                 };
  93
  94                 sun_top_ctrl: syscon@404000 {
  95                         compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
  96                         reg = <0x404000 0x51c>;
  97                         little-endian;
  98                 };
  99
 100                 reboot {
 101                         compatible = "brcm,brcmstb-reboot";
 102                         syscon = <&sun_top_ctrl 0x304 0x308>;
 103                 };
 104
 105                 uart0: serial@406800 {
 106                         compatible = "ns16550a";
 107                         reg = <0x406800 0x20>;
 108                         reg-io-width = <0x4>;
 109                         reg-shift = <0x2>;
 110                         native-endian;
 111                         interrupt-parent = <&periph_intc>;
 112                         interrupts = <61>;
 113                         clocks = <&uart_clk>;
 114                         status = "disabled";
 115                 };
 116
 117                 uart1: serial@406840 {
 118                         compatible = "ns16550a";
 119                         reg = <0x406840 0x20>;
 120                         reg-io-width = <0x4>;
 121                         reg-shift = <0x2>;
 122                         native-endian;
 123                         interrupt-parent = <&periph_intc>;
 124                         interrupts = <62>;
 125                         clocks = <&uart_clk>;
 126                         status = "disabled";
 127                 };
 128
 129                 uart2: serial@406880 {
 130                         compatible = "ns16550a";
 131                         reg = <0x406880 0x20>;
 132                         reg-io-width = <0x4>;
 133                         reg-shift = <0x2>;
 134                         native-endian;
 135                         interrupt-parent = <&periph_intc>;
 136                         interrupts = <63>;
 137                         clocks = <&uart_clk>;
 138                         status = "disabled";
 139                 };
 140
 141                 enet0: ethernet@430000 {
 142                         phy-mode = "internal";
 143                         phy-handle = <&phy1>;
 144                         mac-address = [ 00 10 18 36 23 1a ];
 145                         compatible = "brcm,genet-v2";
 146                         #address-cells = <0x1>;
 147                         #size-cells = <0x1>;
 148                         reg = <0x430000 0x4c8c>;
 149                         interrupts = <24>, <25>;
 150                         interrupt-parent = <&periph_intc>;
 151                         status = "disabled";
 152
 153                         mdio@e14 {
 154                                 compatible = "brcm,genet-mdio-v2";
 155                                 #address-cells = <0x1>;
 156                                 #size-cells = <0x0>;
 157                                 reg = <0xe14 0x8>;
 158
 159                                 phy1: ethernet-phy@1 {
 160                                         max-speed = <100>;
 161                                         reg = <0x1>;
 162                                         compatible = "brcm,40nm-ephy",
 163                                                 "ethernet-phy-ieee802.3-c22";
 164                                 };
 165                         };
 166                 };
 167
 168                 ehci0: usb@480300 {
 169                         compatible = "brcm,bcm7358-ehci", "generic-ehci";
 170                         reg = <0x480300 0x100>;
 171                         native-endian;
 172                         interrupt-parent = <&periph_intc>;
 173                         interrupts = <65>;
 174                         status = "disabled";
 175                 };
 176
 177                 ohci0: usb@480400 {
 178                         compatible = "brcm,bcm7358-ohci", "generic-ohci";
 179                         reg = <0x480400 0x100>;
 180                         native-endian;
 181                         no-big-frame-no;
 182                         interrupt-parent = <&periph_intc>;
 183                         interrupts = <66>;
 184                         status = "disabled";
 185                 };
 186         };
 187 };