arch/mips/kernel/cevt-gic.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2013  Imagination Technologies Ltd.
   7  */
   8 #include <linux/clockchips.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/percpu.h>
  11 #include <linux/smp.h>
  12 #include <linux/irq.h>
  13
  14 #include <asm/time.h>
  15 #include <asm/gic.h>
  16 #include <asm/mips-boards/maltaint.h>
  17
  18 DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
  19 int gic_timer_irq_installed;
  20
  21
  22 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
  23 {
  24         u64 cnt;
  25         int res;
  26
  27         cnt = gic_read_count();
  28         cnt += (u64)delta;
  29         gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
  30         res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
  31         return res;
  32 }
  33
  34 void gic_set_clock_mode(enum clock_event_mode mode,
  35                                 struct clock_event_device *evt)
  36 {
  37         /* Nothing to do ...  */
  38 }
  39
  40 irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
  41 {
  42         struct clock_event_device *cd;
  43         int cpu = smp_processor_id();
  44
  45         gic_write_compare(gic_read_compare());
  46         cd = &per_cpu(gic_clockevent_device, cpu);
  47         cd->event_handler(cd);
  48         return IRQ_HANDLED;
  49 }
  50
  51 struct irqaction gic_compare_irqaction = {
  52         .handler = gic_compare_interrupt,
  53         .flags = IRQF_PERCPU | IRQF_TIMER,
  54         .name = "timer",
  55 };
  56
  57
  58 void gic_event_handler(struct clock_event_device *dev)
  59 {
  60 }
  61
  62 int gic_clockevent_init(void)
  63 {
  64         unsigned int cpu = smp_processor_id();
  65         struct clock_event_device *cd;
  66         unsigned int irq;
  67
  68         if (!cpu_has_counter || !gic_frequency)
  69                 return -ENXIO;
  70
  71         irq = MIPS_GIC_IRQ_BASE;
  72
  73         cd = &per_cpu(gic_clockevent_device, cpu);
  74
  75         cd->name                = "MIPS GIC";
  76         cd->features            = CLOCK_EVT_FEAT_ONESHOT |
  77                                   CLOCK_EVT_FEAT_C3STOP;
  78
  79         clockevent_set_clock(cd, gic_frequency);
  80
  81         /* Calculate the min / max delta */
  82         cd->max_delta_ns        = clockevent_delta2ns(0x7fffffff, cd);
  83         cd->min_delta_ns        = clockevent_delta2ns(0x300, cd);
  84
  85         cd->rating              = 300;
  86         cd->irq                 = irq;
  87         cd->cpumask             = cpumask_of(cpu);
  88         cd->set_next_event      = gic_next_event;
  89         cd->set_mode            = gic_set_clock_mode;
  90         cd->event_handler       = gic_event_handler;
  91
  92         clockevents_register_device(cd);
  93
  94         GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_MAP), 0x80000002);
  95         GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_SMASK), GIC_VPE_SMASK_CMP_MSK);
  96
  97         if (gic_timer_irq_installed)
  98                 return 0;
  99
 100         gic_timer_irq_installed = 1;
 101
 102         setup_irq(irq, &gic_compare_irqaction);
 103         irq_set_handler(irq, handle_percpu_irq);
 104         return 0;
 105 }