Merge tag 'gcc-plugins-v4.9-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git...
[cascardo/linux.git] / arch / mips / kernel / ptrace.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/compiler.h>
18 #include <linux/context_tracking.h>
19 #include <linux/elf.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/mm.h>
23 #include <linux/errno.h>
24 #include <linux/ptrace.h>
25 #include <linux/regset.h>
26 #include <linux/smp.h>
27 #include <linux/security.h>
28 #include <linux/stddef.h>
29 #include <linux/tracehook.h>
30 #include <linux/audit.h>
31 #include <linux/seccomp.h>
32 #include <linux/ftrace.h>
33
34 #include <asm/byteorder.h>
35 #include <asm/cpu.h>
36 #include <asm/cpu-info.h>
37 #include <asm/dsp.h>
38 #include <asm/fpu.h>
39 #include <asm/mipsregs.h>
40 #include <asm/mipsmtregs.h>
41 #include <asm/pgtable.h>
42 #include <asm/page.h>
43 #include <asm/syscall.h>
44 #include <asm/uaccess.h>
45 #include <asm/bootinfo.h>
46 #include <asm/reg.h>
47
48 #define CREATE_TRACE_POINTS
49 #include <trace/events/syscalls.h>
50
51 static void init_fp_ctx(struct task_struct *target)
52 {
53         /* If FP has been used then the target already has context */
54         if (tsk_used_math(target))
55                 return;
56
57         /* Begin with data registers set to all 1s... */
58         memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
59
60         /* FCSR has been preset by `mips_set_personality_nan'.  */
61
62         /*
63          * Record that the target has "used" math, such that the context
64          * just initialised, and any modifications made by the caller,
65          * aren't discarded.
66          */
67         set_stopped_child_used_math(target);
68 }
69
70 /*
71  * Called by kernel/ptrace.c when detaching..
72  *
73  * Make sure single step bits etc are not set.
74  */
75 void ptrace_disable(struct task_struct *child)
76 {
77         /* Don't load the watchpoint registers for the ex-child. */
78         clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
79 }
80
81 /*
82  * Poke at FCSR according to its mask.  Don't set the cause bits as
83  * this is currently not handled correctly in FP context restoration
84  * and will cause an oops if a corresponding enable bit is set.
85  */
86 static void ptrace_setfcr31(struct task_struct *child, u32 value)
87 {
88         u32 fcr31;
89         u32 mask;
90
91         value &= ~FPU_CSR_ALL_X;
92         fcr31 = child->thread.fpu.fcr31;
93         mask = boot_cpu_data.fpu_msk31;
94         child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
95 }
96
97 /*
98  * Read a general register set.  We always use the 64-bit format, even
99  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
100  * Registers are sign extended to fill the available space.
101  */
102 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
103 {
104         struct pt_regs *regs;
105         int i;
106
107         if (!access_ok(VERIFY_WRITE, data, 38 * 8))
108                 return -EIO;
109
110         regs = task_pt_regs(child);
111
112         for (i = 0; i < 32; i++)
113                 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
114         __put_user((long)regs->lo, (__s64 __user *)&data->lo);
115         __put_user((long)regs->hi, (__s64 __user *)&data->hi);
116         __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
117         __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
118         __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
119         __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
120
121         return 0;
122 }
123
124 /*
125  * Write a general register set.  As for PTRACE_GETREGS, we always use
126  * the 64-bit format.  On a 32-bit kernel only the lower order half
127  * (according to endianness) will be used.
128  */
129 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
130 {
131         struct pt_regs *regs;
132         int i;
133
134         if (!access_ok(VERIFY_READ, data, 38 * 8))
135                 return -EIO;
136
137         regs = task_pt_regs(child);
138
139         for (i = 0; i < 32; i++)
140                 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
141         __get_user(regs->lo, (__s64 __user *)&data->lo);
142         __get_user(regs->hi, (__s64 __user *)&data->hi);
143         __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
144
145         /* badvaddr, status, and cause may not be written.  */
146
147         return 0;
148 }
149
150 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
151 {
152         int i;
153
154         if (!access_ok(VERIFY_WRITE, data, 33 * 8))
155                 return -EIO;
156
157         if (tsk_used_math(child)) {
158                 union fpureg *fregs = get_fpu_regs(child);
159                 for (i = 0; i < 32; i++)
160                         __put_user(get_fpr64(&fregs[i], 0),
161                                    i + (__u64 __user *)data);
162         } else {
163                 for (i = 0; i < 32; i++)
164                         __put_user((__u64) -1, i + (__u64 __user *) data);
165         }
166
167         __put_user(child->thread.fpu.fcr31, data + 64);
168         __put_user(boot_cpu_data.fpu_id, data + 65);
169
170         return 0;
171 }
172
173 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
174 {
175         union fpureg *fregs;
176         u64 fpr_val;
177         u32 value;
178         int i;
179
180         if (!access_ok(VERIFY_READ, data, 33 * 8))
181                 return -EIO;
182
183         init_fp_ctx(child);
184         fregs = get_fpu_regs(child);
185
186         for (i = 0; i < 32; i++) {
187                 __get_user(fpr_val, i + (__u64 __user *)data);
188                 set_fpr64(&fregs[i], 0, fpr_val);
189         }
190
191         __get_user(value, data + 64);
192         ptrace_setfcr31(child, value);
193
194         /* FIR may not be written.  */
195
196         return 0;
197 }
198
199 int ptrace_get_watch_regs(struct task_struct *child,
200                           struct pt_watch_regs __user *addr)
201 {
202         enum pt_watch_style style;
203         int i;
204
205         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
206                 return -EIO;
207         if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
208                 return -EIO;
209
210 #ifdef CONFIG_32BIT
211         style = pt_watch_style_mips32;
212 #define WATCH_STYLE mips32
213 #else
214         style = pt_watch_style_mips64;
215 #define WATCH_STYLE mips64
216 #endif
217
218         __put_user(style, &addr->style);
219         __put_user(boot_cpu_data.watch_reg_use_cnt,
220                    &addr->WATCH_STYLE.num_valid);
221         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
222                 __put_user(child->thread.watch.mips3264.watchlo[i],
223                            &addr->WATCH_STYLE.watchlo[i]);
224                 __put_user(child->thread.watch.mips3264.watchhi[i] &
225                                 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
226                            &addr->WATCH_STYLE.watchhi[i]);
227                 __put_user(boot_cpu_data.watch_reg_masks[i],
228                            &addr->WATCH_STYLE.watch_masks[i]);
229         }
230         for (; i < 8; i++) {
231                 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
232                 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
233                 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
234         }
235
236         return 0;
237 }
238
239 int ptrace_set_watch_regs(struct task_struct *child,
240                           struct pt_watch_regs __user *addr)
241 {
242         int i;
243         int watch_active = 0;
244         unsigned long lt[NUM_WATCH_REGS];
245         u16 ht[NUM_WATCH_REGS];
246
247         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
248                 return -EIO;
249         if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
250                 return -EIO;
251         /* Check the values. */
252         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
253                 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
254 #ifdef CONFIG_32BIT
255                 if (lt[i] & __UA_LIMIT)
256                         return -EINVAL;
257 #else
258                 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
259                         if (lt[i] & 0xffffffff80000000UL)
260                                 return -EINVAL;
261                 } else {
262                         if (lt[i] & __UA_LIMIT)
263                                 return -EINVAL;
264                 }
265 #endif
266                 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
267                 if (ht[i] & ~MIPS_WATCHHI_MASK)
268                         return -EINVAL;
269         }
270         /* Install them. */
271         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
272                 if (lt[i] & MIPS_WATCHLO_IRW)
273                         watch_active = 1;
274                 child->thread.watch.mips3264.watchlo[i] = lt[i];
275                 /* Set the G bit. */
276                 child->thread.watch.mips3264.watchhi[i] = ht[i];
277         }
278
279         if (watch_active)
280                 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
281         else
282                 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
283
284         return 0;
285 }
286
287 /* regset get/set implementations */
288
289 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
290
291 static int gpr32_get(struct task_struct *target,
292                      const struct user_regset *regset,
293                      unsigned int pos, unsigned int count,
294                      void *kbuf, void __user *ubuf)
295 {
296         struct pt_regs *regs = task_pt_regs(target);
297         u32 uregs[ELF_NGREG] = {};
298         unsigned i;
299
300         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
301                 /* k0/k1 are copied as zero. */
302                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
303                         continue;
304
305                 uregs[i] = regs->regs[i - MIPS32_EF_R0];
306         }
307
308         uregs[MIPS32_EF_LO] = regs->lo;
309         uregs[MIPS32_EF_HI] = regs->hi;
310         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
311         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
312         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
313         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
314
315         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
316                                    sizeof(uregs));
317 }
318
319 static int gpr32_set(struct task_struct *target,
320                      const struct user_regset *regset,
321                      unsigned int pos, unsigned int count,
322                      const void *kbuf, const void __user *ubuf)
323 {
324         struct pt_regs *regs = task_pt_regs(target);
325         u32 uregs[ELF_NGREG];
326         unsigned start, num_regs, i;
327         int err;
328
329         start = pos / sizeof(u32);
330         num_regs = count / sizeof(u32);
331
332         if (start + num_regs > ELF_NGREG)
333                 return -EIO;
334
335         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
336                                  sizeof(uregs));
337         if (err)
338                 return err;
339
340         for (i = start; i < num_regs; i++) {
341                 /*
342                  * Cast all values to signed here so that if this is a 64-bit
343                  * kernel, the supplied 32-bit values will be sign extended.
344                  */
345                 switch (i) {
346                 case MIPS32_EF_R1 ... MIPS32_EF_R25:
347                         /* k0/k1 are ignored. */
348                 case MIPS32_EF_R28 ... MIPS32_EF_R31:
349                         regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
350                         break;
351                 case MIPS32_EF_LO:
352                         regs->lo = (s32)uregs[i];
353                         break;
354                 case MIPS32_EF_HI:
355                         regs->hi = (s32)uregs[i];
356                         break;
357                 case MIPS32_EF_CP0_EPC:
358                         regs->cp0_epc = (s32)uregs[i];
359                         break;
360                 }
361         }
362
363         return 0;
364 }
365
366 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
367
368 #ifdef CONFIG_64BIT
369
370 static int gpr64_get(struct task_struct *target,
371                      const struct user_regset *regset,
372                      unsigned int pos, unsigned int count,
373                      void *kbuf, void __user *ubuf)
374 {
375         struct pt_regs *regs = task_pt_regs(target);
376         u64 uregs[ELF_NGREG] = {};
377         unsigned i;
378
379         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
380                 /* k0/k1 are copied as zero. */
381                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
382                         continue;
383
384                 uregs[i] = regs->regs[i - MIPS64_EF_R0];
385         }
386
387         uregs[MIPS64_EF_LO] = regs->lo;
388         uregs[MIPS64_EF_HI] = regs->hi;
389         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
390         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
391         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
392         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
393
394         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
395                                    sizeof(uregs));
396 }
397
398 static int gpr64_set(struct task_struct *target,
399                      const struct user_regset *regset,
400                      unsigned int pos, unsigned int count,
401                      const void *kbuf, const void __user *ubuf)
402 {
403         struct pt_regs *regs = task_pt_regs(target);
404         u64 uregs[ELF_NGREG];
405         unsigned start, num_regs, i;
406         int err;
407
408         start = pos / sizeof(u64);
409         num_regs = count / sizeof(u64);
410
411         if (start + num_regs > ELF_NGREG)
412                 return -EIO;
413
414         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
415                                  sizeof(uregs));
416         if (err)
417                 return err;
418
419         for (i = start; i < num_regs; i++) {
420                 switch (i) {
421                 case MIPS64_EF_R1 ... MIPS64_EF_R25:
422                         /* k0/k1 are ignored. */
423                 case MIPS64_EF_R28 ... MIPS64_EF_R31:
424                         regs->regs[i - MIPS64_EF_R0] = uregs[i];
425                         break;
426                 case MIPS64_EF_LO:
427                         regs->lo = uregs[i];
428                         break;
429                 case MIPS64_EF_HI:
430                         regs->hi = uregs[i];
431                         break;
432                 case MIPS64_EF_CP0_EPC:
433                         regs->cp0_epc = uregs[i];
434                         break;
435                 }
436         }
437
438         return 0;
439 }
440
441 #endif /* CONFIG_64BIT */
442
443 static int fpr_get(struct task_struct *target,
444                    const struct user_regset *regset,
445                    unsigned int pos, unsigned int count,
446                    void *kbuf, void __user *ubuf)
447 {
448         unsigned i;
449         int err;
450         u64 fpr_val;
451
452         /* XXX fcr31  */
453
454         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
455                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
456                                            &target->thread.fpu,
457                                            0, sizeof(elf_fpregset_t));
458
459         for (i = 0; i < NUM_FPU_REGS; i++) {
460                 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
461                 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
462                                           &fpr_val, i * sizeof(elf_fpreg_t),
463                                           (i + 1) * sizeof(elf_fpreg_t));
464                 if (err)
465                         return err;
466         }
467
468         return 0;
469 }
470
471 static int fpr_set(struct task_struct *target,
472                    const struct user_regset *regset,
473                    unsigned int pos, unsigned int count,
474                    const void *kbuf, const void __user *ubuf)
475 {
476         unsigned i;
477         int err;
478         u64 fpr_val;
479
480         /* XXX fcr31  */
481
482         init_fp_ctx(target);
483
484         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
485                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
486                                           &target->thread.fpu,
487                                           0, sizeof(elf_fpregset_t));
488
489         for (i = 0; i < NUM_FPU_REGS; i++) {
490                 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
491                                          &fpr_val, i * sizeof(elf_fpreg_t),
492                                          (i + 1) * sizeof(elf_fpreg_t));
493                 if (err)
494                         return err;
495                 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
496         }
497
498         return 0;
499 }
500
501 enum mips_regset {
502         REGSET_GPR,
503         REGSET_FPR,
504 };
505
506 struct pt_regs_offset {
507         const char *name;
508         int offset;
509 };
510
511 #define REG_OFFSET_NAME(reg, r) {                                       \
512         .name = #reg,                                                   \
513         .offset = offsetof(struct pt_regs, r)                           \
514 }
515
516 #define REG_OFFSET_END {                                                \
517         .name = NULL,                                                   \
518         .offset = 0                                                     \
519 }
520
521 static const struct pt_regs_offset regoffset_table[] = {
522         REG_OFFSET_NAME(r0, regs[0]),
523         REG_OFFSET_NAME(r1, regs[1]),
524         REG_OFFSET_NAME(r2, regs[2]),
525         REG_OFFSET_NAME(r3, regs[3]),
526         REG_OFFSET_NAME(r4, regs[4]),
527         REG_OFFSET_NAME(r5, regs[5]),
528         REG_OFFSET_NAME(r6, regs[6]),
529         REG_OFFSET_NAME(r7, regs[7]),
530         REG_OFFSET_NAME(r8, regs[8]),
531         REG_OFFSET_NAME(r9, regs[9]),
532         REG_OFFSET_NAME(r10, regs[10]),
533         REG_OFFSET_NAME(r11, regs[11]),
534         REG_OFFSET_NAME(r12, regs[12]),
535         REG_OFFSET_NAME(r13, regs[13]),
536         REG_OFFSET_NAME(r14, regs[14]),
537         REG_OFFSET_NAME(r15, regs[15]),
538         REG_OFFSET_NAME(r16, regs[16]),
539         REG_OFFSET_NAME(r17, regs[17]),
540         REG_OFFSET_NAME(r18, regs[18]),
541         REG_OFFSET_NAME(r19, regs[19]),
542         REG_OFFSET_NAME(r20, regs[20]),
543         REG_OFFSET_NAME(r21, regs[21]),
544         REG_OFFSET_NAME(r22, regs[22]),
545         REG_OFFSET_NAME(r23, regs[23]),
546         REG_OFFSET_NAME(r24, regs[24]),
547         REG_OFFSET_NAME(r25, regs[25]),
548         REG_OFFSET_NAME(r26, regs[26]),
549         REG_OFFSET_NAME(r27, regs[27]),
550         REG_OFFSET_NAME(r28, regs[28]),
551         REG_OFFSET_NAME(r29, regs[29]),
552         REG_OFFSET_NAME(r30, regs[30]),
553         REG_OFFSET_NAME(r31, regs[31]),
554         REG_OFFSET_NAME(c0_status, cp0_status),
555         REG_OFFSET_NAME(hi, hi),
556         REG_OFFSET_NAME(lo, lo),
557 #ifdef CONFIG_CPU_HAS_SMARTMIPS
558         REG_OFFSET_NAME(acx, acx),
559 #endif
560         REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
561         REG_OFFSET_NAME(c0_cause, cp0_cause),
562         REG_OFFSET_NAME(c0_epc, cp0_epc),
563 #ifdef CONFIG_CPU_CAVIUM_OCTEON
564         REG_OFFSET_NAME(mpl0, mpl[0]),
565         REG_OFFSET_NAME(mpl1, mpl[1]),
566         REG_OFFSET_NAME(mpl2, mpl[2]),
567         REG_OFFSET_NAME(mtp0, mtp[0]),
568         REG_OFFSET_NAME(mtp1, mtp[1]),
569         REG_OFFSET_NAME(mtp2, mtp[2]),
570 #endif
571         REG_OFFSET_END,
572 };
573
574 /**
575  * regs_query_register_offset() - query register offset from its name
576  * @name:       the name of a register
577  *
578  * regs_query_register_offset() returns the offset of a register in struct
579  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
580  */
581 int regs_query_register_offset(const char *name)
582 {
583         const struct pt_regs_offset *roff;
584         for (roff = regoffset_table; roff->name != NULL; roff++)
585                 if (!strcmp(roff->name, name))
586                         return roff->offset;
587         return -EINVAL;
588 }
589
590 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
591
592 static const struct user_regset mips_regsets[] = {
593         [REGSET_GPR] = {
594                 .core_note_type = NT_PRSTATUS,
595                 .n              = ELF_NGREG,
596                 .size           = sizeof(unsigned int),
597                 .align          = sizeof(unsigned int),
598                 .get            = gpr32_get,
599                 .set            = gpr32_set,
600         },
601         [REGSET_FPR] = {
602                 .core_note_type = NT_PRFPREG,
603                 .n              = ELF_NFPREG,
604                 .size           = sizeof(elf_fpreg_t),
605                 .align          = sizeof(elf_fpreg_t),
606                 .get            = fpr_get,
607                 .set            = fpr_set,
608         },
609 };
610
611 static const struct user_regset_view user_mips_view = {
612         .name           = "mips",
613         .e_machine      = ELF_ARCH,
614         .ei_osabi       = ELF_OSABI,
615         .regsets        = mips_regsets,
616         .n              = ARRAY_SIZE(mips_regsets),
617 };
618
619 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
620
621 #ifdef CONFIG_64BIT
622
623 static const struct user_regset mips64_regsets[] = {
624         [REGSET_GPR] = {
625                 .core_note_type = NT_PRSTATUS,
626                 .n              = ELF_NGREG,
627                 .size           = sizeof(unsigned long),
628                 .align          = sizeof(unsigned long),
629                 .get            = gpr64_get,
630                 .set            = gpr64_set,
631         },
632         [REGSET_FPR] = {
633                 .core_note_type = NT_PRFPREG,
634                 .n              = ELF_NFPREG,
635                 .size           = sizeof(elf_fpreg_t),
636                 .align          = sizeof(elf_fpreg_t),
637                 .get            = fpr_get,
638                 .set            = fpr_set,
639         },
640 };
641
642 static const struct user_regset_view user_mips64_view = {
643         .name           = "mips64",
644         .e_machine      = ELF_ARCH,
645         .ei_osabi       = ELF_OSABI,
646         .regsets        = mips64_regsets,
647         .n              = ARRAY_SIZE(mips64_regsets),
648 };
649
650 #endif /* CONFIG_64BIT */
651
652 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
653 {
654 #ifdef CONFIG_32BIT
655         return &user_mips_view;
656 #else
657 #ifdef CONFIG_MIPS32_O32
658         if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
659                 return &user_mips_view;
660 #endif
661         return &user_mips64_view;
662 #endif
663 }
664
665 long arch_ptrace(struct task_struct *child, long request,
666                  unsigned long addr, unsigned long data)
667 {
668         int ret;
669         void __user *addrp = (void __user *) addr;
670         void __user *datavp = (void __user *) data;
671         unsigned long __user *datalp = (void __user *) data;
672
673         switch (request) {
674         /* when I and D space are separate, these will need to be fixed. */
675         case PTRACE_PEEKTEXT: /* read word at location addr. */
676         case PTRACE_PEEKDATA:
677                 ret = generic_ptrace_peekdata(child, addr, data);
678                 break;
679
680         /* Read the word at location addr in the USER area. */
681         case PTRACE_PEEKUSR: {
682                 struct pt_regs *regs;
683                 union fpureg *fregs;
684                 unsigned long tmp = 0;
685
686                 regs = task_pt_regs(child);
687                 ret = 0;  /* Default return value. */
688
689                 switch (addr) {
690                 case 0 ... 31:
691                         tmp = regs->regs[addr];
692                         break;
693                 case FPR_BASE ... FPR_BASE + 31:
694                         if (!tsk_used_math(child)) {
695                                 /* FP not yet used */
696                                 tmp = -1;
697                                 break;
698                         }
699                         fregs = get_fpu_regs(child);
700
701 #ifdef CONFIG_32BIT
702                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
703                                 /*
704                                  * The odd registers are actually the high
705                                  * order bits of the values stored in the even
706                                  * registers - unless we're using r2k_switch.S.
707                                  */
708                                 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
709                                                 addr & 1);
710                                 break;
711                         }
712 #endif
713                         tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
714                         break;
715                 case PC:
716                         tmp = regs->cp0_epc;
717                         break;
718                 case CAUSE:
719                         tmp = regs->cp0_cause;
720                         break;
721                 case BADVADDR:
722                         tmp = regs->cp0_badvaddr;
723                         break;
724                 case MMHI:
725                         tmp = regs->hi;
726                         break;
727                 case MMLO:
728                         tmp = regs->lo;
729                         break;
730 #ifdef CONFIG_CPU_HAS_SMARTMIPS
731                 case ACX:
732                         tmp = regs->acx;
733                         break;
734 #endif
735                 case FPC_CSR:
736                         tmp = child->thread.fpu.fcr31;
737                         break;
738                 case FPC_EIR:
739                         /* implementation / version register */
740                         tmp = boot_cpu_data.fpu_id;
741                         break;
742                 case DSP_BASE ... DSP_BASE + 5: {
743                         dspreg_t *dregs;
744
745                         if (!cpu_has_dsp) {
746                                 tmp = 0;
747                                 ret = -EIO;
748                                 goto out;
749                         }
750                         dregs = __get_dsp_regs(child);
751                         tmp = (unsigned long) (dregs[addr - DSP_BASE]);
752                         break;
753                 }
754                 case DSP_CONTROL:
755                         if (!cpu_has_dsp) {
756                                 tmp = 0;
757                                 ret = -EIO;
758                                 goto out;
759                         }
760                         tmp = child->thread.dsp.dspcontrol;
761                         break;
762                 default:
763                         tmp = 0;
764                         ret = -EIO;
765                         goto out;
766                 }
767                 ret = put_user(tmp, datalp);
768                 break;
769         }
770
771         /* when I and D space are separate, this will have to be fixed. */
772         case PTRACE_POKETEXT: /* write the word at location addr. */
773         case PTRACE_POKEDATA:
774                 ret = generic_ptrace_pokedata(child, addr, data);
775                 break;
776
777         case PTRACE_POKEUSR: {
778                 struct pt_regs *regs;
779                 ret = 0;
780                 regs = task_pt_regs(child);
781
782                 switch (addr) {
783                 case 0 ... 31:
784                         regs->regs[addr] = data;
785                         break;
786                 case FPR_BASE ... FPR_BASE + 31: {
787                         union fpureg *fregs = get_fpu_regs(child);
788
789                         init_fp_ctx(child);
790 #ifdef CONFIG_32BIT
791                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
792                                 /*
793                                  * The odd registers are actually the high
794                                  * order bits of the values stored in the even
795                                  * registers - unless we're using r2k_switch.S.
796                                  */
797                                 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
798                                           addr & 1, data);
799                                 break;
800                         }
801 #endif
802                         set_fpr64(&fregs[addr - FPR_BASE], 0, data);
803                         break;
804                 }
805                 case PC:
806                         regs->cp0_epc = data;
807                         break;
808                 case MMHI:
809                         regs->hi = data;
810                         break;
811                 case MMLO:
812                         regs->lo = data;
813                         break;
814 #ifdef CONFIG_CPU_HAS_SMARTMIPS
815                 case ACX:
816                         regs->acx = data;
817                         break;
818 #endif
819                 case FPC_CSR:
820                         ptrace_setfcr31(child, data);
821                         break;
822                 case DSP_BASE ... DSP_BASE + 5: {
823                         dspreg_t *dregs;
824
825                         if (!cpu_has_dsp) {
826                                 ret = -EIO;
827                                 break;
828                         }
829
830                         dregs = __get_dsp_regs(child);
831                         dregs[addr - DSP_BASE] = data;
832                         break;
833                 }
834                 case DSP_CONTROL:
835                         if (!cpu_has_dsp) {
836                                 ret = -EIO;
837                                 break;
838                         }
839                         child->thread.dsp.dspcontrol = data;
840                         break;
841                 default:
842                         /* The rest are not allowed. */
843                         ret = -EIO;
844                         break;
845                 }
846                 break;
847                 }
848
849         case PTRACE_GETREGS:
850                 ret = ptrace_getregs(child, datavp);
851                 break;
852
853         case PTRACE_SETREGS:
854                 ret = ptrace_setregs(child, datavp);
855                 break;
856
857         case PTRACE_GETFPREGS:
858                 ret = ptrace_getfpregs(child, datavp);
859                 break;
860
861         case PTRACE_SETFPREGS:
862                 ret = ptrace_setfpregs(child, datavp);
863                 break;
864
865         case PTRACE_GET_THREAD_AREA:
866                 ret = put_user(task_thread_info(child)->tp_value, datalp);
867                 break;
868
869         case PTRACE_GET_WATCH_REGS:
870                 ret = ptrace_get_watch_regs(child, addrp);
871                 break;
872
873         case PTRACE_SET_WATCH_REGS:
874                 ret = ptrace_set_watch_regs(child, addrp);
875                 break;
876
877         default:
878                 ret = ptrace_request(child, request, addr, data);
879                 break;
880         }
881  out:
882         return ret;
883 }
884
885 /*
886  * Notification of system call entry/exit
887  * - triggered by current->work.syscall_trace
888  */
889 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
890 {
891         user_exit();
892
893         current_thread_info()->syscall = syscall;
894
895         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
896             tracehook_report_syscall_entry(regs))
897                 return -1;
898
899         if (secure_computing(NULL) == -1)
900                 return -1;
901
902         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
903                 trace_sys_enter(regs, regs->regs[2]);
904
905         audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
906                             regs->regs[6], regs->regs[7]);
907         return syscall;
908 }
909
910 /*
911  * Notification of system call entry/exit
912  * - triggered by current->work.syscall_trace
913  */
914 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
915 {
916         /*
917          * We may come here right after calling schedule_user()
918          * or do_notify_resume(), in which case we can be in RCU
919          * user mode.
920          */
921         user_exit();
922
923         audit_syscall_exit(regs);
924
925         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
926                 trace_sys_exit(regs, regs->regs[2]);
927
928         if (test_thread_flag(TIF_SYSCALL_TRACE))
929                 tracehook_report_syscall_exit(regs, 0);
930
931         user_enter();
932 }